Abstract
ABSTRACTThe paper focuses on a comprehensive study of linearity and analog performance aspects of tunnel field effect transistor (TFET) device architectures such as dual material gate (DMG) TFET, hetero-dielectric (H-D) TFET, and dual material gate hetero-dielectric (DMG H-D) TFET. The parameters governing the device linearity and analog performance trends have been investigated in terms of transconductance (gm1), drain conductance (gd1), and second- and third-order derivatives of current, i.e., gm2 and gm3. Further the linearity performance of DMG H-D TFET has been optimized by tuning the metal gate length and high-k dielectric length.
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