Diffusion model to derate moisture sensitive surface mount IC's for factory use conditions

Abstract

Recent industry specifications JESD22-A112 and IPC-SM-786A have identified a set of moisture sensitivity levels for classification of moisture/reflow sensitive devices. The established test conditions are meant to represent average worst-case factory environmental conditions that a plastic packaged surface mount integrated circuit (IC) can safely be exposed to after opening of the protective dry-bag. The exposure times imposed by the level classifications relate specifically to the equivalent testing condition, e.g., a Level 3 device must be assembled within 168 h for a factory environment of 30/spl deg/C/60% relative humidity (RH). No equivalent exposure times are addressed by the specifications if the factory ambients are not at 30/spl deg/C and 60% RH. This paper addresses the issue of equivalent exposure times for varying temperature-humidity conditions that a factory could maintain. A derating procedure has been developed that adopts a first principles approach for solution to moisture diffusion into plastic packages. One-dimensional and three-dimensional [(1-D) and (3-D)] mathematical and computer-generated solutions for moisture diffusion were obtained for plastic packaged IC's. Critical moisture concentrations, achieved at internal interfaces, during JEDEC/IPC testing conditions were calculated and used as a criterion for the derating procedure. Based on this approach, an equivalency table can be developed for any combination of factory temperature and humidity conditions. Validation of the theoretical predictions was carried out through experiments on two types of plastic packages: a plastic-packaged ball grid array (BGA) and a plastic quad flat pack (PQFP).