CHAPTER 8 - Logic and circuit simulation

Abstract

Logic simulation and circuit simulation are typically used in conjunction with functional verification to verify the correctness of an integrated circuit. During the logic design stage, designers rely on logic simulation to verify whether the design meets its specifications and contains any design errors. During the circuit design stage, designers use circuit simulation to test and characterize digital cell libraries, memory models, and analog and mixed-signal circuits that require detailed timing analysis to ensure the correct operation of these circuits. This chapter elaborates on popular compiled-code and event-driven logic simulation techniques. This is followed by hardware accelerated logic simulation that is commonly referred to as hardware emulation and is intended to bridge the growing gap between circuit complexity and software simulator efficiency. Two crucial ingredients of emulators: reconfigurable computing units and interconnection architectures are described. Circuit simulation is used to characterize the cell library, memory models, and the timing critical portion of the circuit. The chapter explains the procedures required to simulate very large-scale integration (VLSI) circuits with interconnects and nonlinear devices.