Abstract
Design verification of large VLSI (very-large-scale integration) circuits accounts for a sizable part of design time. Simulators verify the design at various levels of abstraction. A fast and accurate simulator enables the designer to introduce a higher quality product into the marketplace early. This paper describes a logic simulator implemented using the MARS (Microprogrammable Accelerator for Rapid Simulations) multicomputer. The logic simulator, AGSIM (Accelerated Good Circuit Simulator), has been integrated into the production CAD (computer-aided design) system at AT&T Bell Laboratories. To date, more than 200 application-specific integrated circuits (ASICs) of varying complexity have been simulated with MARS. This paper presents the relevant features of the MARS architecture, and the details of the logic simulator. We present the results on 10 VLSI ASIC simulations to show its increased performance over the existing software simulator, GSIM (Good Circuit Simulator), while maintaining the same accuracy. The MARS project started with accelerated logic simulation as the primary application. However, the programmable nature of the accelerator has made several other applications possible.
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