CHAPTER 13 - The Memory Protection Unit

Abstract

This chapter focuses on the Memory Protection Unit (MPU) included in the Cortex™-M3 design. Including the MPU in the microcontrollers or system-on-chip (SoC) products provides memory protection features, which can make the developed products more robust. The MPU needs to be programmed and enabled before use. The chapter explains a number of registers that the MPU contains and is controlled by including the MPU Type register, which can be used to determine whether the MPU is fitted and the MPU Control register, which has three control bits, and the MPU Region Number register, which is used to select the region to be programmed before each region is set up. It also discusses the sub region disable, the Execute Never field, and the TEX, S, B, and C fields. It explores the setting up of the MPU and explains that it is not necessary to set up a region for the memory in the private peripheral bus range; the MPU automatically recognizes the private peripheral bus memory addresses and allows privileged software to perform data accesses in this region.