A triple-channel incremental zoom-ADC for 3-DoF MEMS digital gyroscopes

Abstract

This paper presents a multiplexed analog-to-digital converter (ADC) consisting mainly of high-precision sampling holders (S/H) and an incremental zoom ADC. Flip-around design is employed in S/H modules for power economy and noise suppression. Based on efficient coordination between S/H and multiplexers, synchronous sampling is available in the whole triple-channel ADC to maintain phase accordance. The core converter employed a hybrid architecture of successive approximation register (SAR) and Sigma-Delta [Formula: see text], which constitutes an energy-efficient zoom ADC. Final conversion result is a combination of the two steps. Both the SAR and [Formula: see text] modulation share a third-order loop filter to compromise between systematic stability and input range. On-chip digital logic include capacitor array controlling and dynamic-element-matching (DEM) technique. Manufactured in a standard [Formula: see text]m CMOS technology, the whole chip occupies an area of 2.7 mm2. Experimental results show a maximum signal-to-noise ratio (SNR) of 100.2 dB, with a power consumption of 2.1 mW from a 5 V supply.