Abstract
We propose a hybrid Analog to Digital Converter (ADC) combined with the first-stage as a first-order feedforward incremental (FF I-) ADC and the second-stage as a SAR (Successive Approximation Register) ADC as high-precision and high-speed ADCs. As a result of simulation, the proposed hybrid ADC correctly converts data even if capacitance in FF path of the first-order I-ADC has 10% error.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have