A Brief Insight into the Vertical Super-Thin Body (VSTB) MOSFET

Abstract

AbstractInvestigation of different attributes of a vertical super-thin body (VSTB) MOSFET has been performed through the 3-D Sentaurus TCAD platform. Same-scale FinFET and VSTB FET performance are also compared in terms of their performance. The proposed doping outline 3 (DO3) decreases off-state leakage current (Ioff) by 99.4% over DO1. The gate overlap used on source/drain of 15 nm (OL3) improves on/off current ratio (Ion/Ioff) and subthreshold swing (SS) over OL1 by about 83.6% and 6.47%, respectively. The explanation for such enhancement is addressed by examining carrier properties like density, mobility, and velocity in off/on state. Furthermore, with a supply voltage (VD) sweep = (0.05–1) V, Ion/Ioff, SS, and threshold voltage (Vth) show sufficient performance needed for ultra-low-power (ULP) and high performance (HP) nodes. For channel length (Lch) = (15–100 nm), the device shows a negligible variation in Ion/Ioff, SS, and DIBL, thus maintaining electrostatic integrity. For Lch = 25 nm, the maximum gm/Cgg/Cgd/fT/GBP at VD = 0.45 V is 0.00155 µS/4.268 fF/0.277 fF/102.09 GHz/177.57 GHz, respectively. The device works well with stress/strain/velocity saturation effects too. Various noise (diffusion/generation-recombination/flicker) power spectral densities are reported at f = 1 MHz and 10 GHz. Lastly, the influence of uniform and Gaussian trap distribution with densities of 1011 and 1013 cm−2 existing at Si/Si3N4 interface on Ioff, Ion, and SS is analyzed.KeywordsVertical super-thin body (VSTB)Overlap (OL)Uniform trapGaussian trap