A 48.1 ps HEMT DCFL NAND circuit with a dual gate structure

Abstract

We fabricated HEMT DCFL 2-input NAND circuits and examined their feasibility using a dual gate structure. Our HEMT had MOVPE-grown InGaP/InGaAs/GaAs pseudomorphic HEMT structures. We first investigated characteristics of the dual gate HEMT in the short gate length region and showed that HEMTs can reveal their inherent properties even in the DCFL NAND circuits. We fabricated a 2-input NAND ring oscillator with a gate length of 0.5 μm. It successfully operated and showed a propagation delay of 48.1 ps and a power consumption of 0.235 mW per stage at a supply voltage of 0.8 V. A master-slave type divide-by-two frequency divider which consists of eight 2-input NAND gates also showed 3.14 GHz operation with a power consumption of 2 mW.