Abstract

This chapter explores decoders and multiplexers. It describes the basic mechanism for decoding and multiplexing signals using VHSIC hardware description language (VHDL), where VHSIC stands for very high speed integrated circuit. This is an extremely useful function and central to much of the data and control signal management on Field Programmable Gate Arrays (FPGAs). The chapter discusses decoders, which are a simple combinatorial block that converts one form of digital representation into another. Usually, a decoder takes a smaller representation and converts it into a larger one. Typical examples are the decoding of an n-bit word into 2n individual logic signals. The chapter also explains multiplexers. A multiplexer is an extension of a simple decoder in that a series of inputs are decoded to provide select enables for one of a number of inputs. In a similar way that n-bits can decode 2n signals, in a multiplexer, n-bits of select line are required to multiplex 2n signals.

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