20 - Latches, Flip-Flops and Registers

Abstract

There are different types of storage elements that occur from different VHSIC hardware description language (VHDL) code, where VHSIC stands for very high speed integrated circuit. . It is important to understand each of the storage elements, so that the correct one results when a design is synthesized. Often bugs in hardware happen due to misunderstanding about effect a VHDL construct will have on the resulting synthesized hardware. This chapter introduces three main types of storage elements—latches, flip-flops, and registers—used in VHDL that can be synthesized from VHDL to a Field Programmable Gate Array (FPGA) platform. A latch is defined as a level sensitive memory device. The output depends purely on the value of the inputs. There are several different types of latch, the most common being the D Latch and the SR Latch. In contrast to the level triggered latch, the flip-flop changes state when an edge occurs on an enable or a clock signal. Registers use a bank of flip-flops to load and store data in a bus. The difference between a basic flip-flop and a register is that there is also a “load” signal that defines whether the data on the input is to be loaded onto the register or not.