Wideband Doherty Power Amplifier Research Articles

Design of Wideband Doherty Power Amplifier Using Inverse Continuous Class-F Mode

Design of Wideband Doherty Power Amplifier Using Inverse Continuous Class-F Mode

Design of an efficiency enhanced wideband Doherty power amplifier based on synthesising of a modified harmonic‐control load modulation network

AbstractA design of a broadband Doherty power amplifier (DPA) using a novel harmonic control network (HCN) is presented. The DPA structure focused on manipulating harmonic components using this new HCN to enhance the bandwidth of operation and power efficiency. The proposed HCN combines a third harmonic suppression network (THSN) with the second harmonic impedance inverter circuit (SHIIC). In the design, the second harmonic component of the main transistor and the peaking transistor are short‐circuited by their associated SHIIC. Additionally, the carefully designed SHIIC and THSN circuit placed between the main and peaking transistors realise open circuit conditions at the third harmonic for both transistors at the saturation state and back‐off regions. Side by side with the aid of the properly designed post‐matching tuned network (PMTN), these harmonic loading conditions make both amplifiers to operate in continuous Class‐F modes with enhanced‐added efficiencies over wideband conditions. As a result, a succession of highly efficient DPA modes can be formed over a continuous frequency range in the full Doherty region, resulting in a reduced‐size enhanced power efficiency wideband DPA. For verification, a wideband DPA operating from 1.1 to 1.8 GHz was designed and implemented using the proposed topology. The measured drain efficiency of the implemented DPA at 6‐dB back‐off is 52.5%–67.5%, while the saturated power across the specified bandwidth is 43–43.7 dBm. The fabricated DPA exhibits an average efficiency of 48.7%–59.4%, when supplied by a 40‐MHz long‐term evolution (LTE) signal with a 7.5‐dB peak‐to‐average power ratio (PAPR). Performing digital pre‐distortion (DPD) improves the adjacent channel power ratio (ACLR) from −25.8 dBc to −47.6 dBc.

Compact 40% Fractional Bandwidth Doherty PA With Input Group Delay Engineering

This letter presents a wideband Doherty power amplifier (DPA) design based on the control of the relative input group delay between the carrier and peaking amplifiers. By reaching an appropriate input phase variation over the target bandwidth, frequency dispersion of load modulation is minimized and a less dispersive DPA at peak power is achieved. To validate this approach, a compact DPA with 50-dBm peak power is developed and shows 51%–57% drain efficiency at 8-dB output power back-off (OBO) with a small-signal gain of 14.4–17 dB over 1.8–2.7 GHz which represents 40% fractional bandwidth (FBW). Linearization of the prototype is proven using DPD correction with ACPR below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 60 dBc measured in single-band scenarios. Moreover, under 400 MHz of instantaneous bandwidth, the proposed DPA achieves ACPR below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 53 dBc with an average efficiency of 48%.

High‐efficiency wideband Doherty power amplifier based on two‐point impedance‐matching circuits

AbstractA novel wideband Doherty power amplifier with high‐drain efficiency is proposed in this paper. The triode CGH40010F is adopted in carrier amplifier and peak amplifier to realize the power amplification, respectively. The wide bandwidth is achieved by using the two‐point impedance matching circuit, which can be applied to achieve good matching of peak output power point and power back‐off point at the same time. The drain efficiency at peak output power point is greater than 55.8% and the maximum drain efficiency is 71.3%, while the peak output power is greater than 43.2 dBm (with an error of ±0.7 dBm) from 1.8 to 2.8 GHz. The drain efficiency at 6 dB power back‐off point is greater than 45.1% and the maximum drain efficiency is 63.2%.

Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application

This paper discusses the design of a wideband class AB-C Doherty power amplifier suitable for 5G applications. Theoretical analysis of the output matching network is presented, focusing on the impact of the non-ideally infinite output impedance of the auxiliary amplifier in back off, due to the device’s parasitic elements. By properly accounting for this effect, the designed output matching network was able to follow the desired impedance trajectories across the 2.8 GHz to 3.6 GHz range (fractional bandwidth = 25%), with a good trade-off between efficiency and bandwidth. The Doherty power amplifier was designed with two 10 W packaged GaN HEMTs. The measurement results showed that it provided 43 dBm to 44.2 dBm saturated output power and 8 dB to 13.5 dB linear power gain over the entire band. The achieved drain efficiency was between 62% and 76.5% at saturation and between 44% and 56% at 6 dB of output power back-off.

Broadband Doherty power amplifier with improved band‐pass auxiliary network

In this article, a Doherty power amplifier (DPA) with improved band-pass auxiliary impedance inverter is proposed for broadband operation. As a wideband DPA solution, the output matching networks of main and auxiliary devices are designed to achieve proper impedance matching at back-off and peak power by employing a two-point matching technique without the λ/4 impedance transformer. It is found that the modified band-pass network has broader bandwidth feature and is compact in form from the comparison with some different topologies of matching networks. So, it is more suitable to be the auxiliary transformer to achieve the broadband configuration of DPA. For validation purpose, a Doherty power amplifier based on two commercially available gallium nitride HEMT (Cree CGH 40010F) devices was designed, fabricated, and measured. Under the drive of continuous wave (CW) signal, the measurement results show that the DPA has a 6-dB back-off efficiency of 35% to 48% and a saturated efficiency of 44% to 64% within the frequency band from 1.50 GHz to 2.35 GHz, which is about 44% fractional bandwidth.

A new design procedure for wide band Doherty power amplifiers

A generalized design procedure for Doherty power amplifier (DPA) with arbitrary output back-off power level (OBO) is proposed in this study. This method which covers many of previously reported configurations is employed to derive analytical formulas for a specific output combiner which is capable for absorbing parasitic elements of the main and auxiliary transistors. Combiner parameters can be adjusted to control operational frequency bandwidth at back-off and saturation. By considering parasitic elements in the design procedure, the needs for additional offset lines and CAD optimization are eliminated and efficiency does not degrade significantly at back-off. According to the proposed design methodology, a wide band DPA is designed, simulated and implemented with commercial packaged GaN transistor. Drain efficiency (DE) between 50 and 77% at 6 dB OBO and 57.5–80.4% at saturation in the frequency band of 1.05–2.35 (GHz) (76.4% fractional bandwidth) are achieved corresponding to the maximum output power and gain within 43–45.3 dBm and 11–13.3 dB, respectively. Gain fluctuation is lower than 0.6 dB for frequencies higher than 1.4 GHz. Combination of high efficiency, excellent power utilization factor and flat gain through an analytical design strategy introduces this method as a promising way to design wide band DPAs.

Generalized Theory and Design Methodology of Wideband Doherty Amplifiers Applied to the Realization of an Octave-Bandwidth Prototype

This paper derives a novel continuum of Doherty power amplifier (PA) solutions with enhanced load modulation over an extended RF bandwidth. It is analytically shown that Doherty PAs with efficiency peaks at maximum power and at an arbitrary back-off level can be achieved with numerous configurations of output power combiner. Generalized governing equations for carrier and peaking transistor current ratios, voltage profiles, and biasing conditions are derived in order to assess the performance of any Doherty amplifier configuration. The generalization demonstrates the impact of the selection of the output combiner on PA performance and highlights the tradeoffs between the different solutions. A wideband Doherty PA was designed based on the proposed methodology and implemented using packaged gallium nitride transistors. Over the frequency band of 0.55–1.10 GHz, the Doherty PA exhibited drain efficiency in excess of 40% and 56% at 6-dB output power back-off (OPBO) and peak power, respectively. The Doherty PA was successfully linearized when driven with modulated stimulus and achieved average drain efficiency above 40% at 7.1-dB OPBO.

Augmented radial basis function neural network predistorter for linearisation of wideband power amplifiers

An augmented radial basis function neural network (ARBFNN) is proposed for modelling and linearising a wideband Doherty power amplifier (DPA) with strong memory effects and static nonlinearity. To evaluate the performance of the ARBFNN, a 51 dBm DPA and a 25 MHz mixed test signal were used in modelling and linearisation measurement. Compared with the memory polynomial (MP) model and the real-valued time-delay neural network (RVTDNN), the ARBFNN is highly effective, leading to 3 and 5 dB improvements in the normalised mean square error. More importantly, the ARBFNN predistorter represents a significant improvement over the RVTDNN and MP in the suppression of the out-of-band spectral regrowth. In addition, the ARBFNN has a similar linearisation capability as the generalised MP model, but has much better numerical stability.

Design of GaN Doherty Power Amplifiers for Broadband Applications

This letter presents a modified Doherty power amplifier (DPA) architecture to release bandwidth limitation of the conventional DPA. The proposed DPA structure eliminates two quarter wavelength impedance inverters used in the conventional DPAs. Instead, both the carrier and peak amplifiers in the proposed DPA are matched to 70 Ω at the output ports, which enables an easier implementation of broadband matching networks. Broadband input matching network (IMN) and output matching network (OMN) are then designed to achieve wideband DPA with enhanced performance. To verify the design concept, a broadband DPA is designed, fabricated, and measured on a RT/Duroid 5880 substrate with 2.2 dielectric constant and 0.787 mm substrate thickness. In the working frequency bands (0.8 to 1.2 GHz), the designed DPA provides 50.8% to 78.5% power-added efficiency (PAE) at full output power, 30.3% to 40.1% PAE at 6 dB of output power back-off (OBO), 10.8 to 14.8 dB gain (the gain variation is within 2.6 dB over different input power levels at each specific frequency), and maximum output power between 40.2 and 42.9 dBm.

A Nonlinear Filter-Based Volterra Model With Low Complexity for Wideband Power Amplifiers

A nonlinear filter-based Volterra model with low complexity is proposed for modeling and characterizing wideband power amplifiers. This model has a similar form of a simplified second-order dynamic deviation reduction (DDR)-based Volterra model but without complex square root calculations and high order terms, which are replaced by a first-order nonlinear filter. The model parameters with smaller magnitude distribution range and lower precision in storing and calculation can be estimated by least-square method, and then the model has lower complexity than the second-order simplified DDR Volterra model. Experimental results verified that good performance and lower complexity can be achieved by using this model for a wideband Doherty power amplifier. Finally, the model is employed to compensate the nonlinearity of the Doherty power amplifier, and over 12 dB adjacent channel leakage ratio (ACLR) improvement is achieved for a five-carrier long-term evolution advanced (LTE-A) signal of 100 MHz bandwidth.

A Wideband Doherty Power Amplifier With 100 MHz Instantaneous Bandwidth for LTE-Advanced Applications

In this letter, a 698-862 MHz wideband Doherty power amplifier (DPA) with 100 MHz instantaneous bandwidth is presented. The electrical memory effect of the wideband DPA is reduced by the LC resonant circuits employed in the drain bias networks. The influence of the integrated Doherty combiner is compensated by the broadband output matching networks, which were designed by applying the simplified real frequency technique. Driven with 100 MHz LTE-advanced signals, the adjacent channel leakage ratio (ACLR) and ACLR asymmetry of the proposed DPA at 20 MHz offset are improved by about 4 dB and 3 dB respectively, compared to the wideband DPA with conventional bias networks. After digital predistortion (DPD) linearization, the proposed DPA shows an ACLR of lower than -48 dBc at an average output power of 42.5 dBm, and high drain efficiency of over 42% across the operating frequency range.