Abstract
A generalized design procedure for Doherty power amplifier (DPA) with arbitrary output back-off power level (OBO) is proposed in this study. This method which covers many of previously reported configurations is employed to derive analytical formulas for a specific output combiner which is capable for absorbing parasitic elements of the main and auxiliary transistors. Combiner parameters can be adjusted to control operational frequency bandwidth at back-off and saturation. By considering parasitic elements in the design procedure, the needs for additional offset lines and CAD optimization are eliminated and efficiency does not degrade significantly at back-off. According to the proposed design methodology, a wide band DPA is designed, simulated and implemented with commercial packaged GaN transistor. Drain efficiency (DE) between 50 and 77% at 6 dB OBO and 57.5–80.4% at saturation in the frequency band of 1.05–2.35 (GHz) (76.4% fractional bandwidth) are achieved corresponding to the maximum output power and gain within 43–45.3 dBm and 11–13.3 dB, respectively. Gain fluctuation is lower than 0.6 dB for frequencies higher than 1.4 GHz. Combination of high efficiency, excellent power utilization factor and flat gain through an analytical design strategy introduces this method as a promising way to design wide band DPAs.
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