Wafer Defect Research Articles

Structural Design and Simulation of a Multi-Channel and Dual Working Condition Wafer Defect Inspection Prototype.

Detecting and classifying defects on unpatterned wafers is a key part of wafer front-end inspection. Defect inspection schemes vary depending on the type and location of the defects. In this paper, the structure of the prototype is designed to meet the requirements of wafer surface and edge defect inspection. This prototype has four inspection channels: scattering, reflection, phase, and contour, with two working conditions: surface and edge inspection. The key structure of the prototype was simulated using Ansys. The simulation results show that the maximum deformation of the optical detection subsystem is 19.5 μm and the fundamental frequency of the prototype is 96.9 Hz; thus, these results meet the requirements of optical performance stability and structural design. The experimental results show that the prototype meets the requirements of the inspection sensitivity better than 200 nm equivalent PSL spherical defects.

Design and Implementation of an Ellipsometer Inspection System that Conforms to the Wafer’s MI Process in the Production Process

Due to the recent semiconductor yield issue, the proportion of the MI (Measurement, Inspection) process in the semiconductor industry is rapidly growing. Mass production of one wafer takes enormous cost and time, and due to the nature of wafers, defective wafers cannot be reused, which causes enormous losses. In this study, we propose an inspection method system using an ellipsometer for the wafer MI process. It is expected that cost reduction in semiconductor production can be achieved by making wafer defect inspection more efficient.

Self-Assured Deep Learning With Minimum Pre-Labeled Data for Wafer Pattern Classification

Data quality plays an important role during the training stage of machine/deep learning models. The annotation hinges on the experiences of domain experts. To acquire the experts knowledge in the context of machine learning, manual data labeling, a tedious and time-consuming task in supervised learning, should be given a top priority. However, the domain experts in the line of plentiful manual annotation may easily get distracted or fatigued after long-time work, causing judgment errors, mislabeling, etc. The pattern recognition of wafer defect map is investigated in this paper, the primary goal of which is to train the convolutional neural network (CNN) model through a very limited number of manually labeled data so that the trained model is capable of performing pseudo labeling. Subsequently, a self-assured adaptive ensemble learner in terms of a series of shallow neural networks is proposed to filter wafer map samples with untrusted pseudo-labels. In the result, the amount of human annotations is significantly reduced by 61% for training a highly accurate classifier. A minimum number of manually labeled data is suggested while the equally high classification performance of wafer defect pattern is maintained. For the evaluation purpose, the proposed self-assured learning is compared with the confidence learning.

Pre-trained CNN-based TransUNet Model for Mixed-Type Defects in Wafer Maps

Classifying the patterns of defects in semiconductors is critical to finding the root cause of production defects. Especially as the concentration density and design complexity of semiconductor wafers increase, so do the size and severity of defects. The increased likelihood of mixed defects makes finding them more complex than traditional wafer defect detection methods. Manually inspecting wafers for defects is costly, creating a need for automated, artificial intelligence (AI)-based computer vision approaches. Previous research on defect analysis has several limitations, including low accuracy. To analyze mixed-type defects, existing research requires a separate model to be trained for each defect type, which is not scalable. In this paper, we propose a model for segmenting mixed defects by applying a pre-trained CNN-based TransUNet using N-pair contrastive loss. The proposed method allows you to extract an enhanced feature by repressing extraneous features and concentrating attention on the defects you want to discover. We evaluated the model on the Mixed-WM38 dataset with 38,015 images. The results of our experiments indicate that the suggested model performs better than previous works with an accuracy of 0.995 and an F1-Score of 0.995.

Non-destructive identification of edge-component burgers vector of threading dislocations in SiC wafers by birefringence imaging

Non-destructive characterization of crystalline defects in SiC wafers is important for manufacturing high-performance SiC power devices with high productivity. The present study shows that the edge component of the Burgers vector can be identified by birefringence imaging under conditions deviating slightly from the crossed-Nicols condition and by calculation of the in-plane shear stress distribution. It is also found that the combination of birefringence observation and X-ray topography allows the discrimination of the family of threading screw dislocations. The present results will further the understanding of the relationship between defect structure and the properties of SiC power devices.

Wafer defect recognition method based on multi-scale feature fusion.

Wafer defect recognition is an important process of chip manufacturing. As different process flows can lead to different defect types, the correct identification of defect patterns is important for recognizing manufacturing problems and fixing them in good time. To achieve high precision identification of wafer defects and improve the quality and production yield of wafers, this paper proposes a Multi-Feature Fusion Perceptual Network (MFFP-Net) inspired by human visual perception mechanisms. The MFFP-Net can process information at various scales and then aggregate it so that the next stage can abstract features from the different scales simultaneously. The proposed feature fusion module can obtain higher fine-grained and richer features to capture key texture details and avoid important information loss. The final experiments show that MFFP-Net achieves good generalized ability and state-of-the-art results on real-world dataset WM-811K, with an accuracy of 96.71%, this provides an effective way for the chip manufacturing industry to improve the yield rate.

Ultrathin silicon wafer defect detection method based on IR micro-digital holography.

Ultrathin silicon wafers are key components of wearable electronic devices and flexible electronics. Defects produced during the preparation process of ultrathin silicon wafers have a great influence on the electronic performance. A high-precision, nondestructive, and rapid damage detection method is urgently needed. IR digital holography has the advantage of being insensitive to visible light and environmental interference. In addition, micro-holography can achieve micro-target scaling with large range scaling. An ultrathin silicon wafer defect detection method of IR micro-digital holography is proposed in this paper for what we believe is the first time. Using the proposed defect detection method based on holography, the detection accuracy reached the submicron level.

A Momentum Contrastive Learning Framework for Low-Data Wafer Defect Classification in Semiconductor Manufacturing

Wafer bin maps (WBMs) are essential test data in semiconductor manufacturing. WBM defect classification can provide critical information for the improvement of manufacturing processes and yield. Although deep-learning-based automatic defect classification models have demonstrated promising results in recent years, they require a substantial amount of labeled data for training, and manual labeling is time-consuming. Such limitations impede the practical application of existing algorithms. This study introduces a low-data defect classification algorithm based on contrastive learning. By employing momentum contrastive learning, the network extracts effective representations from large-scale unlabeled WBMs. Subsequently, a prototypical network is utilized for fine-tuning with only a minimal amount of labeled data to achieve low-data classification. Experimental results reveal that the momentum contrastive learning method improves the defect classification performance by learning feature representation from large-scale unlabeled data. The proposed method attains satisfactory classification accuracy using a limited amount of labeled data and surpasses other comparative methods in performance. This approach allows for the exploitation of information derived from large-scale unlabeled data, significantly reducing the reliance on labeled data.

Silicon wafer defect pattern detection using machine learning

A silicon integrated circuit has been created on silicon wafers by diffusing doping materials on the surface of the same. The silicon wafer is a thin disk made from semiconductor material (mostly ultrapure silicon). Silicon chip fabrication is an industrial process; hence defects occur on silicon wafers caused by unclean factory environment, production machine errors and fabrication process errors. The accurate classification of wafer defects provides information for engineers through regular patterns in the processes. Manual inspection of every chip is not economically feasible. In this study, WM-811k is used as the dataset. This is one of the most extensive wafer bin map dataset available open source on kaggle. It was created by MIRLABS. The dataset was compiled by taking the test data on 811,457 silicon wafer, in which each wafer map image was collected from real-world fabrication. A CNN and DNN model is used to classify the defect patterns.

Effective Variational-Autoencoder-Based Generative Models for Highly Imbalanced Fault Detection Data in Semiconductor Manufacturing

In current semiconductor manufacturing, limited raw trace data pertaining to defective wafers make fault detection (FD) assignments extremely difficult due to the data imbalance in wafer classification. To mitigate, this paper proposes using a variational autoencoder (VAE) as a data augmentation strategy for resolving data imbalance of temporal raw trace data. A VAE with few defective samples is first trained. By means of extracting the latent variables that characterize the distribution of the defective samples, we make use of the statistical randomness of the latent variables to generate synthesized defective samples via the decoder scheme in the trained VAE. Two data representations and VAE modeling strategies, concatenation of multiple and individual raw trace data as the input of the VAE during the training stage, are investigated. A real-data plasma enhanced chemical vapor deposition (PECVD) process having only few defective samples is used to illustrate the performance enhancement to wafer classification arising from the proposed data augmentation framework. Based on the computational comparisons between noted classification models, the proposed generative VAE model via the individual strategy enables the adaptive boosting (AdaBoost) classifier to achieve perfect performances in every metrics if the 80% and 100% over-sampling ratios are adopted.

Microscopic stress analysis of nanoscratch induced sub-surface defects in a single-crystal silicon wafer

The existing stress criterion assumes the material to be isotropic and only distinguishes elastic, plastic, and crack zones, to explain the scratching-induced sub-surface defects during the contact loading processes such as nanoindentation, nanoscratching, and grinding. However, anisotropic single-crystal materials such as monocrystalline silicon and silicon carbide have more diverse defect characteristics and sub-surface defects in these materials cannot be well explained and predicted using the existing criterion. In this study, a thorough microscopic characterisation and complementary stress analysis were performed on a single-crystal silicon wafer during nanoscratching. A novel criterion based on mechanism of dislocation multiplication and propagation was proposed and validated, providing a better understanding of sub-surface defects prediction in silicon. Compared to conventional sub-surface defects models, this new shear stress-based criterion can accurately predict the position and extent of dislocations in silicon. The dislocations layout for scratching along any direction on the (100) surface of Si were further discussed to offer a comprehensive understanding of the effect of anisotropic structure of single-crystals on the sub-surface defects. The improved understanding of inelastic deformation in single-crystal silicon, which was revealed by this new model, will have a significant impact on the nanomanufacturing sector by guiding the contact mode experiments (grinding, indentation, machining) towards efficient machining.

Review of Wafer Surface Defect Detection Methods

Wafer surface defect detection plays an important role in controlling product quality in semiconductor manufacturing, which has become a research hotspot in computer vision. However, the induction and summary of wafer defect detection methods in the existing review literature are not thorough enough and lack an objective analysis and evaluation of the advantages and disadvantages of various techniques, which is not conducive to the development of this research field. This paper systematically analyzes the research progress of domestic and foreign scholars in the field of wafer surface defect detection in recent years. Firstly, we introduce the classification of wafer surface defect patterns and their causes. According to the different methods of feature extraction, the current mainstream methods are divided into three categories: the methods based on image signal processing, the methods based on machine learning, and the methods based on deep learning. Moreover, the core ideas of representative algorithms are briefly introduced. Then, the innovations of each method are compared and analyzed, and their limitations are discussed. Finally, we summarize the problems and challenges in the current wafer surface defect detection task, the future research trends in this field, and the new research ideas.

Tuning electrical properties in Ga2O3 polymorphs induced with ion beams

Ion beam fabrication of metastable polymorphs of Ga2O3, assisted by the controllable accumulation of the disorder in the lattice, is an interesting alternative to conventional deposition techniques. However, the adjustability of the electrical properties in such films is unexplored. In this work, we investigated two strategies for tuning the electron concentration in the ion beam created metastable κ-polymorph: adding silicon donors by ion implantation and adding hydrogen via plasma treatments. Importantly, all heat treatments were limited to ≤600 °C, set by the thermal stability of the ion beam fabricated polymorph. Under these conditions, silicon doping did not change the high resistive state caused by the iron acceptors in the initial wafer and residual defects accumulated upon the implants. Conversely, treating samples in a hydrogen plasma converted the ion beam fabricated κ-polymorph to n-type, with a net donor density in the low 1012 cm−3 range and dominating deep traps near 0.6 eV below the conduction band. The mechanism explaining this n-type conductivity change may be due to hydrogen forming shallow donor complexes with gallium vacancies and/or possibly passivating a fraction of the iron acceptors responsible for the high resistivity in the initial wafers.

Fault Detection in Semiconductor Industry: ABCtronics

The high prevalence of electronic devices over the past fifty years has fueled the extraordinary rise of the semiconductor industry. The manufacture of semiconductor wafers is a time-consuming and delicate process in which defects might arise and cause the failure of the entire circuit. As more complicated devices generate flaws that are tiny and harder to detect [8], innovations in wafer defect inspection technologies are in high demand. Traditional machine learning approaches, such as univariate and multivariate analyses, have been utilized for a long time as a method for developing defect detection models [3][4]. The virtual firm and data resource are provided by case of virtual company ABCtronics. Nonetheless, obstacles provide possibilities for creativity. In the face of the development of technology, a company's troubles have equal potential to completely wipe it out and propel it to success. The focus of this investigation is on the limitations of the technologies currently used in semiconductor manufacture. The research concludes that loyal clients lead to successful businesses.

Using machine learning with optical profilometry for GaN wafer screening

To improve the manufacturing process of GaN wafers, inexpensive wafer screening techniques are required to both provide feedback to the manufacturing process and prevent fabrication on low quality or defective wafers, thus reducing costs resulting from wasted processing effort. Many of the wafer scale characterization techniques—including optical profilometry—produce difficult to interpret results, while models using classical programming techniques require laborious translation of the human-generated data interpretation methodology. Alternatively, machine learning techniques are effective at producing such models if sufficient data is available. For this research project, we fabricated over 6000 vertical PiN GaN diodes across 10 wafers. Using low resolution wafer scale optical profilometry data taken before fabrication, we successfully trained four different machine learning models. All models predict device pass and fail with 70–75% accuracy, and the wafer yield can be predicted within 15% error on the majority of wafers.

Wavelet integrated attention network with multi-resolution frequency learning for mixed-type wafer defect recognition

Wafer defect recognition has been an important measure in developing the manufacturing process. In real-life manufacturing, however, defects can be complicated, and their wafer maps are often accompanied by noise. This encourages us to build a noise-robust framework with outstanding performance and sound interpretability on defect recognition. Therefore, this paper chooses discrete wavelet transform for its clear physical meaning and ability of frequency learning. Moreover, it outperforms traditional down-sampling operations in the preservation of fringe information. Based on this, we propose a multiresolution wavelet integrated attention network (MRWA-Net). Specifically, we design a learnable discrete wavelet transform layer (DWT-Layer), which expands convolutional neural network’s (CNN’s) feature learning space to the wavelet domain. This helps the framework procure hidden information from different frequency components and their location information. Furthermore, we utilize different levels of wavelet transform to interpret the images with different resolutions, thus learning features from different perspectives. Additionally, we insert a frequency-location attention module (FLA) to select the useful frequency-location information captured by DWT-Layer. The proposed approach is evaluated on a dataset with 38015 subjects and 38 types of defects and reaches 98.84% accuracy. To demonstrate the noise-robustness of our framework, we further compare it with other state-of-the-art methods on wafer maps with different ratios of additional noise. The results show that our framework excels other methods under all noise ratios and exhibits more notable excellence on data accompanied by a higher ratio of noise. Finally, we present visualizing analysis to demonstrate that the proposed DWT-Layer can learn from different frequency bands and retrieve information with multiple resolutions.

Classification of Wafer Defects with Optimized Deep Learning Model

Classification of Wafer Defects with Optimized Deep Learning Model

Extended Defects in SiC: Selective Etching and Raman Study

Controlling the electrical properties of SiC requires knowledge of the nature and properties of extended defects. We have employed orthodox defect-selective etching and photo-etching methods to reveal typical and new structural defects in commercial SiC wafers. For photo-etching, the etch rate increases as the free carrier concentration decreases. The etch rate can be used to estimate the free carrier concentration with higher precision, and over a larger lateral and depth range than that accessed by Raman scattering. The logarithmic dependence of the etch rate on the free carrier concentration has been characterized.

Development of High-Resolution Nuclear Emulsion Plates for Synchrotron X-Ray Topography Observation of Large-Size Semiconductor Wafers

Characterization of defects in semiconductor wafers is essential for the development and improvement of semiconductor devices, especially power devices. X-ray topography (XRT) using synchrotron radiation is a powerful methods used for defect characterization. To achieve detailed characterization of large-size semiconductor wafers by synchrotron XRT, we have developed nuclear emulsion plates reaching a high-resolution and wide dynamic range. We have shown that higher-resolution XRT images could be obtained using emulsions with smaller iodobromide crystals, and demonstrated clear observation of threading edge dislocations in a SiC epitaxial layer having small contrast. Furthermore, we demonstrated XRT image acquisition for almost all of a 150-mm SiC wafer with one plate. Our development will contribute to advances in electronic materials, especially in the field of power electronics, in which defect characterization is important for improving the performance and yield of devices.

Composite Wafer Defect Recognition Framework Based on Multiview Dynamic Feature Enhancement With Class-Specific Classifier

Wafer defect pattern recognition is important for the manufacturing of semiconductor products. By recognizing the type of defect, the engineer can optimize the process of semiconductor manufacturing. Due to the complexity of the manufacturing process, composite defect types can occur on a single wafer map. As a result, there are even more than 30 defect types in real-life, which greatly increases the difficulty of recognizing. To address this problem, we propose a composite wafer defect recognition framework (CWDR-Net) based on a multi-view dynamic feature enhancement (MVDFE) module with a class-specific classifier. This framework can selectively extract information from the defect pattern, and class-specifically recognize each basic defect type. Specifically, the proposed MVDFE-Module can view the feature from 3 different perspectives and dynamically enhance it accordingly. In addition, the proposed framework applies a class-specific classifier that uses an attention mechanism to recalibrate the feature for each type of basic defect respectively. A real dataset with 8 basic single-type defects, and 29 mixed-type composite defects is used to evaluate this framework. The results show that the proposed framework can effectively recognize composite defects and outperform other state-of-the-art methods.