Wafer Bias Research Articles

Ion motion above a biased wafer in a plasma etching reactor

The behavior of ions in the plasma is an essential component in the process of industrial etching. We studied the motions and energy distribution of argon ions in a inductively coupled plasma (ICP) etching tool, by the method of laser induced fluorescence (LIF). The silicon wafer clamped to a chuck at the bottom of the chamber was biased with a 1 MHz 1–1.2 kV peak-to-peak sinusoidal voltage. The plasma is formed with a 2 MHz ICP coil pulsed at 10 Hz. Sheath thickness was measured at different phases of the bias waveform. The experiment also compared the ion motions with and without wafer bias, as well as different switch-on time of wafer bias. For all cases, ion energy distribution functions and the two-dimensional flow pattern were studied near the center and edge of the wafer. Significant vortex flows were observed near the wafer edge. Experiments in which the wafer was biased in the plasma afterglow resulted in a narrow distribution of ion energy close to the bias voltage at the vicinity of the wafer, and the ion incident angle on the wafer was the smallest. The results were compared to simulations using the Hybrid Plasma Equipment Model code.

Characterization of silane based ultra-thin barrier deposited at elevated temperature

In this work, we describe a quick turn-around characterization approach of ultra-thin layers on low dielectric constant (Low-K) interlevel dielectric using Electrochemical Impedance Spectroscopy (EIS). It is demonstrated on an organo-silane based ultra-thin Cu barrier layer, deposited from liquid phase at elevated temperatures, 90 °C - 150 °C, using high flash temperature solvents: N-methyl-2-pyrrolydone (NMP, Tflash-point = 91 °C) or Ethylene glycol (EG, Tflash-point = 116 °C). Three Silane (Head group) based monomers; with three different tail groups (e.g. amine, aniline and methacrylate) were investigated; The elevated temperature deposition process allowed shorter deposition times (less than 15 min), compared to previous publications. Additionally, the high flash point solvents reduce the risk of spontaneous explosion or ignition. All three monomers yielded satisfactory barrier against copper transport, being tested for more than 10 h at temperature higher than 400 °C, on all substrates. The need for a quick turn-around and a simple way to determine the barrier presence, its thickness and its coverage, lead to explore the application of Electrochemical Impedance Spectroscopy (EIS). We demonstrate the capability of that method estimating thickness and coverage of such ultra-thin barriers deposited on relatively thick (~200 nm) Low-K dielectric materials. It was found that EIS below 10 Hz at negative wafer bias vs. the electrolyte reference, the impedance real part was affected by the ultra-thin layer on thick dielectric materials allowing to define an Effective Electrical Coverage (EEC) of the films on Low-K dielectric similar to what has already been defined on bare silicon. The EEC is a figure of merit and its relation to the actual surface coverage, and barrier properties, is briefly discussed.

Mechanism of highly selective SiO2 etching over Si3N4 using a cyclic process with BCl3 and fluorocarbon gas chemistries

A cyclic process using BCl3 and fluorocarbon gas chemistries was investigated for patterning a fine structure with a space width of 20 nm level. The relationships between etching parameters and cross-sectional pattern profiles were also analyzed to control the pattern profiles. This process alternately performs two steps: a deposition step using BCl3/N2/Ar plasma and an etching step using BCl3/CF4/Ar plasma with applying a wafer bias. The mechanism of the cyclic process was investigated by analyzing the surface chemistry at each step. Optical emission was also measured to clarify the reaction between F radicals and BClx radicals. The authors found the BClx layer formed on Si3N4 at the deposition step protected Si3N4 from etching by the reaction of BClx with CFx and F radicals at the etching step. Highly selective etching achieved a fine pattern structure by using BCl3/CF4/Ar plasma at the etching step. F radicals generated by the BCl3/CF4/Ar plasma had been scavenged by BClx radicals forming BFx to inhibit the Si3N4 etching effectively. In addition, B and BClx components adsorbed on the Si3N4 surfaces during the etching step protected Si3N4 from etching by reaction with F and CFx radicals. The adsorbed B and BClx desorbed from the surfaces by forming BFx, BClxF, and CClx, which remained on the Si3N4 surface. In contrast, the BClx layer became thinner on SiO2 than that on Si3N4 to promote ion-assisted etching of SiO2. This is because the BClx component has high reactivity with SiO2, and the remained CClx component was also consumed by the etching reaction with SiO2. The authors also found that ion flux at the etching step should be controlled to etch without shoulder loss, and ion energy at the etching step should be controlled to etch without footing shape at the bottoms of the pattern.

잡음전력비를 이용한 온-웨이퍼형 DUT의 잡음상관행렬 측정

In this paper, we propose a method for defining the input termination for on-wafer-type device under test (DUT) measurement. Using the newly defined input termination and noise wave correlation matrix (NWCM) measurement method based on noise power ratio, the NWCM of the on-wafer-type DUT was measured. We demonstrate a noise measurement configuration that includes wafer probes and bias tees to measure the on-wafer DUT. The S-parameter of the adapter that combines the bias tee, probe, and a line terminated by open is required to define the input termination for on-wafer DUT measurement. To measure the S-parameter of the adapter, a 2-port S-parameter measurement method using 1-port measurement is introduced. Using the measured S-parameters, a method for defining the new input termination for on-wafer-type DUT measurement is applied. The proposed method involves the measurement of the NWCM of the chip with a 1.5 dB noise figure. The noise parameters of the chip were obtained using the measured NWCM. The results indicate that the obtained values of the noise parameters are similar to those mentioned on a datasheet for the chip. In addition, repeated measurements yielded similar results, thereby confirming the reliability of the measurements.

Relationship between formation of surface-reaction layers and flux of dissociated species in C4F8/Ar plasma for SiO2 etching using pulsed-microwave plasma

The mechanism of highly selective etching of SiO2 using pulsed-microwave electron-cyclotron-resonance plasma was investigated by analyzing the relationship between plasma dissociations and fluorocarbon layers formed on surfaces during etching with a cyclo-C4F8/Ar gas mixture. Dissociated molecules of CxFy and CFx species were measured without fragmentations using ion attachment mass spectrometry, and both thicknesses and atomic concentrations of reaction layers formed on etched surfaces were analyzed using x-ray photoelectron spectroscopy. Thus, the impact of CxFy molecules on the formation of fluorocarbon layers were analyzed using this measurement system. The authors found that the process window of highly selective etching of SiO2 over Si was enlarged by using pulsed-microwave plasma because a thinner fluorocarbon layer was formed by controlling C4F8 dissociation by changing the duty cycle of the pulsed-microwaves. With conventional continuous plasma, an etch stop occurred at low wafer bias conditions because a thicker fluorocarbon layer, which protects the SiO2 surface from the ion bombardment, was formed on the SiO2 surface. The thicker fluorocarbon layer was formed from a large amount of CxFy species, such as C2F2, which were generated in the highly dissociated continuous plasma. On the contrary, with pulsed plasma, a thinner fluorocarbon layer was formed due to the lower flux of CxFy species because the dissociation of C4F8 was controlled by reducing the duty cycle of the pulsed-microwave plasma. As a result, the process window was enlarged to the low wafer bias conditions using the pulsed-microwave plasma.

Analysis of surface-reaction layers formed by etching Si3N4 with pulsed-microwave plasma

The mechanism of highly selective etching of Si3N4 by a pulsed-microwave electron-cyclotron-resonance plasma was investigated by analyzing surface-reaction layers formed by etching using a CH3F/O2/Ar gas chemistry. A hydrofluorocarbon (HFC) layer formed not only on nonpatterned materials (Si3N4 and others) but also at the bottoms of line-and-space patterns were analyzed by X-ray photoelectron spectroscopy. Thermal reactivity between the HFC layer and the Si3N4 layer was also investigated by thermal-desorption spectroscopy. The investigation results show that nitrogen contained in the Si3N4 layer thermally reacted with the HFC layer to form NH3 or HCN, and silicon contained in Si3N4 had high reactivity with fluorine contained in the HFC layer. Owing to the high reactivity between the fluorine-rich HFC layer and the Si3N4 layer in the pulsed-microwave plasma, the HFC layer became thin, even at a low wafer bias, and thus promoted ion-assisted etching. A wide process window was provided by the formation of the fluorine-rich thin HFC layer using the pulsed-microwave plasma.

Surface analysis of polysilicon gate etching by pulsed-microwave plasma

The mechanism of highly selective etching by a pulsed-microwave electron-cyclotron-resonance plasma was investigated by analyzing surface-reaction layers formed on nonpatterned poly-Si and SiO2 samples and gate-patterned samples with a gate width of 32 nm. The samples were etched by using an HBr/O2/Ar/CH4 gas chemistry and varying the duty cycle of the pulsed microwave. The reaction layers, which were revealed as a hydrocarbon layer on a SiBrxOy layer, were analyzed by X-ray photoelectron spectroscopy. The upper layer was a hydrocarbon layer, which protected SiO2 from ion bombardment and also prevented Br flux from being supplied to the SiO2. The lower layer was a SiBrxOy layer, which suppressed the etching of the underlying Si substrate. The formation of the hydrocarbon layer was controlled by the duty cycle of the microwave plasma. Etch stop, which occurred at a low peak-to-peak voltage (wafer bias) of the continuous microwave plasma, was prevented by controlling the thickness of the hydrocarbon layer in the pulsed-microwave plasma. Gate-oxide punch-through, which occurred at a high peak-to-peak voltage of wafer bias in the case of the continuous microwave plasma, was also prevented in the case of the pulsed microwave plasma by forming reaction layers with high C/Br ratio.

Influence of Oxygen Addition and Wafer Bias Voltage on Bromine Atom Surface Reaction in a HBr/Ar Inductively Coupled Plasma

The influence of the wafer surface material and wafer bias voltage on the Br radical density in HBr/Ar and HBr/Ar/O2 inductively coupled plasmas was investigated by appearance mass spectrometry. By increasing the bias voltage, a monotonic decrease in the Br radical density was observed irrespective of the surface material (Si, Al2O3) of the wafer. A drastic increase in Br radical density was observed after O2 addition to HBr/Ar plasma in the case of a bare Si wafer, whereas almost the same density was observed in the case of an Al2O3-sputtered Si wafer. X-ray photoelectron spectroscopy (XPS) analysis indicated that O2 addition promotes oxide formation on the Si surface. Measurement of the decay time constant for a Br radical after turning off the plasma indicated that O2 addition results in a longer decay time constant, suggesting the decrease of the surface loss probability of Br radicals for the surface-oxidized Si surface.

Negative Impact of Etched Si Area on Selectivity and Positive Impact of Photoelectric Current on Etched Profile in Gate Etching with Different Wafer Bias Frequencies

The effect of wafer-bias frequency on the dummy-gate fabrication of fin-shaped field-effect transistor (Fin-FET) was investigated. The clear difference in the selectivity of polycrystalline silicon to SiO2 between 400 kHz and 13.56 MHz decreased when the etched Si area increased. On the other hand, a higher frequency increased such selectivity when Si area decreased. These results can be explained by the effect of by-product deposition. As for the etched profile, the amount of side etching was much larger at 13.56 MHz than at 400 kHz. It was reported that this phenomenon is caused by local charging. It was also suggested that the charging should be suppressed by reducing the ratio of ion saturation current to photoelectric current. Therefore, in this study, we investigated the effect of such current ratio on side etching. The result confirmed that a reduction in current ratio induced by increasing gas pressure decreases the amount of side etching.

Behavior of Dust Particles in Plasma Etching Apparatus

The behavior of dust particles in a plasma etching apparatus was investigated with an in-situ particle monitor. The properties of the particles are classified into three types according to the particle velocity. Slow-velocity particles (less than 1 m/s) are trapped by a plasma-sheath boundary and rarely fall on the wafer during plasma discharge. These particles should be removed from the region above the wafer before turning off the plasma. Increasing gas flow rate and changing plasma density distribution are effective to control the particle transport. Medium-velocity particles (a few meters per second) travel above the wafer surface due to a balance between ion drag and electrostatic forces during plasma discharge. The number of particles that attach to the wafer can be reduced by supplying wafer bias power for the purpose of increasing the electrostatic force. Fast-velocity particles (a few dozen meters per second or more) are generated by the reflection of particles in a turbo molecular pump (TMP), and these may damage fine patterns on the wafer by colliding with it. The fine pattern damage can be reduced by increasing the distance between the wafer and the TMP. The number of particles fall on the wafer is decreased by supplying down-flow gas. It is therefore important to decelerate fast-velocity particles by using gas viscous force.

Effects of Ionizing Radiation on Digital Single Event Transients in a 180-nm Fully Depleted SOI Process

Effects of ionizing radiation on single event transients are reported for Fully Depleted SOI (FDSOI) technology using experiments and simulations. Logic circuits, i.e. CMOS inverter chains, were irradiated with cobalt-60 gamma radiation. When charge is induced in the n-channel FET with laser-probing techniques, laser-induced transients widen with increased total dose. This is because radiation causes charge to be trapped in the buried oxide, and reduces the p-channel FET drive current. When the p-channel FET drive current is reduced, the time required to restore the output of the laser-probed FET back to its original condition is increased, i.e. the upset transient width is increased. A widening of the transient pulse is also observed when a positive bias is applied to the wafer without any exposure to radiation. This is because a positive wafer bias reproduces the shifts in FET threshold voltages that occur during total dose irradiation. Results were also verified with heavy ion testing and mixed mode simulations.

Ge2Sb2Te5 Film Deposition and Properties

AbstractMagnetron sputter deposition of Ge2Sb2Te5 film is presented. Good thermal control of the wafer is found critical for maintaining process repeatability. In-situ wafer heating conditions have strong impact on as-deposited Ge2Sb2Te5 film properties such as resistivity, density, stress, composition, and microstructure. The effects of wafer bias and sputtering pressure are also discussed.

Plasma Etch Rates of Porous Silica Low-k Films with Different Dielectric Constants

The reactive ion etch rates of porous silica films with different dielectric constants (k-values) or film densities were measured by varying wafer bias and gas ratio for Ar/C5F8/O2 plasma. Both the etch rates of porous silica films and the optical emission intensities from the etching products (SiF) increased with wafer bias power. Etch rate increased with decreasing k-value of porous silica, whereas SiF emission intensity was maintained constant regardless of k-value, indicating that the amount of etching products escaping from the porous silica surface to the gas phase remained unchanged. From this result it is concluded that mass etch rate, defined as the weight of a porous silica film etched from a unit area per unit time, is constant for Ar/C5F8/O2 plasma.

Self-Consistent Particle Modeling of Inductively Coupled CF4 Plasmas: Effect of Wafer Biasing

The structure of axisymmetrical inductively coupled CF4 plasmas with wafer biasing was examined by the particle-in-cell/Monte Carlo method. The simulation was performed under the conditions that gas pressure is fixed at 5 mTorr and power deposition is fixed at 200 W. The effect of biasing frequency on plasma structure and the energy of the ions that were incident on the wafer was examined. The biasing frequency was changed from 0.8 to 25 MHz. Biasing frequency affects the plasma structure. Ion energy distribution strongly depends on biasing frequency and ion mass, namely, the ratio of ion transit time across the sheath to rf period. These results are consistent with previous measurements.

Particle modelling of inductively-coupled argon plasmas with wafer biasing

The characteristics of axisymmetrical inductively-coupled argon plasmas with wafer biasing are examined using the particle-in-cell Monte Carlo method. The simulation is performed on the condition that gas pressure is fixed at 5 mTorr and power deposition is at 200 W. The effects of bias frequency and bias voltage on the distributions of flux and energy of the ions that are incident onto the wafer are investigated. The bias frequency and bias voltage are changed from 2 MHz to 13.56 MHz and 100 V to 300 V, respectively. The plasma structure is largely influenced by the wafer biasing. The ion energy distribution strongly depends on the bias frequency, bias voltage and sheath thickness. Decreasing the bias frequency results in the improvement of the uniformity of ion flux. These results are consistent with the previous theory.

Low target power wafer sputtering regime identified during magnetron tantalum barrier physical vapor deposition

A wafer sputtering regime has been identified during tantalum barrier deposition using a magnetron physical vapor deposition (MPVD) tool. The MPVD tools are designed to operate at high target powers (tens of kW) where the highly directed energetic metal (athermal metal) is the dominant metal species incident on the wafer. Although athermal metal gives better coverage than neutral metal (thermal) due to the narrower range of incident strike angles to the wafer, shadowing by the feature geometries is still a concern. Having available a wafer sputter regime or “resputter” regime in a PVD tool allows for redistribution of metal from horizontal surfaces in the feature exposed to the plasma to vertical surfaces in the feature. The key in obtaining a wafer sputter regime is the operation of the plasma source in a range that the wafer bias power is effective at generating a sufficient self-bias for sputtering to occur. Discussed are modeling results which predict the wafer sputtering regime and the experimental confirmation that the low target power wafer sputter regime exists. The identified sputter regime in MPVD is such that there is a net deposition of metal at the field. Metal thickness reduction does occur at the trench and via bottoms where much of the unionized metal is being shadowed yielding a lower deposition to sputtering ratio compared to the field.

Ultra-shallow junctions produced by plasma doping and flash lamp annealing

The capabilities of plasma doping (PLAD) and flash lamp annealing (FLA) for use in ultra-shallow junction (USJ) fabrication have been evaluated. Silicon wafers have been doped in a BF 3 plasma using wafer biases ranging from 0.6 to 1 kV and a dose of 4 × 10 15 cm −2. The wafers so implanted have been heat-treated by FLA using pre-heating temperatures in the range of 500–700 °C, peak temperatures of 1100–1350 °C, and effective anneal times of 20 and 3 ms. Secondary ion mass spectrometry (SIMS) and sheet resistance measurements have been undertaken to determine the junction depth and the sheet resistance, respectively. Optimum processing conditions have been identified under which both high electrical activation and insignificant dopant diffusion occur compared to the as-implanted state. In this way, one can obtain combinations of junction depth and sheet resistance that meet the 45 nm technology node requirements.

Negative charge injection to a positively charged SiO2 hole exposed to plasma etching in a pulsed two-frequency capacitively coupled plasma in CF4/Ar

As microchips become smaller, the threat of damage to the device elements of Si semiconductors by charging during plasma etching will become significant. It will be of first importance to establish a plasma-etching technique that does not involve charging, i.e., “charging-free plasma processing.” Here, we utilize the effect of negative charge acceleration under a double layer in order to neutralize the charge inside a microstructure exposed to plasma etching. We have constructed a dual measurement system consisting of an emission in an interface and a contact hole charging on a SiO2 wafer during etching in two-frequency capacitively coupled plasma (2f-CCP) in CF4/Ar and pure Ar. A reduction in charging voltage is measured in the pulsed operation both of the plasma power source and of the wafer bias in the 2f-CCP in electronegative gases, CF4/Ar.

Plasma and process characterization of high power magnetron physical vapor deposition with integrated plasma equipment—feature profile model

High power magnetron physical vapor deposition (HPM-PVD) has recently emerged for metal deposition into deep submicron features in state of the art integrated circuit fabrication. However, the plasma characteristics and process mechanism are not well known. An integrated plasma equipment-feature profile modeling infrastructure has therefore been developed for HPM-PVD deposition, and it has been applied to simulating copper seed deposition with an Ar background gas for damascene metalization. The equipment scale model is based on the hybrid plasma equipment model [M. Grapperhaus et al., J. Appl. Phys. 83, 35 (1998); J. Lu and M. J. Kushner, ibid., 89, 878 (2001)], which couples a three-dimensional Monte Carlo sputtering module within a two-dimensional fluid model. The plasma kinetics of thermalized, athermal, and ionized metals and the contributions of these species in feature deposition are resolved. A Monte Carlo technique is used to derive the angular distribution of athermal metals. Simulations show that in typical HPM-PVD processing, Ar+ is the dominant ionized species driving sputtering. Athermal metal neutrals are the dominant deposition precursors due to the operation at high target power and low pressure. The angular distribution of athermals is off axis and more focused than thermal neutrals. The athermal characteristics favor sufficient and uniform deposition on the sidewall of the feature, which is the critical area in small feature filling. In addition, athermals lead to a thick bottom coverage. An appreciable fraction (∼10%) of the metals incident to the wafer are ionized. The ionized metals also contribute to bottom deposition in the absence of sputtering. We have studied the impact of process and equipment parameters on HPM-PVD. Simulations show that target power impacts both plasma ionization and target sputtering. The Ar+ ion density increases nearly linearly with target power, different from the behavior of typical ionized PVD processing. The total metal flux to the wafer increases with target power due to enhanced target sputtering. However, the ionization fraction of the total flux decreases due in part to the increased diffusion loss of charged species. Wafer bias power controls ion energy, and it has a negligible impact on plasma ionization and deposition flux composition. Feature simulations show the redistribution of deposited metals within a feature when wafer resputtering is promoted at sufficient bias power. Target-wafer spacing (TWS) impacts the total ionization and metal flux to the wafer. The Ar+ density and deposition rate decrease with increasing TWS due to increased surface loss. Simulations suggest that reducing the TWS results in more efficient usage of target source.

Enhanced on-wafer time-domain waveform measurement through removal of interconnect dispersion and measurement instrument jitter

We have measured the output waveshape and rise time of two high-speed digital circuits on a wafer using a 50-GHz prototype of a new instrument. The instrument uses vector error correction to de-embed the component under test like a network analyzer, but reads out in the time domain after the fashion of an equivalent-time oscilloscope. With the calibration plane of the instrument set at the tips of the wafer probes, errors arising from dispersion in the connection hardware are removed. We show that the random jitter in the measurement system is removed without the convolution penalty usually incurred by averaging so that anomalies such as pattern-dependent jitter are exposed. The system rise time is 7 ps, compared to a system rise time of 12-13 ps for a conventional equivalent-time oscilloscope of the same bandwidth in the presence of wafer probes, bias networks, and cables.