Vertical Nanowires Research Articles

(Invited) Biomimetic Eyes with Perovskite Nanowire Array Retina

Human eyes are masterpiece of nature, which can realize powerful image sensing with a very concise structure. Biomimetic eyes with characters comparable to human eyes are highly desirable in many technological applications, particularly in the fields of visual prosthesis and machine vision. The World Health Organization reported that globally there are over 252 million people suffering from visual impairment in the year of 2020. This number is exploding due to the prevalence of various mobile devices with small displays. Bionic eyes implantation is one the most effective strategy for vison restoration. However, today, even the most mature bionic eyes have only 300 clinical trials, which is merely 1 ppm of all the visual impaired patients, mainly due to their poor performance and high cost. In addition, industrial applications such as autonomous driving and humanoids also desire cameras with high performance. To achieve biomimetic eyes with imaging performance on a par with human eyes, innovative device structure design and material selection have to be carried out simultaneously. Among all the photosensing material candidates, the ordered one-dimensional (1D) semiconductor nanowire (NW) arrays exhibit unique advantages such as fast carrier transportation and strong light-material interaction due to their anisotropic structure in axial and radial direction, thereby leading to fast response and high responsivity. This presentation focuses on our work on the NW arrays image sensing and can be highlighted as:1) Controlled growth of well aligned, high-density NW arraysDespite the advantages abovementioned, the integration of NWs has always been a bottleneck challenge hurdling their practical applications. Direct growth of NW arrays can be an effective way to tackle this challenge. We reported for the first time a unique fabrication process to form large-scale, 3D, high-density arrays of lead halide perovskite NWs with well-engineered geometry through a template-assisted growth approach. The array demonstrated amazingly geometry dependent optoelectronic properties and thereby can be used to improve performance of various devices. Particularly, its high regularity leads to the possibility to electrically addressable individual NWs which makes it an ideal candidate for very-large-scale integrated (VLSI) electronics and optoelectronics. The interaction between nanotemplate and sensing materials can introduce unique device performance such as tunable photoresponse and improved stability of perovskites.2) Assembly of integrated, NW arrays based planar image sensorsTo demonstrate the technological potency of the NW arrays, we have developed new process to fabricate them into proof-of-concept image sensors. Each image sensor consists of 1,024 photodiode pixels made of vertical perovskite NWs, and the imaging functionality has been verified by recognizing various optical patterns projected onto it. The high density of this NW array and the addressability of individual NW enable this unique image sensor design a potential, extremely high resolution approaching optical diffraction limit. To realize the device assembly, we have developed a PDMS-assisted dry transfer process which can transfer the thin (µm scale) and large-area (cm scale) film onto any substrate without any bubbles and wrinkles. This unique NW manipulation strategy, together with NW geometrical and compositional tunability, may lead to new functionality and inspire novel device design in the future.3) Invention of a 3D, biomimetic eye with a hemispherical NW array retinaThe high performance of human eyes originates from the dome shape of retina and the high-density photoreceptors in it. However, the commercial image sensors are dominantly using planar device structures shaped by the mainstream planar microfabrication processes, making it hardly possible for hemispherical device fabrication. In our work, we have developed a novel artificial visual system using a spherical biomimetic electrochemical eye with hemispherical retina made of a high-density perovskite NW array. The device has high similarity to human eyes with part of its photodetection performance superior to human eyes. The hemispherical artificial retina has NW density much higher than that of photoreceptors in a human retina thus can potentially achieve a higher image resolution which is bolstered by implementation of a single-NW ultra-small photodetector. The work may lead to a new generation of photosensing devices based on a bioinspired design that can benefit a wide spectrum of technological applications.In all, with the unique structural properties of NW arrays as the starting point, we realized their controlled growth, developed strategies to manipulate them and designed proper device structures to fully fulfill their advantages. In the future, we will combine them with brains, either biological or digital brains, to explore their applications in fields such as visual prothesis and artificial intelligence. Figure 1

Electrically tunable spectral response in vertical nanowire arrays

The semiconductor nanowire (NW) array promises a high photoconductive-gain as well as an enhanced light-absorption in optoelectronic applications. However, to date, the two kinds of advantages are always consuming each other, leading to a low global income. In this work, we show a feasible route to balance the electric gain and the light absorption efficiency. It is accomplished by an inverse injection of photocarriers into NW (from the tip to the bottom of NW or in the opposite direction), which will activate the photoconductive gain in maximal degree. Experimentally, the responsivity reaches up to ∼200 A/W. The spectral response of the GaAs nanowire-array detector is proven to be bias-voltage controlled, allowing it to work at visible or shortwave-infrared enhanced modes. Also, the photoresponse carries on the wavelength information of the incident light, thus, can be used to discriminate monochromatic lights from each other. Together, these findings depict a full image of the photoresponse process in the vertical nanowire array. It might pave a way for the design and fabrication of subwavelength optoelectronic devices.

Enhanced light absorption of kinked nanowire arrays for high-performance solar cells

A kinked InP nanowire array solar cell architecture is proposed for high-performance solar cells. Coupled three-dimensional optoelectronic simulations are performed to investigate the optical absorption and photovoltaic conversion properties. The results show that the kinked morphology significantly enhances the absorption by increasing the optical path, exciting more resonance modes, and reducing the transmission into the substrate. Moreover, the kinked morphology also increases the absorption in the intrinsic region by suppressing the absorption loss in the top doped region. For short nanowires with a total length of 1–1.5 μm, the kinked structures exhibit remarkable efficiency exceeding 14%, significantly higher than the vertical nanowires. Nanowires with different kinked angles are studied, and a moderate kinked angle is beneficial for obtaining optimal performance. This work demonstrates the potential of kinked nanowires in ultra-thin low-cost high-efficiency solar cells.

Direct Writing of 3D Micro/Nanostructures Based on Nanoscale Strong Electric Field of Electron Beam

3D micro/nanostructures have a wide range of applications in metamaterials, integrated circuits and optoelectronic coupling devices, etc. However, 3D nanofabrication has always been a difficult problem in materials science and nanoengineering fields due to the influence of surface tension or capillary action at nanoscale. Here, using nanoscale strong electric field (NSEF) of the electron beam as a driving force, the diffusion flux, migration direction, and aggregation process of material atoms or nanoclusters can be accurately controlled to realize the direct writing of 3D micro/nanostructures. By this method, several ZnO nanocharacters and a vertical ZnO nanowire with a diameter of 18 nm are direct written successfully, and a spatial contact with a characteristic size of 8 nm is created. The direct writing process of a bud‐like nanostructure is also demonstrated on a NiCo2O4 nanorod. Finally, the electron beam direct writing mechanism is analyzed based on the electric field forces and electric potential. This 3D nanofabrication method shows the advantages of flexibility, controllability, and high real‐time ability, which are of great significance to solve the problems of direct writing of 3D nanostructures, material molding control at nanoscale, and electrical interconnection in integrated circuits.

Piezoresistance Characterization of Silicon Nanowires in Uniaxial and Isostatic Pressure Variation.

Silicon nanowires (SiNWs) are known to exhibit a large piezoresistance (PZR) effect, making them suitable for various sensing applications. Here, we report the results of a PZR investigation on randomly distributed and interconnected vertical silicon nanowire arrays as a pressure sensor. The samples were produced from p-type (100) Si wafers using a silver catalyzed top-down etching process. The piezoresistance response of these SiNW arrays was analyzed by measuring their I-V characteristics under applied uniaxial as well as isostatic pressure. The interconnected SiNWs exhibit increased mechanical stability in comparison with separated or periodic nanowires. The repeatability of the fabrication process and statistical distribution of measurements were also tested on several samples from different batches. A sensing resolution down to roughly 1 pressure was observed with uniaxial force application, and more than two orders of magnitude resistance variation were determined for isostatic pressure below atmospheric pressure.

Self-organization and tunable characteristic lengths of two-dimensional hexagonal superlattices of nanowires directly grown on substrates

The organization of nano-objects on macroscopic surfaces is a key challenge for the technological improvement and implementation of nanotechnologies. For achieving operational functions, it is required to assemble nano-objects as controllable building blocks in highly ordered superstructures. Herein, we demonstrate the growth and self-organization of metallic nanowires on surfaces into hexagonal superlattices with tunable characteristic lengths depending of the stabilizing surfactants employed. Starting from a reacting mixture containing a Pt(111) substrate, a Co organometallic precursor, an amine, and an acid dissolved in a solvent, we quantify the structural evolution of superlattices of vertical single-crystalline Co nanowires on Pt, using a combined analysis of small angle neutron scattering, transmission, and scanning electron microscopies. We show the concerted steps of a spontaneous growth and self-organization of the nanowires into two-dimensional (2D) hexagonal lattice on Pt, at intervals starting from a few hours of reaction to a highly ordered superlattice at longer times. Furthermore, it is shown that apart from long-chain acid and long-chain aliphatic amine pairs used as stabilizers, the combination of a long-chain aliphatic and a short-chain aromatic ligand in the synthesis can also be employed for the nanowire superlattices development. Interestingly, the possibility to employ different pairs allows quantitative modulation of the nanowire arrays, such as the interwire distance and the packing fraction.

Spatial Modulation of Vibrational and Luminescence Properties of Monolayer MoS₂ Using a GaAs Nanowire Array

The integration of transition-metal dichalcogenides (TMDs) with non-planar substrates such as nanopillars provides a way to spatially modify the optical properties mainly through the localized strain. Similar studies to date have utilized insulating SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> nanopillars. Here, we combine monolayer MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> with free standing GaAs nanowires (NWs), in views of coupling their semiconducting properties. We find that monolayer MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> exhibits three different configurations: pierced, wrapped and tent-like. We demonstrate how to identify the configurations by optical microscopy and elucidate the impact on the vibrational and luminescence characteristics by confocal spectroscopy mapping. In particular, we highlight the increase of intensity and shift due to the photonic properties of nanowires and increase in dielectric screening associated with the GaAs NW. This work signifies the first step towards the use of vertical III-V NW arrays as a versatile platform for spatially engineering the optical properties of TMDs.

Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling

In this paper, dry etched vertical nanowires (VNWs) are used in transmission line/transfer length analysis to study the contacts of gate-all-around devices for future technology nodes. VNW resistors with Mo and Pd based metal stack contacts to p-InGaAs show Schottky behavior, unlike the planar counterpart. The resistance for Mo contact is higher than Pd, however, Pd was found to form an alloy with InGaAs at temperatures as low as 190 °C, and the length of Pd diffusion into the InGaAs increased at smaller NW dimensions, hindering future scalability. The minimum extracted specific contact resistivity (ρC) values are 1.6 × 10−5 Ω cm2 (Mo) and 4.2 × 10−6 Ω cm2 (Pd) for a doping level of 1 × 1019 cm−3. An apparent dependence of ρC on the NW diameter was also observed. This has been attributed to the surface states under the un-gated region of NW devices and found to dominate at smaller diameters. An analytical model to account for such geometrical effects has also been developed and validated with technology computer-aided design simulations. The analysis presented in this paper effectively captures the 3D aspects of an NW contact at nanoscale dimensions and can be applied irrespective of the semiconductor and contact metal used.

Vertical GeSn/Ge Heterostructure Gate-All-Around Nanowire p-MOSFETs

In recent years, Ge-based group-IV alloys (GeSn, SiGeSn) have received a significant amount of attention as candidates to replace Silicon for future low power and high performance nanoelectronics [1]. The interest in these materials stems primarily from the fact that, by varying the Sn-content of the alloy, it is possible to precisely tune its bandgap from indirect to direct [2], which even opens up the possibility to switch the carrier transport from larger mass low mobility L-valley electrons to the lower mass and high mobility Γ-valley electrons. Adding Si atoms into GeSn alloys enables additional strain engineering by decoupling the lattice constant from the band gap and enables the fabrication of devices to target specific applications. Ge exhibits superior hole mobility over Si and GeSn is predicted to further improve carrier mobilities for both electrons and holes, while still retaining Si CMOS compatibility [3]. In this , we present the fabrication and characterization of Ge- and GeSn-based vertical gate-all-around (GAA) nanowire (NW) p-MOSFETs. Multilayer stacks of Ge and GeSn were grown on a Ge virtual substrate (Ge-VS) using industrial CVD reactors and subsequently characterized, confirming the high quality of the alloys.On these GeSn/Ge heterostructures, vertical GAA nanowire FETs were fabricated using a top-down approach. First, nanowires were defined by electron-beam lithography and subsequently etched anisotropically using reactive ion etching (RIE). The diameter of the nanowires was reduced by digital etching, consisting of repeated combined GeOx layer formation by plasma oxidation and removal in diluted HF solution. This way nanowires with a diameter down to 20 nm and a height of 210 nm were fabricated. A two-step process was employed for gate dielectric formation to ensure a low interface trap density: (i), deposition of a thin layer of Al2O3, followed by an O2-plasma post-oxidation step; (ii) deposition of a HfO2 dielectric layer to reach the required EOT (equivalent oxide thickness). TiN deposited by sputtering forms the gate metal. Planarization and isotropic dry etching were performed to remove the TiN on the top of the nanowire. After a second planarization step, NiGe-contacts were formed on the exposed top nanowire by Ni-deposition followed by a forming-gas annealing step. Finally, metal contacts for gate and source/drain were added.The resulting Ge-NW-pMOSFETs exhibit high electrical performances. A low subthreshold slope (SS) of 66 mV/dec, a low drain-induced barrier lowering (DIBL) of 35 mV/V and an I on/I off-ratio of 2.1×106 were measured for nanowires with a diameter of 20 nm. For 65 nm NWs, the I on/I off-ratio improves, which is attributed to the decreased contact resistance on top of the NWs, leading to larger on-currents. The peak transconductance for the Ge NWs reached ~190 µS/µm (V DS=-0.5 V). Adopting a GeSn/Ge-heterostructure, with GeSn on top of the nanowire used as source the device performances are strongly enhanced. The on-current I on was increased by ~32%, mostly due to the reduced contact resistivity of the smaller bandgap of GeSn compared to Ge. It was also observed that adopting GeSn alloys leads to an increase in transconductance, G max, to a respectable value of ~870 µS/µm, almost 3 times larger as reported to date for Ge NWs. Moreover, both SS and DIBL are improved by decreasing the NW diameter as a consequence of improved electrostatic gate control over the channel.These results demonstrate that the incorporation of GeSn into Ge-MOSFET technology yields a significant advantage and confirm its high potential for low-power-high-performance nanoelectronics.Fig. 1: (a) Schematic of the GAA nanowire FET based on a GeSn/Ge-heterostructure. (b) Optical image on the metallic contacts (c) Transfer curve of a Ge nanowire pFET with a diameter of 20 nm. The SS is 68 mV/dec and the DIBL is 35 mV/V. (d) Transfer curves of Ge0.92Sn0.08/Ge nanowire pFETs with a diameter of 65 nm and different EOTs. Acknowledgments The authors acknowledge support from the German BMBF project “SiGeSn NanoFETs”.

Ultrafast Photoresponse Using Axial n-ZnO/p-CuO Heterostructure Nanowires Array-Based Photodetectors

Photodetector (PD) based on axial n-ZnO/p-CuO heterostructure (HS) nanowires (NWs) array was fabricated on Si substrate by using glancing angle deposition (GLAD) technique. The field emission scanning electron microscope (FE-SEM) image shows the formation of a well-aligned and vertical NW structure. A typical high-resolution transmission electron microscope (HR-TEM) image confirms the formation of an axial HS NW consisting of ZnO NW at the top and CuO NW at the bottom. A twofold enhanced photo-absorption was observed for axial n-ZnO/p-CuO HS NW as compared to pristine ZnO NWs. Moreover, X-ray photoelectron spectroscopy (XPS) analysis prove that there is no deviation in electronic state after the formation of HS. The axial n-ZnO/p-CuO HS NW based PD exhibited a very high rectification ratio of 1200, low dark current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{d}$ </tex-math></inline-formula> ) of 0.09 nA and an ultrafast photoresponse with rise time and fall time of 0.49 and 0.11 ms, respectively.

Performance Assessment and Optimization of Vertical Nanowire TFET for Biosensor Application

This paper reports the performance assessment of vertical silicon nanowire TFET (V-siNWTFET) design for biosensor applications using dielectric-modulation and gate underlap technique. The sensitivity of the V-siNWTFET is recognizing by immobilizing the different biological molecules such as lipids, biotin, uricase, protein, Gox, streptavidin, uriease, zein etc. in the cavity region which is created under the gate electrode and source oxide. The performance analysis is observed by varying the relative permittivity of the different biomolecules and analyzes the parametric variation both for neutral and charged biomolecules. The sensitivity of the biosensor has been detecting in the terms of drain current (ID), threshold voltage (VTH), subthreshold slope (SS), transconductance (gm), and ION/IOFF ratio. The proposed device structure has capable to reduce the leakage currents and high sensitivity biosensor design in the nanoscale regimes. The obtained best optimum parameters of the proposed devices are ION (1.37E−08 A/µm), IOFF (9.44E−19 A/µm), SS (29.97 mV/dec) and ION/IOFF (4.29E + 10) ratio with gate work-function (ϕgate = 4.8 eV) and uniformly doped (1 × 10–19 cm−3) silicon nanowire at drain to source voltage (VDS = 1.0 V). The higher sensitivity of the proposed V-siNWTFET for Biosensor is observed for Zein biomolecules (K = 5).

Dual-Mechanism-Driven Strategy for High-Coverage Detection of Serum Lipids on a Novel SALDI-MS Target.

Serum lipid metabolites have been emerging as ideal biomarkers for disease diagnosis and prediction. In the current stage, nontargeted or targeted lipidomic research mainly relies on a liquid chromatography-mass spectrometry (LC-MS) platform, but future clinical applications need more robust and high-speed platforms. Surface-assisted laser desorption ionization mass spectrometry (SALDI-MS) has shown excellent advantages in the high-speed analysis of lipid metabolites. However, the platform in the positive ion mode is more inclined to target a certain class of lipids, leading to the low coverage of lipid detection and limiting its practical translation to clinical applications. Herein, we proposed a dual-mechanism-driven strategy for high-coverage detection of serum lipids on a novel SALDI-MS target, which is a composite nanostructure comprising vertical silicon nanowires (VSiNWs) decorated with AuNPs and polydopamine (VSiNW-Au-PDA). The performance of laser desorption and ionization on the target can be enhanced by charge-driven desorption coupled with thermal-driven desorption. Simultaneous detection of 236 serum lipids (S/N ≥ 5) including neutral and polar lipids can be achieved in the positive ion mode. Among these, 107 lipid peaks were successfully identified. When combined with VSiNW-Au-PDA and VSiNW chips, 479 lipid peaks can be detected in serum samples in positive and negative ion modes, respectively. Based on the platform, serum samples from 57 hepatocellular carcinoma (HCC) patients and 76 healthy controls were analyzed. After data mining, 14 lipids containing different lipid types (TAG, CE, PC) were selected as potential lipidomic biomarkers. With the assistance of an artificial neural network, a diagnostic model with a sensitivity of 92.7% and a specificity of 96% was constructed for HCC diagnosis.

Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages

Heterostructure engineering in III-V vertical nanowire (VNW) MOSFETs enables tuning of transconductance and breakdown voltage. In this work, an In_<i>x</i>Ga<inline-formula> <tex-math notation="LaTeX">$_{{1}-{x}}$ </tex-math></inline-formula>As channel with a Ga-composition grading (<inline-formula> <tex-math notation="LaTeX">${x} \,\,=$ </tex-math></inline-formula> 1&#x2013;0.4) in the channel and drain region, combined with field plate engineering, enables breakdown voltage above 2.5 V, while maintaining transconductance of about 1 mS/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula>, in VNW MOSFETs. The field plate consists of a vertically integrated SiO₂ layer and a gate contact, which screens the electric field in the drain region, extending the device operating voltage. By scaling the field plate, a transconductance of 2 mS/<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula>, alongside the breakdown voltage of 1.5 V, is obtained, demonstrating the benefit of field engineering in the drain. The scalability of the field plate and the gate is measured, showing an ON-resistance increase by 23 <inline-formula> <tex-math notation="LaTeX">$\Omega \cdot \mu \text{m}$ </tex-math></inline-formula>, and transconductance decrease by 5 <inline-formula> <tex-math notation="LaTeX">$\mu \text{S}/\mu \text{m}$ </tex-math></inline-formula>, per nm field plate length. This behavior is captured in a new and modified virtual source model, where device transmission and drain resistance are altered to capture the field plate scaling effect. The modeling is applied to nanowire (NW) devices with field plate lengths ranging from 5 to 115 nm, capturing accurately essential device performance parameters. Finally, a modified band-to-band (BTB) tunneling approach is used to accurately describe the device behavior above 1.5 V.

Design and Performance Optimization of Dopingless Vertical Nanowire TFET Using Gate Stacking Technique

Design and Performance Optimization of Dopingless Vertical Nanowire TFET Using Gate Stacking Technique

Enhancing the Mechanical Robustness of Gold Nanowire Array via Sulfide‐Mediated Growth

Vertical nanowire arrays (NWAs) have attracted great attention for their outstanding electronic and materials transport properties. Despite the recent progresses, peel‐off of the metal NWAs remains a major challenge for their application. Herein, the peel‐off problem is studied and improved synthesis to solve the problem is discussed. Severe electrode degradation is caused by bubble formation, but even simple cyclic voltammetry scans without major redox chemistry could induce degradation. The robustness of the Au NWAs is found to depend mainly on their surface hydrophilicity. Most importantly, sulfide treatment of the NH2‐functionalized substrate is found to give sparser and longer Au NWAs, with greatly improved robustness. Coupled with Pd coating with concomitant hydrophilic treatment, the sulfide‐mediated Au@Pd NWAs could withstand 1 h of constant voltage electrolysis without much loss of the current intensity.

Detailed balance analysis of vertical GaAs nanowire array solar cells: exceeding the Shockley Queisser limit.

We performed detailed balance analysis using rigorous coupled-wave analysis (RCWA) on vertical GaAs nanowire (NW) arrays. Both freestanding NW arrays as well as NW arrays on a perfect back reflector are assessed. Both types of vertical NW arrays demonstrate efficiencies that exceed the Shockley Queisser (SQ) or radiative efficiency limit when the NWs are sufficiently long. The use of a back reflector enhances the efficiency of NW solar cells by increasing solar absorption and suppressing emission from the backside of the solar cell. We study the light trapping and material reduction advantages of NWs. Furthermore, we compare simulations that evaluate detailed balance efficiency with ultimate efficiency and show that ultimate efficiency studies can determine near-optimal solar cells while vastly reducing the number of simulations that need to be performed. While open circuit voltages above the radiative limit can be achieved, tradeoffs with short circuit current must be carefully considered. We also compare our simulation results to other claims in the literature that NWs are capable of exceeding the SQ limit.

Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor

In this paper, we present an improved methodology to extract the small-signal electrical equivalent circuit of the parasitic elements using RF test structures for a 3D vertical nanowire transistor technology. The methodology is based on the extraction of the distributed parasitic elements from an open structure for which on-wafer S-parameter measurements were carried out up to 40 GHz. The electrical equivalent circuit of the passive device was then used for de-embedding of the transistor S-parameters for extraction of intrinsic small-signal parameters such as the gate capacitances.

Impact of the channel doping on the low-frequency noise of silicon vertical nanowire pFETs

In this work, the impact of the channel doping on the low-frequency noise of silicon Gate-All-Around (GAA) Vertical Nanowire (VNW) pMOSFETs on Silicon-on-Insulator (SOI) substrates will be described and discussed. It is demonstrated that the dominant fluctuation mechanism of the 1/f noise in weak inversion changes from mobility (Δμ) to number (Δn) fluctuations with increasing doping density of the silicon nanowires. At the same time, the lowest input-referred voltage noise Power Spectral Density is observed for an intermediate boron concentration of 5 × 1018 cm−3.

Thermal Conductivity of GaAs Nanowire Arrays Measured by the 3ω Method.

Vertical nanowire (NW) arrays are the basis for a variety of nanoscale devices. Understanding heat transport in these devices is an important concern, especially for prospective thermoelectric applications. To facilitate thermal conductivity measurements on as-grown NW arrays, a common NW-composite device architecture was adapted for use with the 3ω method. We describe the application of this technique to obtain thermal conductivity measurements on two GaAs NW arrays featuring ~130 nm diameter NWs with a twinning superlattice (TSL) and a polytypic (zincblende/wurtzite) crystal structure, respectively. Our results indicate NW thermal conductivities of 5.2 ± 1.0 W/m-K and 8.4 ± 1.6 W/m-K in the two samples, respectively, showing a significant reduction in the former, which is the first such measurements on TSL NWs. Nearly an order of magnitude difference from the bulk thermal conductivity (~50 W/m-K) is observed for the TSL NW sample, one of the lowest values measured to date for GaAs NWs.

Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition

AbstractFabrication of next generation transistors calls for new technological requirements, such as reduced size and increased density of structures. Development of cost‐effective processing techniques to fabricate small‐pitch vertical III–V nanowires over large areas will be an important step toward realizing dense gate all‐around transistors, having high electron mobility, and low power consumption. It is demonstrated here, how arrays of III–V nanowires with a controllable number of rows, ranging from one single row up to bands of 500 nm, can be processed by directed self‐assembly (DSA) of block copolymer (BCP). Furthermore, it is shown that the DSA‐orientation with respect to the substrate's crystal direction affects the nanowire facet configuration, and thereby the nanowire spacing and gate all‐around deposition possibilities. A high χ poly(styrene)‐block‐poly(4‐vinylpyridine) BCP pattern directed by electron beam lithography‐defined guiding lines is transferred into silicon nitride. The silicon nitride is then used as a selective area metal‐organic vapor phase epitaxy mask atop an indium arsenide (InAs) buffer layer on a silicon platform to grow vertical InAs nanowires at 44–60 nm row pitch. Finally, deposition of high‐κ oxide and titanium nitride at this high pattern density is demonstrated, to further illustrate the considerations needed for next generation transistors.