Turn-off Speed Research Articles

A fast-switching and short-circuit enhanced SOI LIGBT with a Self-Driving P-MOS

A fast-switching and short-circuit enhanced LIGBT with integrated Self-Driving P-channel MOS, named SDP-LIGBT is demonstrated by the TCAD SENTAURUS. The SDP consists of P + Emitter (Drain), N-type Carrier Store (N-CS Substrate) and P-shield (Source), and the gate of the SDP (PG) is shortly connected with the P + Emitter, thus the VPG,S equals VDS. Consequently, the SDP can be triggered on with saturate state without extra control signal. At the forward conduction, the SDP is automatically turned on with the increased VCE, then the saturation current is remarkably decreased due to division of LIGBT part and SDP part. Moreover, the N-CS substrate of the SDP acts as the hole barrier, which further decreased the on-state voltage drop (VON). At the turn-off process, the SDP is also automatically turned on to extract excessive carriers with the increased bus voltage VCE, thus the turn-off speed and turn-off energy loss (EOFF) is effectively reduced. As a result, the SDP-LIGBT achieves superior trade-off relationship between VON and EOFF. Furthermore, the short-circuit property of SDP-LIGBT is also significantly enhanced.

Solid-state Marx generator based on saturable pulse transformer and fast recovery diodes

Solid-state compact Marx generator using saturable pulse transformer (SPT) and fast recovery diodes has been proposed. The primary circuit is switched by three MOSFETs connected in parallel. The SPT functions as a step-up transformer to increase the voltage amplitude and as a closing switch for the secondary circuit. Meanwhile, all the SPTs share the same magnetic core to achieve a compact structure and ensure good synchronization. The energy storage capacitors on the secondary sides are charged through the unsaturated SPT. When the SPT saturates, the capacitors firstly transfer a little energy to the saturated inductors through the diodes reversely during their reverse recovery process. Currents rise quickly in these inductors until diodes totally recover to reverse blocking state. Then capacitors discharge in series to the load and high-voltage pulses are generated over the load. With the currents in the saturated inductors, the front edges of pulses are no longer affected by them but are dominated the turn-off speed of the diodes, which makes high-voltage and high-current pulses with short front edges possible. The regular and cheap fast recovery diodes in the generator act as semiconductor opening switch to sharpen the pulse front edges. Experiments were carried out with a 4-stage Marx generator prototype, 10.8-kV high-voltage pulses with a front edge of 11 ns, a pulse width of 190 ns, were obtained over a 100-Ω resistive load. The total energy efficiency is 49.8%. The proposed Marx generator using regular fast recovery diodes is compact, cheap, and efficient to generate high-voltage pulses with short front edges.

On-Chip Active Turn-Off Driving Technique to Prevent Channel Current From Disappearing Prematurely in SiC MOSFET’s Applications

Silicon carbide (SiC) MOSFET has significant advantages in high-voltage (HV) and high-frequency (HF) applications due to its electrical characteristics. In order to make use of its merits, the active driver is necessary for SiC MOSFET. During the turn-off operation of SiC MOSFET, it is critical to prevent the channel current from disappearing prematurely, which has not been addressed in existing active drivers. This brief proposes an on-chip active turn-off driver to realize the fast turn-off speed and low EMI noises. The mechanism is that the turn-off driving current needs to be adjusted rapidly according to the operating state of SiC MOSFET, which can also ensure that EMI noises and overshoots are under control. Then, the proposed turn-off driver is fabricated in a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> BCD process and occupies a 0.99mm2 active area. Finally, using the proposed active turn-off driver, the turn-off operation of SiC MOSFET has experimented with the 15A and 90A load current, respectively. SiC MOSFET realizes a high turn-off performance, about 200ns turn-off time with low EMI noises, demonstrating that the proposed on-chip active turn-off driving technique is suitable for SiC MOSFET under different loads.

Evaluation and Suppression Method of Turn-Off Current Spike for SiC/Si Hybrid Switch

SiC MOSFET/Si IGBT (SiC/Si) hybrid switch usually selects the gate control pattern that SiC MOSFET turns on earlier and turns off later than Si IGBT, with the aim of making the hybrid switch show excellent switching characteristics of SiC MOSFET and reduce switching loss. However, when SiC MOSFET turns off, the fast slew rate of drain source voltage causes the current spike in Si IGBT due to the effects of parasitic capacitance charging and carrier recombination, which will produce additional turn-off loss, thus affecting the overall efficiency and temperature rise of the converter. Based on the double pulse test circuit of SiC/Si hybrid switch, the mathematical model of the turn-off transient process is established. The effects of the remnant carrier recombination degree of Si IGBT, the turn-off speed of SiC MOSFET and the working conditions on the turn-off current spike of hybrid switch are evaluated. Although adjusting these parameters can reduce the turn-off current spike somewhat, additional losses will be introduced. Therefore, a new method to suppress the turn-off current spike is proposed to balance the power loss and current stress.

Investigation of Limitations in Passive Voltage Clamping-Based Solid-State DC Circuit Breakers

This paper investigates limitations of passive voltage clamping based dc solid-state circuit breakers (SSCBs). There are two major contributions of this paper. First, it presents a unique quantifying study of limitations in metal oxide varistor (MOV) clamping based SSCBs in terms of gate voltage distortions and power shock. Second, it provides a comprehensive quantifying investigation of limitations in MOV and resistor-capacitor-diode (MOV-RCD) clamping based SSCBs regarding the power shock and response speed. For MOV based SSCBs, both gate voltage distortions and power shock during turn-off are extremely high, causing switch degradation/failure. For MOV-RCD clamping based SSCBs, a snubber capacitor is added to reduce d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">v</i> /d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> and power shock. However, this capacitor brings two main limitations: a) inevitable high transient power/energy shock at high-current interruption and b) low turn-off speed caused by high-inertia capacitor charging at low-current interruption. Two prototypes are implemented to illustrate limitations: a discrete SiC MOSFET-based 500 V/20 A SSCB, and a SiC MOSFET module-based 800V/100A SSCB. Experiments validate that the transient power shock can reach 256 kW at a 1.2 kA fault current interruption, which affects system reliability. Moreover, the response speed at a 100 A case (7.8 μs) can be 14 times slower than the 1 kA case (0.56 μs) due to the snubber capacitor charging process, which leads to inconsistent control and coordination of SSCBs.

High-speed Si films based threshold switching device and its artificial neuron application

Threshold switching (TS) devices are finding increasing use in the hardware implementation of neuromorphic network computing. Here, a simple structured Ag/amorphous Si/Pt TS device with a switching ratio of ∼105 is prepared, with turn-on and turn-off speeds as high as ∼20 ns and ∼16 ns, respectively. We use this TS device to construct a leaky integration-and-firing artificial neuron that emulates key biological neuron features like threshold-driven firing, all-or-nothing spiking, refractory period, intensity-modulated frequency response, and conductance-modulated frequency response. These results suggest that Si film-based TS device artificial neurons have significant potential for building high-speed artificial neural networks.

Improved Turn-Off Speed and Uniformity of Atomic Threshold Switch Device by AgSe Electrode and Bipolar Pulse Forming

To improve the turn-off speed and uniformity of atomic threshold switching (TS) devices, we propose the use of the AgSe electrode and controlled bipolar pulse forming method. Compared with TS devices with Ag and AgTe electrodes, TS device with the AgSe electrode shows an extremely fast turn-off speed, which can be explained by the limited injection of Ag into the switching layer. By applying positive bias (Icc = 500 nA, 1 ms) followed by negative bias (−0.1 to −0.2 V, $10~\mu \text{s}$ ), the TS device exhibits excellent switching uniformity. It can be explained by the formation of atomic-scale filament under the positive bias at low Icc and drift-back of excessive Ag by the negative bias. By designing the shape of the filament and concentration of the residual Ag, the TS device with the AgSe electrode shows promise for selector applications.

Snapback-free shorted anode LIGBT with controlled anode barrier and resistance* *Project supported by the National Natural Science Foundation of China (Grant Nos. 61604027 and 61704016) and the Fund from Chongqing Technology Innovation and Application Development (Key Industry Research and Development), China (Grant No. cstc2018jszx-cyzd0646).

A novel shorted anode lateral-insulated gate bipolar transistor (SA LIGBT) with snapback-free characteristic is proposed and investigated. The device features a controlled barrier V barrier and resistance R SA in anode, named CBR LIGBT. The electron barrier is formed by the P-float/N-buffer junction, while the anode resistance includes the polysilicon layer and N-float. At forward conduction stage, the V barrier and R SA can be increased by adjusting the doping of the P-float and polysilicon layer, respectively, which can suppress the unipolar mode to eliminate the snapback. At turn-off stage, the low-resistance extraction path (N-buffer/P-float/polysilicon layer/N-float) can quickly extract the electrons in the N-drift, which can effectively accelerate the turn-off speed of the device. The simulation results show that at the same V on of 1.3 V, the E off of the CBR LIGBT is reduced by 85%, 73%, and 59.6% compared with the SSA LIGBT, conventional LIGBT, and TSA LIGBT, respectively. Additionally, at the same E off of 1.5 mJ/cm2, the CBR LIGBT achieves the lowest V on of 1.1 V compared with the other LIGBTs.

A novel high breakdown voltage and high switching speed GaN HEMT with p-GaN gate and hybrid AlGaN buffer layer for power electronics applications* *Project supported by the National Natural Science Foundation of China (Grant No. 61376078).

A novel p-GaN gate GaN high-electron-mobility transistor (HEMT) with an AlGaN buffer layer and hybrid dielectric zone (H-HEMT) is proposed. The hybrid dielectric zone is located in the buffer and composed of horizontal arranged HfO2 zone and SiN x zone. The proposed H-HEMT is numerically simulated and optimized by the Silvaco TCAD tools (ATLAS), and the DC, breakdown, C–V and switching properties of the proposed device are characterized. The breakdown voltage of the proposed HEMT is significantly improved with the introduction of the hybrid dielectric zone, which can effectively modulate the electric field distribution in the GaN channel and the buffer. High breakdown voltage of 1490 V, low specific on-state resistance of 0.45 mΩ⋅cm2 and high Baliga’s figure of merit (FOM) of 5.3 GW/cm2, small R on Q oss of 212 mΩ⋅nC, high turn-on speed 627 V/ns and high turn-off speed 87 V/ns are obtained at the same time with the gate-to-drain distance L gd of 6 μm.

Fabrication and Investigation of a Lateral Insulated Gate-Bipolar-Transistor With Ultrafast Turn-Off Speed

A hole-controlled lateral insulated gate bipolar transistor (HC-LIGBT) device with an ultrafast turn-off speed is investigated and experimentally demonstrated. Utilizing a high-permittivity material as the dielectric on the novel device structure, the hole carrier movements are controlled. In the device ON-state, the anode plasma injection effect is amplified to improve the current density. In the OFF-state, the electrons in the drift region are rapidly neutralized by the hole current, after which the anode voltage is pulled to the bus voltage by the external driving circuit through a voltage couple to realize a fast turn-off speed. The ON-state current is not compromised for the switching speed. The device is fabricated with a 1 μm fully custom process using Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> as the dielectric. The test results indicate that the breakdown voltage of the device is 350 V, the ON-state current density is 155 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at an anode voltage of 2 V, and the rising edge of the voltage on the anode in the turn-off state lasts only 90 ns.

Driver circuit to eliminate bridge leg crosstalk in SiC MOSFETs

This study involves the crosstalk caused by the high-frequency parasitic parameters in the driver circuits of SiC MOSFETs, which are high-speed switching devices. A lumped parameter model for the high-frequency crosstalk of a driver circuit was established. Then, the relationships between the parameters and crosstalk of the driver circuit were analyzed. Finally, an improved SiC MOSFET driver circuit was proposed. The optimized driver circuit parameters can reduce the driver signal oscillation and minimize the crosstalk of the driver circuit. Verification was performed on a test platform of a full-bridge LLC converter. Test results show that the improved driver circuit can remarkably suppress crosstalk, increase the turn-off speed of SiC MOSFETs and reduce the switching loss. This demonstrates the effectiveness of the driver circuit.

Performance Enhancement of Ag/HfO2 Metal Ion Threshold Switch Cross-Point Selectors

A metal ion threshold switch (MITS) based on an Ag/TiN/HfO2/Pt stack is experimentally demonstrated with improved endurance. The incorporation of a low-temperature atomic layer deposition (ALD) TiN layer as an efficient diffusion barrier enables optimum Ag infiltration during the electroforming step. Further, the tunability of the threshold voltage (VTS) from 0.25 to 1.1V via bottom electrode (BE) work function engineering is demonstrated. The Ag/TiN/HfO2/Al MITS selector exhibits a 4.4x increase in VTS, $100~\mu \text{A}$ ON-current handling capability, low leakage (~10 pA), $10^{{7}}$ half-bias non-linearity and fast (<30 ns) turn-ON switching speed. The turn-OFF speed of the selector device is independent of the built-in field, indicating that the latter does not influence ionic relaxation during the filament rupture process.

15 kV n-GTOs in 4H-SiC

High performance 15 kV n-GTOs were demonstrated for the first time in 4H-SiC. The device utilized a 140 μm thick, lightly doped n-type drift layer, with 1450°C lifetime enhancement oxidation, which resulted in a carrier lifetime of 17.5 μs. The p+ backside injector layer was thinned to minimize parasitic resistances. A room temperature forward voltage drop of 5.18 V was observed at a current density of 100A/cm2. A 1 cm2 device showed a leakage current of 0.17 μA at 15 kV. The 4H-SiC n-GTO showed latching characteristics, and showed a turn-off time of 170 ns in a resistive load switching setup, which represents about a factor of 45 improvement in turn-off speed over 4H-SiC p-GTOs with comparable voltage and current ratings.

Active Optical Modulation for Series-Connected Emitter Turn-&lt;sc&gt;Off&lt;/sc&gt; Thyristors

Series connection of high-power thyristors is proposed in the literature for high-voltage applications. Due to the high dv/dt across series-connected thyristors during turn-off, charge equalization techniques have been pursued that increase the fall time to avoid overshoot voltage and device breakdown. Longer fall time for thyristors yields reduced switching frequency and increased losses. As such, a new method to control turn-off transition for the series connection of recently developed optical emitter turn-off (o-ETO) thyristor is outlined in this letter. The turn-off speed of series-connected o-ETOs and their voltage balance are controlled by modulating the optical intensity of the triggering (instead of the high-power) device of the o-ETO.

An Ultralow Turn-Off Loss SOI-LIGBT With a High-Voltage p-i-n Diode Integrated on Field Oxide

A novel ultralow turn-off loss silicon-on-insulator-lateral insulated-gate bipolar transistor (LIGBT) is proposed and investigated by numerical simulations. The proposed LIGBT features a high-voltage p-i-n diode integrated on the field oxide that is located upon the surface of the drift region. The p-i-n diode serves as a high-voltage level shifter, and the gate signal of the LIGBT can be transmitted to the anode side of the LIGBT to control a low-voltage circuit which is used to short the p-anode/n-buffer junction when the device is turning off. Thus, the injection of the holes from the p-anode region into the n-drift region is prevented, and the turn-off speed of the proposed LIGBT is significantly improved in comparison with the conventional one. The numerical simulation results reveal that the turn-off loss of the proposed 352-V LIGBT is 43.1% of the conventional LIGBT at VON = 1.38 V.

500-V Silicon-On-Insulator Lateral IGBT With W-Shaped n-Typed Buffer and Composite p-Typed Collectors

A novel 500-V rated silicon-on-insulator lateral insulated-gate bipolar transistor (SOI-LIGBT), featuring a W-shaped n-typed buffer and p-typed composite collectors, is proposed for the first time in this paper. The composite collectors which consist of a high-doped p+ layer and a low-doped p− layer can maintain a high level of collector-side hole injection in ON-state; the low-doped p− layer combining with the W-shaped buffer provides a low barrier path for electron extraction during turn-off; thus, high current capability and high turn-off speed can be realized at the same time. The measurement results show that 67.3% decrease in turn-off time can be obtained at the expense of only 6.3% of current capability. Compared with the standard SOI-LIGBT, no additional processing steps or process modifications are required for the proposed SOI-LIGBT. The low-doped p− collector is formed simultaneously with the emitter-side p-well while the W-shaped buffer is formed by diffusion overlapping of two neighboring windows. At 125 °C, the proposed SOI-LIGBT exhibits an ON-state voltage drop of 2.48 V, a saturated current density of 420 A/cm2, a turn-off time of $>4~\mu \text{s}$ , allowing significant improvements in power loss, operating frequency, and ruggedness for single-chip intelligent power ICs.

Hybrid Selector With Excellent Selectivity and Fast Switching Speed for X-Point Memory Array

In this letter, we demonstrate a new concept of threshold selector by combining Ag-based selector with NbO x insulator metal transition (IMT) selector. To overcome intrinsic limits of slow turn-off speed ( $> 1\mu \text{s}$ ) of the Ag-based selector, we adopted NbO x IMT selector with fast turn-off speed. The hybrid device exhibits excellent selector characteristics, such as extremely low off-current ( $ ). It shows excellent read-out margin (>75% at >210 word lines) in a fast sequential operation of cross point memory array.

Effect of cation amount in the electrolyte on characteristics of Ag/TiO2 based threshold switching devices

In this study, we investigate the effect of cation amount in an electrolyte on Ag/TiO2 based threshold switching (TS) devices, based on field-induced nucleation theory. For this purpose, normal Ag/TiO2, annealed Ag/TiO2, and AgTe/TiO2 based TS devices are prepared, which have different cation amounts in their electrolytes during the switching process. First, we find that all of the prepared TS devices follow the field-induced nucleation theory with different nucleation barrier energy (W0), by investigating the delay-time dependency at various voltages and temperatures. Based on the investigation, we reveal that the amount of cations in the electrolyte during the switching process is the control parameter that affects the W0 values, which are found to be inversely proportional to the turn-off speed of the TS devices. This implies that the turn-off speed of the TS devices can be modulated by controlling the amount of cations in the matrix.

Field-induced nucleation in threshold switching characteristics of electrochemical metallization devices

In this research, we investigate electrically driven threshold switching (TS) characteristics in electrochemical metallization cells by adopting the field-induced nucleation theory. For this aim, Ag/HfO2 and Ag/TiO2 based TS devices are prepared and examined. First, we carry out the field driven turn-on process to form Ag filaments created as a consequence of sequential nucleation of Ag ions from the bottom electrode. During the filament formation process, it is observed that the prepared devices show switching time exponential in voltage and temperature with different nucleation barrier energies (W0), which confirms the field-induced nucleation theory. Furthermore, we find that the device with higher W0 shows faster dissolution speed. This implies that the slow turn-off speed of the TS device can be improved by finding a material system with a higher W0 value.

Design of high‐speed gate driver to reduce switching loss and mitigate parasitic effects for SiC MOSFET

The high switching speed in a silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) will aggravate the parasitic effects (d i /d t and d v /d t ) arising from the interaction with parasitic elements. In this project, a high-speed gate driver has been developed and optimised for the commercially available SiC MOSFET power module. The impact of various parasitic parameters on parasitic effects is initially evaluated. Then, an improved gate-assisted circuit is proposed with a local low-impedance path for both discharging and C d v/ d t currents. It allows maximised turn-off speed (d v /d t up to 36 V/ns) and minimised turn-off loss (reduction up to 70%). It also produces a reduction in electromagnetic interference. The gate voltage spike due to C d v/ d t current is reduced below the threshold voltage at various testing conditions.