Transistor Geometry Research Articles

Low-noise, high-detectivity, polarization-sensitive, room-temperature infrared photodetectors based on Ge quantum dot-decorated Si-on-insulator nanowire field-effect transistors

A CMOS-compatible infrared (IR; 1200–1700 nm) detector based on Ge quantum dots (QDs) decorated on a single Si-nanowire channel on a silicon-on-insulator (SOI) platform with a superior detectivity at room temperature is presented. The spectral response of a single nanowire device measured in a back-gated field-effect transistor geometry displays a very high value of peak detectivity ∼9.33 × 1011 Jones at ∼1500 nm with a relatively low dark current (∼20 pA), which is attributed to the fully depleted Si nanowire channel on SOI substrates. The noise power spectrum of the devices exhibits a with the exponent, γ showing two different values of 0.9 and 1.8 owing to mobility fluctuations and generation-recombination of carriers, respectively. Ge QD-decorated nanowire devices exhibit a novel polarization anisotropy with a remarkably high photoconductive gain of ∼104. The superior performance of a Ge QDs/Si nanowire phototransistor in IR wavelengths is potentially attractive to integrate electro-optical devices into Si for on-chip optical communications.

Charge Traps in All‐Inorganic CsPbBr3 Perovskite Nanowire Field‐Effect Phototransistors

AbstractAll‐inorganic halide perovskite materials have recently emerged as outstanding materials for optoelectronic applications. However, although critical for developing novel technologies, the influence of charge traps on charge transport in all‐inorganic systems still remains elusive. Here, the charge transport properties in cesium lead bromide, nanowire films are probed using a field‐effect transistor geometry. Field‐effect mobilities of μFET = 4 × 10−3 cm−2 V−1 s−1 and photoresponsivities in the range of R = 25 A W−1 are demonstrated. Furthermore, charge transport both with and without illumination is investigated down to cryogenic temperatures. Without illumination, deep traps dominate transport and the mobility freezes out at low temperatures. Despite the presence of deep traps, when illuminating the sample, the field‐effect mobility increases by several orders of magnitude and even phonon‐limited transport characteristics are visible. This can be seen as an extension to the notion of “defect tolerance” of perovskite materials that has solely been associated with shallow traps. These findings provide further insight in understanding charge transport in perovskite materials and underlines that managing deep traps can open up a route to optimizing optoelectronic devices such as solar cells or phototransistors operable also at low light intensities.

Short-Wave Infrared-Sensing Organic Phototransistors with a Triarylamine-Based Polymer Doped with a Lewis Acid-Type Small Molecule.

Here, we report that a triarylamine-based polymer, poly[N,N'-bis(4-butylphenyl)-N,N'-bis(phenyl)benzidine] (PolyTPD), is effectively doped with tris(pentafluorophenyl)borane (BCF) and the doping level is dependent on the molar ratio of BCF to PolyTPD (repeating unit). The doping reaction is performed at 25 °C at the solution states using chlorobenzene solvent by varying the BCF molar ratio up to 2.0. The resulting PolyTPD:BCF films show new broad optical absorption peaks at a wavelength of λ = 1000-3300 nm, covering the full range of short-wave infrared (SWIR, λ = 1400-3000 nm), which is stronger at a higher BCF molar ratio. Spectroscopic characterizations confirm the generation of radicals (single electrons) in PolyTPD by BCF doping, which resulted in a gradual shift of the highest occupied molecular orbital (HOMO) energy level with the BCF molar ratio. The PolyTPD:BCF films are applied as a gate-sensing layer (GSL) in the geometry of organic field-effect transistors (OFETs), leading to SWIR-sensing organic phototransistors (OPTRs). The optimized SWIR-OPTRs with the PolyTPD:BCF GSLs (BCF molar ratio = 0.5) can detect SWIR light with maximum photoresponsivities of 583.4 mA/W (λ = 1500 nm), 695.4 mA/W (λ = 2000 nm), and 829.4 mA/W (λ = 2500 nm).

Electrical control of anisotropic and tightly bound excitons in bilayer phosphorene

Monolayer and few-layer phosphorene are anisotropic quasi-two-dimensional (quasi-2D) van der Waals (vdW) semiconductors with the linear-dichroic light-matter interaction and the widely tunable direct band gap in the infrared frequency range. Despite recent theoretical predictions of strongly bound excitons with unique properties, it remains experimentally challenging to probe excitonic quasiparticles due to the severe oxidation that occurs during device fabrication. In this study, we report the observation of strongly bound excitons and trions with highly anisotropic optical properties in intrinsic bilayer phosphorene, which are protected from oxidation by encapsulation with hexagonal boron nitride (hBN) in a field-effect transistor (FET) geometry. Reflection contrast and photoluminescence spectroscopy clearly reveal the linear-dichroic optical spectra from anisotropic excitons and trions in the hBN-encapsulated bilayer phosphorene. The optical resonances from the exciton Rydberg series indicate that the neutral exciton binding energy is over 100 meV even with the dielectric screening from hBN. The electrostatic injection of free holes enables an additional optical resonance from a positive trion (charged exciton) \ensuremath{\sim}30 meV below the optical band gap of the charge-neutral system. Our work shows exciting possibilities for monolayer and few-layer phosphorene as a platform to explore many-body physics and photonics and optoelectronics based on strongly bound excitons with twofold anisotropy.

Efficient Modulation of Magnon Conductivity in Y3Fe5O12 Using Anomalous Spin Hall Effect of a Permalloy Gate Electrode

We report the control of the modulation efficiency of the magnon conductivity in yttrium iron garnet (YIG) using magnon spin injection from a ferromagnetic metal permalloy (Py) used as a modulator in a three-terminal magnon transistor geometry. The modulation efficiency is estimated by means of nonlocal spin-transport measurements between platinum injector and detector strips. A charge current is sent through the Py modulator to create a spin accumulation at the YIG-Py interface via the spin Hall effect and the anomalous spin Hall effect (ASHE). We observe an enhancement of the modulation efficiency for the electrically generated magnons from 2.5%/mA at 10 mT to 4.7%/mA for magnetic fields higher than 50 mT. That enhancement is attributed to the ASHE, which is maximized when the Py magnetization is perpendicular to the charge current. However, the modulation efficiency of the thermally generated magnons exhibits an opposite behavior, 12.0%/mA at 10 mT to 6.6%/mA at 50 mT, which disagrees with what we expect from the ASHE contribution to the modulation.

Compact Source-Gated Transistor Analog Circuits for Ubiquitous Sensors

Silicon-based digital electronics have evolved over decades through an aggressive scaling process following Moore's law with increasingly complex device structures. Simultaneously, large-area electronics have continued to rely on the same field-effect transistor structure with minimal evolution. This limitation has resulted in less than ideal circuit designs, with increased complexity to account for shortcomings in material properties and process control. At present, this situation is holding back the development of novel systems required for printed and flexible electronic applications beyond the Internet of Things. In this work we demonstrate the opportunity offered by the source-gated transistor's unique properties for low-cost, highly functional large-area applications in two extremely compact circuit blocks. Polysilicon common-source amplifiers show 49 dB gain, the highest reported for a two-transistor unipolar circuit. Current mirrors fabricated in polysilicon and InGaZnO have, in addition to excellent current copying performance, the ability to control the temperature dependence (degrees of positive, neutral or negative) of output current solely by choice of relative transistor geometry, giving further flexibility to the design engineer. Application examples are proposed, including local amplification of sensor output for improved signal integrity, as well as temperature-regulated delay stages and timing circuits for homeostatic operation in future wearables. Numerous applications will benefit from these highly competitive compact circuit designs with robust performance, improved energy efficiency and tolerance to geometrical variations: sensor front-ends, temperature sensors, pixel drivers, bias analog blocks and high-gain amplifiers.

(Invited) Highly Doped Si1-XGex Epitaxy in View of S/D Applications

Modern CMOS devices are a fertile ground for innovation, as scaling and conceptual evolutions drive regular updates in process and material specifications. Requirements are usually set by device modelling, which defines the performance objectives for a new technology. Simulations recently carried out assuming fin [1] and nanosheet [2] field effect transistor geometries have for instance highlighted limitations due to the growing importance of contact resistance in devices with reduced dimensions. To meet the objectives, source/drain (S/D) contact regions receive a specific attention and aggressive targets are set to enable higher-performing generations of devices. Within this framework, contact resistivities (rc) lower than 1E-9 W.cm2 are specified for sub 5 nm technology nodes. Reaching this objective for n and p-type S/D is a challenging task, both from the perspectives of obtaining the right materials and of reliably measuring low rc values [3]. Several material parameters are known to affect the final contact resistivity. Novel epitaxial growth schemes are considered to maximize the active doping concentration to narrow the Schottky barrier at the metal - S/D interface. Additionally, the composition of and strain relaxation in the S/D layer affect band alignment and must be considered.This contribution focuses on S/D epitaxial layers grown and in-situ doped by chemical vapor deposition, and on the properties of fabricated Ti / p-Si1-xGex contacts. For a given Ge concentration, the Ti / Si1-xGex:B contact resistivity is minimized for an optimized range of Si1-xGe1-x:B layer thickness, and increases as the layer relaxes [4]. With increasing Ge content, the rise in contact resistivity begins for lower thicknesses. Observed trends are nevertheless similar (Fig. 1). Please note that the targeted boron concentration is constant within each series of samples but differs for different Ge concentrations. The variations in resistivity and contact resistivity as seen for different series are assigned to the different boron concentrations rather than the variation in Ge concentration. Indeed, lower resistivities and contact resistivities are measured for higher active boron concentrations.The correlation between the electrical properties and layer thickness reported in figure 1 confirms that preserving strain in the Si1-xGex:B S/D material is important. However, the increase in S/D layer and contact resistivities with increasing layer thickness is not caused by the (small) increase in electrical band gap. Instead, B incorporation during epitaxial growth is affected by the initiation of layer relaxation and decreases as the material relaxes (R) as can be concluded from Fig. 2. This figure shows the boron concentration as function of depth for two partially relaxed Si1-xGex with 25% and 65% Ge, respectively. A reduction in B incorporation when the S/D material thickness exceeds the critical thickness for strain relaxation (tc) is observed for the whole range of Ge concentrations. This phenomenon is supported by density functional theory results which indicate a reduced propensity of boron to occupy substitutional lattice sites in relaxed Si1-xGex.

Density functional study of gallium clusters on graphene: electronic doping and diffusion

Motivated by experimental results on transport properties of graphene covered by gallium atoms, the density functional theory study of clustering of gallium atoms on graphene (up to a size of 8 atoms) is presented. The paper explains a rapid initial increase of graphene electron doping by individual Ga atoms with Ga coverage, which is continually reduced to zero, when bigger multiple-atom clusters have been formed. According to density functional theory calculations with and without the van der Waals correction, gallium atoms start to form a three-dimensional cluster from five and three atoms, respectively. The results also explain an easy diffusion of Ga atoms while forming clusters caused by a small diffusion barrier of 0.11 eV. Moreover, the calculations show this barrier can be additionally reduced by the application of an external electric field, which was simulated by the ionization of graphene. This effect offers a unique possibility to control the cluster size in experiments only by applying a gate-voltage to the graphene in a field-effect transistor geometry and thereby without growth temperature assistance.

DC Characterization and Fast Small-Signal Parameter Extraction of Organic Thin Film Transistors With Different Geometries

Organic Devices offer low-cost manufacturing and better flexibility, sustainability and solution-processability than their Si-based MOS counterparts, which make them suitable for new applications where those characteristics are an advantage. However, organic device performance is still far from that provided by CMOS technology and many issues are still unclear. In this work, a performance comparison is made between Interdigitated and Corbino geometries of Organic Thin Film Transistors (OTFT), with different areas but fabricated with identical stack materials and techniques. To this end, I-V characteristics and C-V curves of the OTFTs were measured and a Common-Source circuit was proposed and implemented for extracting relevant electrical parameters of the devices, through a standard small signal analysis. The parameter extraction methodology in the frequency domain proposed allows rapid testing of the device/circuit performance of this technology, which for the first time is applied to organic devices. Results show that despite the large voltages, organic transistors exhibit similar channel dimension dependencies to MOS devices and can be also described by the same small signal model.

Halide perovskite memtransistor enabled by ion migration

We exploit the problem of ion migration in the halide perovskite CH3NH3PbI3 (MAPbI3) by developing a memtransistor (i.e. hybrid memristor and transistor) with the field-effect transistor geometry. Application of an electric field between the drain and the source results in resistive switching from a high resistance state (HRS) to a low resistance state (LRS) due to dynamic redistribution of ions in the MAPbI3 layer. The gate enables continuous tuning of this LRS across several orders of magnitude. The LRS persists after removing the power supply and the memtransistor can be switched back to the HRS by reversing the bias polarity. Excellent state retention is demonstrated for 104 s and a switching ratio (HRS/LRS) of 102 is maintained for 1000 cycles, thus confirming good retention and cyclic endurance for the resistive switching behavior. Continuous tuning of the state conductance is essential for neuromorphic architectures and hard to achieve with two-terminal memristors.

Extraction of Statistical Gate Oxide Parameters From Large MOSFET Arrays

In modern MOS technologies continuous scaling of the geometry of transistors has led to an increase of the variability between nominally identical devices. To study the variability and reliability of such devices, a statistically significant number of samples needs to be tested. In this work we present a characterization study of defects causing BTI and RTN, performed on custom built arrays consisting of thousands of nanoscale devices. In such nanoscale devices, variability and reliability issues are typically analyzed for individual defects. However, the large number of measurements needed to extract statistically meaningful results make this approach infeasible. To analyze the large set of measurement data, we employ statistical distributions of the threshold voltage shifts arising from defects that capture and emit charge. This allows us to extract defect statistics using a defect-centric approach. Defect distributions are characterized for various gate, drain and bulk biases, and for two geometries to verify the methodology and to obtain statistics suitable for TCAD modeling and lifetime estimation. With the TCAD models we extrapolate the observed degradation of the devices. Finally, we investigate the influence of bulk and drain stress biases on the defects and observe that the impact of bulk bias on the device degradation is similar to that of the gate bias. In contrast, drain stress with drain biases up to −0.45V appears to be negligible for the investigated technology. Our measurements also clearly reveal that the overall BTI degradation is heavily dependent on the gate-bulk stress bias, while the extracted number of RTN defects seems to be independent on stress.

Retina-Inspired Carbon Nitride-Based Photonic Synapses for Selective Detection of UV Light.

Photonic synapses combine sensing and processing in a single device, so they are promising candidates to emulate visual perception of a biological retina. However, photonic synapses with wavelength selectivity, which is a key property for visual perception, have not been developed so far. Herein, organic photonic synapses that selectively detect UV rays and process various optical stimuli are presented. The photonic synapses use carbon nitride (C3 N4 ) as an UV-responsive floating-gate layer in transistor geometry. C3 N4 nanodots dominantly absorb UV light; this trait is the basis of UV selectivity in these photonic synapses. The presented devices consume only 18.06 fJ per synaptic event, which is comparable to the energy consumption of biological synapses. Furthermore, in situ modulation of exposure to UV light is demonstrated by integrating the devices with UV transmittance modulators. These smart systems can be further developed to combine detection and dose-calculation to determine how and when to decrease UV transmittance for preventive health care.

Robust axion insulator and Chern insulator phases in a two-dimensional antiferromagnetic topological insulator.

The intricate interplay between non-trivial topology and magnetism in two-dimensional materials can lead to the emergence of interesting phenomena such as the quantum anomalous Hall effect. Here we investigate the quantum transport of both bulk crystal and exfoliated MnBi2Te4 flakes in a field-effect transistor geometry. For the six septuple-layer device tuned into the insulating regime, we observe a large longitudinal resistance and zero Hall plateau, which are characteristics of an axion insulator state. The robust axion insulator state occurs in zero magnetic field, over a wide magnetic-field range and at relatively high temperatures. Moreover, a moderate magnetic field drives a quantum phase transition from the axion insulator phase to a Chern insulator phase with zero longitudinal resistance and quantized Hall resistance h/e2, where h is Planck's constant and e is electron charge. Our results pave the way for using even-number septuple-layer MnBi2Te4 to realize the quantized topological magnetoelectric effect and axion electrodynamics in condensed matter systems.

Two-dimensional C3N based sub-10 nanometer biosensor.

Detection and sequencing of various nucleobases are of immense usefulness that can revolutionise future medical diagnostics procedures. In this regard, the newly discovered 2D material, C3N, has demonstrated supreme potential for future nanoelectronic and spintronic developments due to its unique sets of electronic properties and structural similarity to graphene. Herein, we have investigated the effect of various nucleobases in the close vicinity of a C3N nanoribbon. Our extensive calculations revealed significant changes in the transport behaviour in the presence of DNA/RNA molecules. The transport response can be further modified through the (i) incorporation of doping, (ii) presence of defects, (iii) concentration of the adsorbed molecule, etc. Furthermore, in the presence of a gate voltage in a field-effect transistor (FET) geometry, the conductivity response can be improved significantly with an ∼100% change in the presence of an adsorbed molecule. The observation of a negative differential resistance (NDR) in the C3N system has also been reported here for the first time. Our current observation demonstrates the usefulness of the C3N system as a next generation bio-sensor for the sequencing of various nucleobases, offering new leads for future developments in bioelectronics, superior sensing architectures and sustainable designs.

On Soft Errors in the Conjugate Gradient Method: Sensitivity and Robust Numerical Detection

The conjugate gradient (CG) method is the most widely used iterative scheme for the solution of large sparse systems of linear equations when the matrix is symmetric positive definite. Although more than sixty year old, it is still a serious candidate for extreme-scale computation on large computing platforms. On the technological side, the continuous shrinking of transistor geometry and the increasing complexity of these devices affect dramatically their sensitivity to natural radiation, and thus diminish their reliability. One of the most common effects produced by natural radiation is the single event upset which consists in a bit-flip in a memory cell producing unexpected results at application level. Consequently, the future computing facilities at extreme scale might be more prone to errors of any kind including bit-flip during calculation. These numerical and technological observations are the main motivations for this work, where we first investigate through extensive numerical experiments the sensitivity of CG to bit-flips in its main computationally intensive kernels, namely the matrix-vector product and the preconditioner application. We further propose numerical criteria to detect the occurrence of such faults; we assess their robustness through extensive numerical experiments.

Thickness-dependent charge transport in exfoliated indium selenide vertical field-effect transistors

As a layered, two-dimensional material with high charge carrier mobility and photoresponsivity, exfoliated indium selenide (InSe) is being actively studied for a variety of optoelectronic applications. While significant effort has been devoted to characterizing the in-plane electronic properties of InSe, charge transport in the out-of-plane direction has been underreported despite its importance in vertical field-effect transistors, photodetectors, and related van der Waals heterostructure devices. Here, we fill this knowledge gap by performing variable temperature and variable thickness charge transport measurements in the out-of-plane direction for exfoliated InSe crystals. A vertical field-effect transistor geometry is utilized with a bulk metal top contact and single-layer graphene bottom contact such that electrostatic gating can be performed via the underlying Si substrate. In contrast to lateral InSe transistors, vertical InSe transistors show decreasing conductance at low temperatures, which is explained by the temperature dependence of tunneling and field-emission currents. While thinner InSe crystals are dominated by Fowler-Nordheim tunneling, thicker InSe crystals show increasing contribution from thermionic emission. In addition, the graphene/InSe barrier height can be modulated by the gate potential, resulting in vertical field-effect transistor current switching ratios up to 104. Overall, this study provides fundamental insight into the out-of-plane electronic properties of exfoliated InSe, which will inform ongoing efforts to realize ultrathin InSe device applications.

Performance Analysis of Inductive Source Degeneration Low Noise Amplifier using Multi-finger Technique

In the current paper, common source Low Noise Amplifier using inductively degenerated technique is designed to meet Radio Frequency (RF) range 2.45 GHz-2.85 GHz. The designed LNA is implemented using single and multi-finger transistor logic. The transistor geometry greater than 300 μm has been split into multiple fingers using multi-finger technology. The schematic is captured using ADS. The performance of LNA for various technologies has been analyzed using PTM 180 nm, PTM 130 nm and PTM 90 nm models. The amplifier with single transistor achieves minimum noise figure of 0.178 dB noise figure and maximum gain of 20.045 dB using 130 nm model technology for Bluetooth applications. Similarly 0.288 dB of minimum noise figure and peak gain of 17.971 dB are obtained using multi-finger MOSFET of PTM 90 nm technologyrespectively.The reverse isolation (S12) below -50 dB is achieved.

Concurrent Subthermionic and Strong Thermionic Transport in Inkjet‐Printed Indium Zinc Oxide/Silver Hybrid‐Channel Field‐Effect Transistors

AbstractSubthreshold slope of field‐effect transistors (FETs) less than the fundamental Boltzmann limit (60 mV dec−1 at 300 K) is demonstrated either using band‐to‐band tunneling or negative capacitance (NC) ferroelectric‐gate transistors. However, it is difficult to replicate both of these strategies in solution‐processed/printed FETs. Nonetheless, it is shown that the use of a metal–insulator–metal–semiconductor architecture alongside electrolyte gating can simultaneously create highly reproducible static negative capacitance behavior in printed FETs, resulting in subthermionic transport for over four decades of drain currents with a subthreshold slope as low as 16 mV dec−1, and thereafter a strong thermionic transport regime, characterized by an unprecedented On‐current of 195 µA µm−1, a transconductance of 215 µS µm, and a metal‐like On‐state resistance of only 96 Ω. The present device architecture is analogous to typical metal oxide semiconductor field‐effect transistor (MOSFET) geometry with printed amorphous indium zinc oxide (a‐IZO) as the semiconductor material, besides an additional metal layer on top of the a‐IZO channel that reduces the actual semiconducting channel dimension to the thickness of the printed a‐IZO layer. While the steep slope subthermionic transport regime can be utilized at wearable sensor interfaces, the high On‐currents/channel conductance can be used in optoelectronic applications, high‐current switches, and amplifiers.

Monotype Organic Dual Threshold Voltage Using Different OTFT Geometries

It is well known that organic thin film transistor (OTFT) parameters can be shifted depending on the geometry of the device. In this work, we present two different transistor geometries, interdigitated and Corbino, which provide differences in the key parameters of devices such as threshold voltage (VT), although they share the same materials and fabrication procedure. Furthermore, it is proven that Corbino geometries are good candidates for saturation-mode current driven devices, as they provide higher ION/IOFF ratios. By taking advantage of these differences, circuit design can be improved and the proposed geometries are, therefore, particularly suited for the implementation of logic gates. The results demonstrate a high gain and low hysteresis organic monotype inverter circuit with full swing voltage at the output.

Strain-based room-temperature non-volatile MoTe2 ferroelectric phase change transistor.

The primary mechanism of operation of almost all transistors today relies on the electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on' state to a non-conducting 'off' state. As transistors continue to scale down to increase computational performance, physical limitations from nanoscale field-effect operation begin to cause undesirable current leakage, which is detrimental to the continued advancement of computing1,2. Using a fundamentally different mechanism of operation, we show that through nanoscale strain engineering with thin films and ferroelectrics the transition metal dichalcogenide MoTe2 can be reversibly switched with electric-field-induced strain between the 1T'-MoTe2 (semimetallic) phase to a semiconducting MoTe2 phase in a field-effect transistor geometry. This alternative mechanism for transistor switching sidesteps all the static and dynamic power consumption problems in conventional field-effect transistors3,4. Using strain, we achieve large non-volatile changes in channel conductivity (Gon/Goff ≈ 107 versus Gon/Goff ≈ 0.04 in the control device) at room temperature. Ferroelectric devices offer the potential to reach sub-nanosecond non-volatile strain switching at the attojoule/bit level5-7, with immediate applications in ultrafast low-power non-volatile logic and memory8 while also transforming the landscape of computational architectures because conventional power, speed and volatility considerations for microelectronics may no longer exist.