Time-dependent Dielectric Breakdown Degradation Research Articles

Proton Irradiation Effects on the Time-Dependent Dielectric Breakdown Characteristics of Normally-Off AlGaN/GaN Gate-Recessed Metal-Insulator-Semiconductor Heterostructure Field Effect Transistors.

In this work, we investigated the time-dependent dielectric breakdown (TDDB) characteristics of normally-off AlGaN/GaN gate-recessed metal–insulator–semiconductor (MIS) heterostructure field effect transistors (HFETs) submitted to proton irradiation. TDDB characteristics of normally-off AlGaN/GaN gate-recessed MISHFETs exhibited a gate voltage (VGS) dependence as expected and showed negligible degradation even after proton irradiation. However, a capture emission time (CET) map and cathodoluminescence (CL) measurements revealed that the MIS structure was degraded with increasing trap states. A technology computer aided design (TCAD) simulation indicated the decrease of the vertical field beneath the gate due to the increase of the trap concentration. Negligible degradation of TDDB can be attributed to this mitigation of the vertical field by proton irradiation.

Breakdown Characteristics of TiN/HfxZr1-xO2/Al2O3/Ge Gate Stacks

This work evaluates the time dependent dielectric breakdown (TDDB) characteristics of TiN/ HfxZr1-xO2/Al2O3/Ge gate stacks by changing the Zr content and with slot-plane antenna plasma oxidation (SPAO), performed immediately after the ALD deposition of the high-k layers. It was observed that the equivalent oxide thickness (EOT) decreases with Zr addition in HfO2 with up to 75% of Zr incorporation. With 100% Zr incorporation EOT increased significantly. This is possibly due to the formation of low-k interfacial GeO2 at the interface for 100% Zr whereas for other samples have comparatively thinner GeOx interfacial layers. Weibull plots shows that charge to breakdown (Q BD) increased with increase the Zr percentage. However, the breakdown acceleration factor decreased with Zr percentage up to 75% and increased rapidly for 100% Zr content. It is, therefore, believed that GeO2 leads the TDDB degradation.

The Effect of Defects on Time Dependent Dielectric Breakdown Acceleration in TiN/ZrO2/Al2O3/p-Ge Gate Stacks

Introduction of a thin GeO2 as the interfacial layer (IL) seems to be beneficial for formation of high-k gate stacks on germanium substrate. The thickness of GeO2/GeOx impacts the overall equivalent oxide thickness (EOT) because of its low dielectric constant compared to high-k layer. Current trends indicate that the formation of appropriate thickness of GeOx or GeO2 between high-k and Ge substrate seems to have low interface state density (D it). Since ZrO2 showed lower leakage current than HfO2 with similar dielectric high-k stack, ZrO2/Al2O3 bilayer as gate dielectric is becoming popular. Even though excellent gate stacks on germanium substrate has been demonstrated the reliability and the impact of interfacial layer is still unknown. This work investigates the p-Ge/Al2O3/ZrO2/TiN gate stacks with thin GeO2 or GeOx layer, formed when the gate stack was exposed to pre- or post-deposition slot plane antenna plasma oxidation (SPAO). The post Al2O3/ZrO2 deposition SPAO forms relatively thicker GeO2 and post Al2O3 deposition SPAO forms thinner GeO2 whereas pre-deposition SPAO forms thin fragmented GeOx layer at the interface. We have observed that the relatively thicker GeO2 interfacial layer formed after the post Al2O3/ZrO2 deposition SPAO degraded faster during time dependent dielectric breakdown (TDDB) measurements on substrate injection mode compared to the thin GeO2 or GeOx interfacial layers (Fig. 1). The improvement in TDDB degradation for thinner interfacial layer thickness suggests that electrons tunnel through the thinner GeOx IL, and TDDB measured the quality of Al2O3 rather than IL. The TDDB characteristics in gate injection mode suggests that the SPAO can significantly affect the TDDB characteristics GEI mode (Fig. 1). The SPAO treatment effectively removes the trap centers in ZrO2 and Al2O3 layers when SPAO was performed after the gate stack deposition. By employing carrier transport mechanisms as a function of temperature in both gate and substrate injection mode we were able to identify the traps that contributes to the TDDB degradation. The trap center (f t1 = 0.13 eV) observed in the ZrO2 when ZrO2 is not subjected to the SPAO, i.e. pre-deposition SPAO. This trap f t1 (0.13 eV) was eliminated for post Al2O3/ZrO2 deposition SPAO. While defects in the ZrO2 layer determines the TDDB characteristics in gate injection mode the GeO2 or GeOx interfacial layer thickness determines the TDDB degradation in substrate injection mode. Figure 1

TEM Investigation of Time-Dependent Dielectric Breakdown Mechanisms in Cu/Low-k Interconnects

The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. The aggressive scaling of feature sizes, on both devices and interconnects, poses serious challenges to ensure the required product reliability. Conventional reliability tests and postmortem failure analysis provide only limited information about the physics of failure mechanisms and degradation kinetics. Therefore, it is necessary to develop new experimental approaches and procedures to study the time-dependent failure mechanisms and degradation kinetics, in particular. In this paper, comprehensive transmission electron microscopy (TEM), particularly an in situ experimental methodology, is demonstrated to investigate the TDDB degradation and failure mechanisms in Cu/low-k interconnect stacks. A dedicated “tip-to-tip” test structure is designed in the 32-nm complementary metal–oxide–semiconductor (CMOS) technology node, to restrict the failure site, and is the key basis for the in situ and ex situ TEM investigations. High-quality imaging and chemical analysis are used to identify the failure mechanism and study the kinetic process. The in situ electrical test is also integrated into the in situ TEM investigation, to provide an elevated electric field to the dielectrics. Electron tomography is utilized to characterize the directed Cu diffusion in the insulating dielectrics. These experimental approaches open a different possibility to study the TDDB failure mechanism in interconnect stacks of microelectronic products, and it could also be extended to other structures in active devices.

The effect of vacuum ultraviolet irradiation on the time-dependent dielectric breakdown of organosilicate dielectrics

In this work, the effect of vacuum ultraviolet (VUV) exposure on the time-dependent dielectric breakdown (TDDB) properties of porous low-k films was investigated. Synchrotron irradiation was used to simulate the VUV photon irradiation from processing plasmas without any particle flux. The synchrotron flux varies with the wavelength, so the irradiation time was chosen to produce the same fluence at various photon energies. The deterioration of TDDB and generation of negative mobile charge were observed in the film after exposure to the VUV photons with 9 eV or higher energy. These effects were not observed in the films exposed with 7-eV photon energies or less. The creation of paramagnetic defects was observed with the ESR measurement and believed to be the reason for TDDB degradation. Depletion of carbon and breakage and rearrangement of the Si-O-Si structure were observed and believed to be the reason for mobile charge generation and the change in TDDB, chemical, and mechanical properties.

In Situ Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devices.

The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. The aggressive scaling of feature sizes, both on devices and interconnects, leads to serious challenges to ensure the required product reliability. Standard reliability tests and post-mortem failure analysis provide only limited information about the physics of failure mechanisms and degradation kinetics. Therefore it is necessary to develop new experimental approaches and procedures to study the TDDB failure mechanisms and degradation kinetics in particular. In this paper, an in situ experimental methodology in the transmission electron microscope (TEM) is demonstrated to investigate the TDDB degradation and failure mechanisms in Cu/ULK interconnect stacks. High quality imaging and chemical analysis are used to study the kinetic process. The in situ electrical test is integrated into the TEM to provide an elevated electrical field to the dielectrics. Electron tomography is utilized to characterize the directed Cu diffusion in the insulating dielectrics. This experimental procedure opens a possibility to study the failure mechanism in interconnect stacks of microelectronic products, and it could also be extended to other structures in active devices.

Impact of carbon-doping on time dependent dielectric breakdown of SiO2-based films

Impact of carbon-doping on time dependent dielectric breakdown (TDDB) of three SiO2-based films was investigated under two different breakdown mechanisms, one involving Cu ion injection and the other caused by intrinsic dielectric degradation without Cu injection. In the case of breakdown dominated by dielectric degradation, an undoped SiO2 film shows better TDDB performance than the two other carbon-doped SiO2 or organo-silicate glass films, suggesting that carbon-doping makes the films weaker for dielectric breakdown. In contrast, in the case of breakdown involving Cu ion injection, the two carbon-doped films show better TDDB performance than the undoped SiO2, suggesting that the presence of the carbon slows down Cu ion injection and therefore leads to less TDDB degradation.

Failure mechanism analysis and process improvement on time-dependent dielectric breakdown of Cu/ultra-low-k dielectric based on complementary Raman and FTIR spectroscopy study

Time-dependent dielectric breakdown (TDDB) is one of the most important reliability issues in Cu/low-k technology development. With continuous technology scalings to nanometer scales, TDDB issue is further exacerbated. In this paper, two failure mechanisms were investigated: the Ta ions migration model and the line-edge-roughness (LER) model, which is rendering the observed TDDB failure. Complimentary Raman and FTIR spectroscopy was applied to investigate the dielectric bonding characteristics. Our experimental results revealed the TDDB degradation behavior of Cu/ultra-low-k interconnects, suggesting the intrinsic degradation of the ultra-low-k dielectric. No out-diffusion of Cu ions was observed in Cu/Ta/TaN/SiCOH structures. Extensive TEM analysis further verified the migration of Ta ions from the Ta/TaN barrier bi-layer into the ultra-low-k dielectrics. Based on the LER model analysis, a comparative study in both passing and failing die elaborates that the sloped trench/via profile affected the TDDB performance.

A New In Situ Microscopy Approach to Study the Degradation and Failure Mechanisms of Time‐Dependent Dielectric Breakdown: Set‐Up and Opportunities

The time dependent dielectric breakdown (TDDB) in copper/ultra‐low‐k on‐chip interconnect stacks of integrated circuits has become one of the most critical reliability concerns in recent years. In this paper, a novel experimental in situ microscopy approach using transmission X‐ray microscopy (TXM) and scanning transmission electron microscopy (STEM) is proposed to study TDDB degradation and failure mechanisms. It combines electrical testing and imaging techniques. Low‐dose bright field (BF) STEM inserting a small condenser aperture is chosen to reduce the beam damage of the dielectric material, while the electron spectroscopic imaging technique is used for the chemical analysis to detect the migration path of Cu atoms. This new experimental approach will contribute to an improved understanding of the TDDB effect.

In situ study on low-k interconnect time-dependent-dielectric-breakdown mechanisms

An in situ transmission-electron-microscopy methodology is developed to observe time-dependent dielectric breakdown (TDDB) in an advanced Cu/ultra-low-k interconnect stack. A test structure, namely a “tip-to-tip” structure, was designed to localize the TDDB degradation in small dielectrics regions. A constant voltage is applied at 25 °C to the “tip-to-tip” structure, while structural changes are observed at nanoscale. Cu nanoparticle formation, agglomeration, and migration processes are observed after dielectric breakdown. The Cu nanoparticles are positively charged, since they move in opposite direction to the electron flow. Measurements of ionic current, using the Triangular-Voltage-Stress method, suggest that Cu migration is not possible before dielectric breakdown, unless the Cu/ultra-low-k interconnect stacks are heated to 200 °C and above.

Evidence of ultra-low-k dielectric material degradation and nanostructure alteration of the Cu/ultra-low-k interconnects in time-dependent dielectric breakdown failure

Ultra-low-k time-dependent dielectric breakdown (TDDB) is one of the most important reliability issues in Cu/low-k technology development due to its weaker intrinsic breakdown strength compared to SiO2 dielectrics. With continuous technology scaling, this problem is further exacerbated for Cu/ultra-low-k interconnects. In this letter, the TDDB degradation behavior of ultra-low-k dielectric in Cu/ultra-low-k interconnects will be investigated by a method consisting of a combination of Raman with Fourier transform infrared vibrational microscopes. In TDDB tests on Cu/low-k interconnect, it was found that intrinsic degradation of the ultra-low-k dielectric would first occur under electrical field stress. Upon further electrical field stress, the ultra-low-k dielectric degradation would be accelerated due to Ta ions migration from the Ta/TaN barrier bi-layer into the ultra-low-k dielectrics. In addition, no out-diffusion of Cu ions was observed in our investigation on Cu/Ta/TaN/SiCOH structures.

Time-dependent dielectric breakdown of plasma-exposed porous organosilicate glass

Time-dependent dielectric breakdown (TDDB) is a major concern for low-k organosilicate dielectrics. To examine the effect of plasma exposure on TDDB degradation, time-to-breakdown measurements were made on porous SiCOH before and after exposure to plasma. A capillary-array window was used to separate charged particle and vacuum ultraviolet (VUV) photon bombardment. Samples exposed to VUV photons, and a combination of VUV photons and ion bombardment exhibited significant degradation in breakdown time. The samples exposed to VUV photons and ion bombardment showed more degradation in breakdown time in comparison to samples exposed to VUV photons alone.

Effects of Cu surface roughness on TDDB for direct polishing ultra-low k dielectric Cu interconnects at 40nm technology node and beyond

The time-dependent dielectric breakdown (TDDB) reliability performance of back-end-of-line (BEOL) structures has been demonstrated to obviously correlate with the surface roughness of Cu metal line. Larger Cu surface roughness could induce the cracking of metal capping layer and the degradation of TDDB. More ultra-low k (ULK) polishing amount and higher de-ionized water (DIW) dilute ratio post-Cu chemical mechanical polishing (Cu-CMP) chemical cleaning process have been developed to reduce Cu surface roughness for better TDDB performance read-out. An optimized post-cleaning process with adjusted brush gap condition has been demonstrated to eliminate microscratch level with the improvements of the yield of Cu wide line serpent open test structures and TDDB performance at 28nm technology node.

Advanced Organic Polymer for the Aggressive Scaling of Low-k Materials

An advanced organic polymer material of k = 2.2 has been successfully integrated in Cu lines with dielectric spacing from 80 to 20 nm. Cu lines with both TaN/Ta barrier and no barrier were fabricated. Current–voltage (I–V) and time dependent dielectric breakdown (TDDB) measurements were performed to study the scalability of this material. In the case of TaN/Ta barrier, no TDDB degradation was observed at 100 °C as the dielectric spacing changed from 80 to 30 nm. In the case of no barrier, TDDB performance at 100 °C was better than that of SiO2 without a barrier. However, TDDB at 200 °C showed a clear degradation. In contrast, no such degradation was present when TaN/Ta barrier was used.

Effects of Post-CMP Cleaning on Time Dependent Dielectric Breakdown and Electro-Migration in Porous Low-k/Cu Interconnects

The influences of post Cu chemical-mechanical-polish cleaning time on time dependent dielectric breakdown (TDDB) and electro-migration (EM) are reported. Cu residue remaining on the porous-low-k (pLK) film surface between Cu lines is a significant factor in TDDB lifetime when the cleaning time is short. In contrast, a longer cleaning time generates low Cu residue on the pLK surface but results in high Cu surface roughness, which leads to TDDB degradation. For EM performance, slightly higher roughness could improve the adhesion of the dielectric barrier layer to the Cu surface, thus increasing its mean time to failure. Further increases in Cu surface roughness, caused by extended cleaning, may generate a seam in the dielectric barrier layer at the deep-recessed trench area. The seam degrades the adhesion strength of the dielectric barrier to Cu and is the initiating site of Cu migration. As a result, it significantly degrades the EM lifetime.

Cu/low- k dielectric TDDB reliability issues for advanced CMOS technologies

With the wide application of low- k and ultra-low- k dielectric materials at the 90 nm technology node and beyond, the long-term reliability of such materials is rapidly becoming a critical challenge for technology qualification. Low- k time-dependent dielectric breakdown (TDDB) is usually considered as one of the most important reliability issues during Cu/low- k technology development because low- k materials generally have weaker intrinsic breakdown strength than traditional SiO 2 dielectrics. This problem is further exacerbated by the aggressive shrinking of the interconnect pitch size due to continuous technology scaling. In this paper, three critical issues of low- k TDDB characteristics during low- k development and qualification will be reviewed. In the first part, a low- k TDDB field acceleration model and its determination will be discussed. In the second part, low- k dielectric time-to-breakdown ( t BD) statistical distribution and TDDB area scaling law for reliability projection will be examined. In the last part, as low- k TDDB has been found to be sensitive to all aspects of integration, the effects of process variations on low- k TDDB degradation will be demonstrated. Some key aspects which need to be carefully addressed to control overall low- k TDDB performance from process and integration side will be discussed.

Study on Factors in Time-Dependent Dielectric Breakdown Degradation of Cu/Low-k Integration Related to Cu Chemical–Mechanical Polishing

We studied Cu/low-k integration to test the time-dependent dielectric breakdown (TDDB) reliability of Cu interconnects. We described the TDDB lifetime dependence on SiOC damage caused by sputtering and chemical–mechanical polishing (CMP) processes. The TDDB lifetime of the structure without a cap-SiO layer was three orders of magnitude shorter than that of the structure with the cap layer. However, the film properties of cap-SiO films thinner than 30 nm have a leakage path that allows TDDB degradation to occur easily. We also confirmed that narrowing of intermediate wiring levels with metal-to-metal spacing approaching 100 nm degrades TDDB performance. Moreover, we showed the possibility that chemical attack and mechanical destruction during the polishing cause degradation of TDDB. Optimizing CMP conditions and eliminating the CMP-surface leakage path likely improve line-to-line insulating reliability, such as leakage current and TDDB, because these reliabilities are dominated by the extrinsic failure mode.

Dielectric degradation mechanism for copper interconnects capped with CoWP

Time-dependent dielectric breakdown (TDDB) reliability of CoWP-capped copper/SiO2 interconnect structures are observed to be better than conventional SiN-capped structures. The activation energy for TDDB (Ea) is higher for CoWP-capped structures (0.66–0.84eV) as compared to SiN-capped ones (0.47eV), and is comparable to the Ea for intrinsic breakdown of SiO2. The TDDB degradation mechanism in CoWP-capped structures is postulated to be dominated by the properties of the intrametal dielectric, as opposed to being influenced by the properties of dielectric cap and associated interfaces. The presence of the dielectric cap lowers the Ea and increases leakage by Poole–Frenkel emission.

Influence of CMP Slurries and Post-CMP Cleaning Solutions on Cu Interconnects and TDDB Reliability

We investigated Cu/low-k integration to test the time-dependent dielectric breakdown (TDDB) reliability of Cu interconnects. We described the relationship between TDDB lifetime and defects possibly caused by the Cu chemical-mechanical polishing (CMP) process, such as rough copper surface corrosion, crevice corrosion, and scratches, using Cu/silicon oxycarbide interconnects. Although rough copper surface corrosion has an insignificant effect on the TDDB lifetime, crevice corrosion at the edges of wires does cause TDDB degradation. We also found that a structure’s TDDB lifetime was affected by the kind of post-CMP cleaning solutions used when barrier metal slurries do not contain benzotriazole (BTA). These results indicate that two types of processes for post-CMP cleaning should be used. It is best to use solutions that do not have strong oxidized copper dissolution ability but can remove particles when a barrier metal slurry with an inhibitor other than BTA is used. Also good are solutions with a strong oxidized copper dissolution ability that have been optimized to prevent Cu corrosion when a barrier metal slurry with BTA is used. To improve TDDB reliability, care must be taken with regard to the combination of the barrier metal slurry and the post-CMP cleaning solution.

Characterization of Line-Edge Roughness in Cu/Low-k Interconnect Pattern

To establish a method of measuring interconnect line-edge roughness (LER), low-k line patterns were observed and electric field concentration was simulated on the basis of observation results. Wedge-shaped LERs were observed at the edges of low-k lines, and the bottom and the top widths of the average wedge feature were 60 and 7 nm (or smaller), respectively. Simulation showed that LER causes serious electric field concentration, which may cause the degradation of time-dependent dielectric breakdown (TDDB) lifetime at 100-nm-pitch Cu/low-k interconnects. The maximum electric field strength depends on the conventional LER metric 3Rq, but depends more strongly on the wedge angle, the curvature of the tip. That is, other metrics such as wedge angle can predict fatal electric field concentration caused by LER than the conventional metric 3Rq.