Three-mask Process Research Articles

Electrical Characterization of InGaZnO-Based Thin Film Transistor fabricated by Three-mask Process

Indium Gallium Zinc Oxide (InGaZnO) has gained increasing attention as a replacement for amorphous silicon in thin-film transistors (TFTs) owing to its excellent electrical and optoelectronic properties, chemical stability, and potential for low-temperature processing.
 However, efforts are being made to optimize the design to improve the performance and reduce costs.
 In this study, a top-contact top-gate (TCTG) structure of InGaZnO TFTs was fabricated using three lithography steps. The electrical current–voltage characteristics of the device were measured and used to extract the device parameters.
 The result shows transistor parameters with threshold voltage of –9 V, ON-OFF ratio of in the range of 103, maximum mobility of 1.15 cm2V-1 s-1, subthreshold slope of in the range of 103 mV/dec, and maximum interface trap density of 1.53x103 (cm-2eV-1) at maximum applied voltage of 5 V.

A High-Resolution MEMS Capacitive Force Sensor With Bionic Swallow Comb Arrays for Ultralow Multiphysics Measurement

Precise force sensing is essential for the mechanical characterization and robotic micromanipulation of biological targets. In this work, a high-resolution MEMS capacitive force sensor was proposed for measuring ultralow multiphysics. A bionic swallow structure that contained multiple feathered comb arrays was designed for reducing chip dimension and eliminating undesirable mechanical cross-coupling effect. The comb structure was optimized for maximum sensitivity, linearity, and compact chip size. Utilizing a novel interconnection configuration, interferences derived from parasitic capacitance and electrostatic forces exerted negligible effects on the sensor output. The proposed bionic force sensor was fabricated following a simple three-mask process and integrated with ASIC readouts. Its measuring sensitivity was 7.151 fF/nm, 0.529 aF/nN, and 4.247 pF/g for displacement, force, and inclination measurements, respectively. The proposed sensor had a large measurement range of 1000.00 nm and 13.83 µN with a high linearity of 0.9998. The 1-σ resolution was 0.0328 nm and 0.4436 nN, and the noise floor resolution was 0.0044 nm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\sqrt {{\bm{Hz}}} $</tex-math></inline-formula> and 0.0597 nN/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\sqrt {{\bm{Hz}}} $</tex-math></inline-formula> for displacement and force measurements, respectively. The bias stability of Allan deviance was 0.0050 nm and 0.0678 nN at an integration time of 0.65 s. The proposed bionic swallow sensor exhibited considerable improvement over existing capacitive sensors and feasibility for ultralow multiphysics measurement in biomedical applications.

Using SiO&lt;sub&gt;2&lt;/sub&gt; Hard Mask for Fabrication of Micro Fresnel Focusing Lens for Ultrasonic Ejectors

The fabrication of Fresnel focusing lenses operating at frequencies of 100 and 200 MHz was investigated in order to enhance the focusing efficiency of ultrasonic energy. The effects of process parameters on the four-level Fresnel lens profiles were discussed to find a most feasible fabrication procedure through these experiments. The quality of Fresnel lenses was improved when two-and three-mask processes using SiO2 film as the hard mask were employed. Besides, a better side-wall profile of Fresnel lens was obtained by using the three-mask process as compared to the two-mask one.

Three-Mask Elevated-Metal Metal-Oxide Thin-Film Transistor With Self-Aligned Definition of the Active Island

Bottom-gate thin-film transistors (TFTs) are currently fabricated using either a three-mask back-channel-etched (BCE) or, with an additional mask for the definition of an etch-stop (ES) layer, a four-mask technology. The former offers a lower cost of manufacturing and a higher resolution, while the latter provides better device characteristics in terms of both performance and reliability. Presently reported is a three-mask process for realizing an elevated-metal metal-oxide TFT employing self-aligned patterning of the active island, also inherently incorporating an ES layer. This technology offers a TFT that combines the same protection of the channel, and hence, the good characteristics of an ES TFT, with the lower cost, reduced parasitic overlap capacitance, and smaller device-footprint of a BCE TFT.

Fabrication and characterization of Cu-Sn-Ni-Cu interconnection microstructure for electromigration studies in 3D integration

Purpose The purpose of this paper is to fabricate a new Cu-Sn-Ni-Cu interconnection microstructure for electromigration studies in 3D integration. Design/methodology/approach The Cu-Sn-Ni-Cu interconnection microstructure is fabricated by a three-mask photolithography process with different electroplating processes. This microstructure consists of pads and conductive lines as the bottom layer, Cu-Sn-Ni-Cu pillars with the diameter of 10-40 μm as the middle layer and Cu conductive lines as the top layer. A lift-off process is adopted for the bottom layer. The Cu-Sn-Ni-Cu pillars are fabricated by photolithography with sequential electroplating processes. To fabricate the top layer, a sputtered Cu layer is introduced to prevent the middle-layer photoresist from being developed. With the final Cu electroplating processes, the Cu-Sn-Ni-Cu interconnection microstructure is successfully achieved. Findings The surface morphology of Cu-Sn pillars consists of densely packed clusters which are formed by an ordered arrangement of tetragonal Sn grains. The diffusion of Cu atoms into the Sn phases is observed at the Cu/Sn interface. Furthermore, the obtained Cu-Sn-Ni-Cu pillars have a flat surface with an average roughness of 13.9 nm. In addition, the introduction of Ni layer between the Sn and the top Cu layers in the Cu-Sn-Ni-Cu pillars can mitigate the diffusion of Cu atoms into Sn phases. The process is verified by checking the electrical performance using four-point probe measurements. Originality/value The method described in this paper which combined a three-mask photolithography process with sequential Cu, Sn, Ni and Cu electroplating processes provides a new way to fabricate the interconnection microstructure for future electromigration studies.

Fabrication of MEMS xylophone magnetometer by anodic bonding technique using SOI wafer

This paper reports the design, fabrication and characterization of Lorentz force based MEMS magnetometer. The paper focuses on fabrication process of the device by anodic bonding technique using SOI and glass wafers. The fabrication is a three-mask process. The structure is a xylophone resonator fabricated using highly doped Si as the structural layer. The highly doped structural layer avoids the need of an extra metallized top electrode, which in turn reduces the fabrication step. The proposed fabrication technique for the xylophone bar magnetometer is reported for the first time. The ease in fabrication, low temperature (≤400 °C) process, repeatable, reliable, reduced lithography steps and the ability to precisely control the gap between the electrodes makes it better from the conventional fabrication methods. The device exploits the Lorentz force transduction mechanism and operates at its primary resonant mode at about 108.75 kHz. The current is applied at the resonant frequency and magnetic field of 118 Gauss is applied orthogonal to the current direction. The frequency and transient response characterization of the out-of-plane vibration is carried out at atmospheric pressure with a quality factor of 4.2. Also, vacuum packaging at die level is done and a quality factor of 180 is achieved. The power consumption and theoretical Brownian noise limited resolution of the sensor is 0.45 mW and 215 nT/$$\sqrt {Hz}$$Hz.

A three-mask process for fabricating vacuum-sealed capacitive micromachined ultrasonic transducers using anodic bonding.

This paper introduces a simplified fabrication method for vacuum-sealed capacitive micromachined ultrasonic transducer (CMUT) arrays using anodic bonding. Anodic bonding provides the established advantages of wafer-bondingbased CMUT fabrication processes, including process simplicity, control over plate thickness and properties, high fill factor, and ability to implement large vibrating cells. In addition to these, compared with fusion bonding, anodic bonding can be performed at lower processing temperatures, i.e., 350°C as opposed to 1100°C; surface roughness requirement for anodic bonding is more than 10 times more relaxed, i.e., 5-nm rootmean- square (RMS) roughness as opposed to 0.5 nm for fusion bonding; anodic bonding can be performed on smaller contact area and hence improves the fill factor for CMUTs. Although anodic bonding has been previously used for CMUT fabrication, a CMUT with a vacuum cavity could not have been achieved, mainly because gas is trapped inside the cavities during anodic bonding. In the approach we present in this paper, the vacuum cavity is achieved by opening a channel in the plate structure to evacuate the trapped gas and subsequently sealing this channel by conformal silicon nitride deposition in the vacuum environment. The plate structure of the fabricated CMUT consists of the single-crystal silicon device layer of a silicon-on-insulator wafer and a thin silicon nitride insulation layer. The presented fabrication approach employs only three photolithographic steps and combines the advantages of anodic bonding with the advantages of a patterned metal bottom electrode on an insulating substrate, specifically low parasitic series resistance and low parasitic shunt capacitance. In this paper, the developed fabrication scheme is described in detail, including process recipes. The fabricated transducers are characterized using electrical input impedance measurements in air and hydrophone measurements in immersion. A representative design is used to demonstrate immersion operation in conventional, collapse-snapback, and collapse modes. In collapsemode operation, an output pressure of 1.67 MPa pp is shown at 7 MHz on the surface of the transducer for 60-Vpp, 3-cycle sinusoidal excitation at 30-V dc bias.

A MEMS based acetone sensor incorporating ZnO nanowires synthesized by wet oxidation of Zn film

In this work, we report a simple and efficient method for synthesis of ZnO nanowires by thermal oxidation of Zn film and their integration with MEMS technologies to fabricate a sensor for acetone vapour detection. ZnO nanowires were prepared by thermal oxidation of sputter deposited Zn film. The nanostructured ZnO was characterized by x-ray diffraction, a scanning electron microscope and room temperature photoluminescence measurements. The ZnO nanowires synthesis process was integrated with MEMS technologies to obtain a sensor for volatile organic compounds, incorporating an on-chip Ni microheater and an interdigited electrode structure. To reduce the heat loss from the on-chip microheater, the sensor was made on a thin silicon diaphragm obtained via a modified reactive ion etching process. This resulted in considerable power saving during sensor operation. For this, a three-mask process was used. The performance of the microheater was simulated on COMSOL and validated experimentally. The sensor has been tested for acetone vapour sensing and the operating parameters were optimized. The sensor has the ability to detect acetone vapour at 5 parts per million (ppm) concentrations when operated at 100 °C. The sensor consumed only 36 mW power and showed a high-sensitivity value of 26.3% for 100 ppm of acetone vapour.

IGC1: An Integrated Fluidic System for Gas Chromatography Including Knudsen Pump, Preconcentrator, Column, and Detector Microfabricated by a Three-Mask Process

This paper reports an integrated microscale gas chromatography (μGC) system, the iGC1, which contains four components: 1) a Knudsen pump (KP); 2) a preconcentrator-focuser (PCF); 3) a separation column; and 4) a gas detector. All four components are fabricated from glass wafers using a three-mask process with minimal postprocessing. In a stackable architecture, the components are finally assembled into a 4-cm 3 system. The stacked iGC1 system demonstrates the successful separation and detection of an alkane mixture in the range of C 5 -C 8 in less than 60 s.

Three-Mask Polysilicon Thin-Film Transistor Biosensor

Biosensors are commonly produced using a siliconon-insulator (SOI) CMOS process and advanced lithography to define nanowires. In this paper, a simpler and cheaper junctionless three-mask process is investigated, which uses thin-film technology to avoid the use of SOI wafers, in situ doping to avoid the need for ion implantation and direct contact to a low-doped polysilicon film to eliminate the requirement for heavily doped source/drain contacts. Furthermore, TiN is used to contact the biosensor source/drain because it is a hard resilient material that allows the biosensor chip to be directly connected to a printed circuit board without wire bonding. pH sensing experiments, combined with device modeling, are used to investigate the effects of contact and series resistance on the biosensor performance, as this is a key issue when contacting directly to low-doped silicon. It is shown that in situ phosphorus doping concentrations in the range 4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">17</sup> -3 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">19</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> can be achieved using 0.1% PH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> flows between 4 and 20 sccm. Furthermore, TiN makes an ohmic contact to the polysilicon even at the bottom end of this doping range. Operation as a biosensor is demonstrated by the detection of C-reactive protein, an inflammatory biomarker for respiratory disease.

IGC2: an architecture for micro gas chromatographs utilizing integrated bi-directional pumps and multi-stage preconcentrators

This paper reports an integrated micro gas chromatography (µGC) architecture which utilizes a bi-directional micropump. Four integral components-–the bi-directional Knudsen pump (KP2), a two-stage preconcentrator-focuser (PCF2), a separation column, and a gas detector-–are integrated in a 4.3 cm3 stack, forming a serial flow path. All four components are fabricated using the same three-mask process. Compared to the conventional approach used with multi-stage preconcentrators, in which valves are used to reverse flow between the sampling phase and the separation phase, this µGC architecture reduces the overall complexity. In this architecture, the vapors being sampled are drawn through the detector and column before reaching the PCF2. The microsystem operation is experimentally validated by quantitative analyses of benzene, toluene, and xylene vapors ranging in concentration from 43–1167 mg m−3.

SOI/elastomer process for energy storage and rapid release

A new SOI/elastomer fabrication process that integrates a soft elastomer in-plane with silicon features has been developed, characterized and demonstrated. The simple three-mask process uses deep reactive ion etching of trenches in a silicon-on-insulator wafer to pattern high-aspect-ratio silicon and elastomer features from 2 µm to hundreds of micrometers in width. The elastic and adhesive properties of the fabricated elastomer have been characterized. A Young's modulus of 1.4 MPa was measured at moderate strains up to 75%, and nonlinear strain was observed beyond that. The SOI/elastomer process has been used to fabricate micromechanical thrusters to repeatedly store and release 1.3 µJ to propel a 2 mg 1.6 mm by 0.8 mm by 0.45 mm projectile 1.35 cm.

Fabrication and Electrical Evaluation of Via Last Polymer Liner TSVs

Imec is developing two TSV flavors for Si thicknesses of 50 and 100 μm for various wafer level packaging (WLP) applications where thin dice are stacked and electrically connected to each other through post CMOS processed TSVs and microbumps. As a differentiator, these TSV technologies use spin-on dielectric polymers as the insulating liner. A three-mask process sequence is implemented for fabrication of both TSV types; however, the TSV shape, the process flow, and the Si thickness are different for each one of them. All processes employed in the fabrication of the TSVs are performed at low temperature (&amp;lt;200°C) for post CMOS compatibility. For both TSV types, electrically yielding TSV connected daisy chains are measured on the fabricated wafers and the reliability of the TSVs while undergoing thermal cycle tests is analyzed.

An Improved Performance Poly-Si Pirani Vacuum Gauge Using Heat-Distributing Structural Supports

A new micro-Pirani vacuum gauge that employs a ladder-shaped structure with two parallel bridges and crosslinks in between has been designed and fabricated. This design enhances the physical performance of the gauge by increasing structural rigidity, thus allowing for longer beams and a wider selection of materials, and by allowing for better heat distribution across the sensor - therefore improving the full-scale range of sensor response. Furthermore, this Pirani gauge can be fabricated in a one-, two-, or three-mask process without postprocessing steps such as KOH etching. In a CMOS-compatible process, poly-Si 4 times 2 times 250-mum and 4 times 2 times 1000-mum Pirani gauges with the ladder structure were fabricated and tested with pressure ranges from 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> to 50 torr (0.133 to 1 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> Pa) and 5 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> to 760 torr (6.67 to 1.01 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> -Pa atmospheric pressure) and with resolutions of approximately 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> and 5 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> (0.133 to 6.67 Pa), respectively. Constant temperature circuitry and thermoelectric temperature stabilization would further extend the range of operation and the resolution of these devices. Furthermore, these sensors operate at very low powers ranging from 300 to 600 muW depending on their geometry and pressure measurement range.

Simple Fabrication Process for Self-Aligned, High-Performance Microscanners— Demonstrated Use to Generate a 2-D Ablation Pattern

A new, straightforward, complementary metal-oxide-semiconductor (CMOS)-compatible, three-mask process is used to fabricate high-performance torsional microscanners driven by self-aligned, vertically offset comb drives. Both the moving and fixed combs are defined using the same photolithography mask and fabricated in the same device layer, a process allowing the minimum gap between comb fingers to be as small as twice the alignment accuracy of the photolithography process. Our fabricated microscanners have torsional resonant frequencies between 58 Hz and 24 kHz and maximum optical-scanning angles between 8deg and 48deg with actuation voltages ranging from 14.1 to 67.2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ac-rms</sub> . The yields on two separate fabrication runs have been better than 70%. To demonstrate an application for these scanners, we used them to generate laser-ablation patterns suitable for ocular cornea surgery. We assembled a 2-D scanning system by orienting two identical microscanners at right angles to one another. When driven by two 90deg out-of-phase 6.01-kHz sine waves, the cross-coupled scanners produce circular patterns having radii fixed by the amplitude of the driving voltage. Then, we emulated a small pattern from the surface topography found on a U.S. Roosevelt dime and built up an ablation pattern that compares favorably with similar emulations reported by earlier researchers who used larger, more complicated ablation systems

A novel capacitive pressure sensor based on sandwich structures

This paper presents a sandwich structure for a capacitive pressure sensor. The sensor was fabricated by a simple three-mask process and sealed in vacuum by anodic bonding. The sensor, which utilizes a combined SiO/sub 2//Si/sub 3/N/sub 4/ layers as the elastic dielectric layers, exhibits high sensitivity. Mechanical characteristics of the sensor are theoretically analyzed based on a composite membrane theory and evaluated by use of finite element analysis (FEA). Square membrane sensors with side lengths of 800 /spl mu/m, 1000 /spl mu/m, 1200 /spl mu/m, and 1500 /spl mu/m were fabricated, providing a measured sensitivity of 0.08 pF/kPa, 0.12 pF/kPa, 0.15 pF/kPa, and 0.2 pF/kPa, respectively. The nonlinearity of the sensor is less than 1.2% over a dynamic range 80-106 kPa and the maximum hysteresis is about 3.3% to the full scale capacitance change. The TCO at 101 kPa is 1923 ppm//spl deg/C. All the electrodes of the sensor are leaded from the top side of the chip. Residual pressure in the sealed cavity at room temperature is evaluated by a pressure scanning test, indicating about 8 kPa. Comparison of experimental results with theoretical analysis shows that change of capacitance for the sandwich structure under pressure is mainly due to variation of the dielectric constant while geometric variations such as the area change of electrodes and the thickness change of dielectric layers is about two orders less than the variation of the dielectric constant. Sensitivity enhancements for the sensor are qualitatively discussed based on the physical effects of strained dielectrics, including electrostriction and flexoelectricity. [1551].

Monolithic 2-D scanning mirror using self-aligned angular vertical comb drives

We have demonstrated microfabricated, monolithic two degrees of freedom (two-dimensional) electrostatic torsional mirrors using a three-mask process on silicon-on-insulator wafer with a single plastic deformation step. The mirror operated independently in two orthogonal directions as controlled by two sets of self-aligned angular vertical combs. The measured dynamic performance showed resonant frequencies of 10.56 and 1.54 kHz with optical scanning angles up to 27/spl deg/ and 20/spl deg/ in the two orthogonal axes, respectively, under driving voltages of 20 V/sub dc/ plus 15 V/sub pp/. A 90-day continuous mirror operation at peak resonance, in equivalent to 80 and 12.1 billion cycles on the two orthogonal axes, showed negligible performance variations.

Integrated SOI rib waveguide using inductively coupled plasma reactive ion etching

To achieve the integration of self-alignment connection between single-mode fiber and rib waveguide in a silicon-on-insulator (SOI) wafer, a three-mask lithography process was used. Micrographs revealed uniform U-grooves and accurate self-alignment between the U-groove and the rib waveguide. An atomic force microscope with an ultrasharp tip was used to directly measure the endface profile of the SOI rib waveguide etched using inductively coupled plasma reactive ion etching (ICPRIE). The rms roughness of the SOI rib waveguide endface was compared with that of a conventional chemical mechanical polishing endface. As an attractive single layer antireflection coating on silicon substrate, HfO/sub 2/ film reduced the Fresnel reflection losses from 2.55 to 0.022 dB. After depositing HfO/sub 2/ films onto waveguide endfaces, the rms roughness difference between the two SOI rib waveguides was also investigated. The rms endface roughness was influenced by the highly directional waveguide endface etched by ICPRIE. The results indicated that the three-mask lithography ICPRIE process is easy, cost-effective, and acceptable in a mass production environment.

A servo-controlled capacitive pressure sensor using a capped-cylinder structure microfabricated by a three-mask process

A silicon-micromachined servo-controlled capacitive pressure sensor is described. The use of a capped-cylinder shape with pick-off electrodes external to a sealed cavity permits this device to be fabricated in only three masking steps. Device behavior is evaluated experimentally and by finite element analysis. A fabricated device with 2 mm diameter, 9.7 μm structural thickness and 10 μm cavity height provides a measured sensitivity of 0.516 V/kPa over a dynamic range of 20-100 kPa gauge pressure, with a nonlinearity of <3.22% of full scale. The open-loop sensitivity of this device averaged over a dynamic range of 0-250 kPa is -408 ppm/kPa. A voltage bias applied to the servo-electrode can be used to tune both the open-loop and servo-controlled sensitivity by more than 30%. An alternative design in which the Si electrode is segmented to relieve residual stress provides 10-20% more open-loop sensitivity with similar structural dimensions. Fabricated devices are sealed within a metal package filled with an inert dielectric liquid. This enhanced open-loop sensitivity by a factor of about 1.7, and in servo-controlled operation, reduced restoring voltage by a similar factor. Measurements and analysis of temperature responses of these devices are presented.

Fabrication and characterization of highly doped suspended silicon wires

Highly doped suspended silicon wires are fabricated on a silicon-on-insulator (SOI) wafer. The fabrication is based on a three-mask process which uses only standard photolithography, wet etching, and thermal treatments. The starting material was highly doped by means of the spin-on-dopant technique and wires with dimensions in the nanometer range were obtained. Preliminary results about two-probe measurements of the I– V characteristics and a noise analysis of undamaged and damaged wires are presented and discussed.