Three-level NPC Research Articles

A Basic Design Tool for Grid-Connected AC–DC Converters Using Silcon Carbide MOSFETs

The design and optimization of power converters is a key factor in the growth and development of the power electronics field. However, the process of designing a power converter is not straightforward, and engineers often rely on experience and intuition, sometimes requiring time-consuming computer simulations. This paper presents a tool for the basic design of grid-connected AC–DC converters. The design tool takes specifications and operating conditions for two-level and three-level NPC converter topologies and derives a draft design. The tool calculates the input filter’s electrical parameters, the converter’s losses, the temperature rise of the power semiconductor devices, and the ripple current and voltage of the DC-link capacitor. In order to validate the proposed design tool, four AC–DC converters using SiC MOSFETs were designed. Based on the design results, simulation models and prototypes were fabricated to verify the performance and confirm that the proposed design tool can be used in the basic design process of converters.

Improved the two DC capacitors’ voltage balancing of three-level NPC inverters applied in electric vehicles

Excessive unbalance of the DC capacitor voltages of the inverter can cause overvoltages on power components and capacitors, causing unintended low-order harmonics on the load side such as second harmonics, 3rd, 4th, 5th, ..., causing direct harm to the motor load, reducing the controllability of the reverse voltage and filter compensating current for the active filter circuit, affect to the performance of electric vehicles (EVs). Therefore, maintaining the DC capacitors' voltage balance will control the multi-level inverter's input quality and ensure the output quality in terms of Total Harmonic Distortion (THD). The paper proposes a method to control the two DC capacitors’ voltage balance of the 3-level inverter, using the principle of offset function separation. The analysis results suggest that the NPC three-level modulation technique should be implemented to satisfactorily achieve the neutral line current (iNP). Compared with recent international publications, the proposed new algorithm can save and reduce switching loss; the transient dynamic response can be adjusted easily. Maintaining the capacitor voltage balance allows the design with the smallest capacity to reduce voltage stress on components. The proposed results are partially verified through simulation and experiment.

A Robust High-Quality Current Control With Fast Convergence for Three-Level NPC Converters in Microenergy Systems

Three-level neutral-point-clamped (3L-NPC) power converters are necessary interfaces to form micro-energy systems. Naturally, designing a suitable control scheme, featuring superior dynamics, strong robustness, and simple structure, is a promising solution to guarantee more efficient operation of converter. This paper proposes a robust high-quality current control strategy for the 3L-NPC power converter in the stationary <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\alpha \beta$</tex-math></inline-formula> frame. A super-twisting algorithm coupled with a Luenberger observer current controller is proposed to deal with the poor sinusoidal current tracking issue due to the existing inductance/grid frequency deviations and the disturbance of the sinusoidal dynamic nature. Additionally, an extended sliding mode disturbance observer based proportional control is built to dramatically enhance voltage regulation performance, in the case of capacitance deviations and unknown dc-loads. Experimental data confirm the effectiveness of the proposed solution outperforms the conventional proportional-resonant/-integral control in terms of accurate tracking current/voltage, anti-disturbance, and grid current total harmonic distortion.

Stability of input voltages of a three-level inverter NPC fed by photovoltaic sources

In this paper we study the stability of input voltages of the cascade consisting of a photovoltaic inverter and a three-level structure NPC, feeding a synchronous machine with permanent magnets (PMSM) commissioned by the speed command flow oriented. For this, we first present the modeling of the Photovoltaic, then modeling and strategy to control the inverter three-level structure NPC. In the end, to address the midpoint fluctuation and instability of input voltages at the terminals of the inverter, proposed a solution consisting of a bridge clamping which gave promising results.

Three-level NPC voltage source converter based direct power control of the doubly fed induction generator at low constant switching frequency

This paper deals with an improvement of the direct power control ‘DPC’ for three-level voltage source inverter NPC-VSI feeds the rotor of the doubly fed induction generator ‘DFIG’ based wind power generation system. This converter allows controlling the rotor voltage in magnitude and phase angle with a high flexibility and can therefore be used for active and reactive power control of DFIG. The control is especially designed to reduce the harmonic distortion of the generated currents and active power ripples of the classical DPC control using switching table. In addition, it’s convenient for high power drive and variable speed generator applications with constant switching frequency. The detailed operation principle and simulation results of the proposed DPC-NPC strategy for 1.5 MW of DFIG are also discussed.

Improved virtual SVPWM algorithm for CMV reduction and NPV oscillation elimination in Three-Level NPC inverter

An improved virtual space vector pulse-width modulation (IVSVPWM) strategy is presented to address simultaneously the problem of common mode voltage (CMV) with neutral point voltage (NPV) fluctuations in wind power converters. The proposed IVSVPWM method suppresses the amplitude of the common mode voltage to Udc/6 by discarding the positive small vector. Meanwhile, the new virtual vector is synthesized by selecting a vector whose neutral point current sums to zero among the retained voltage vectors. In addition, a feedback mechanism is established in the proposed strategy. According to the feedback result, the distribution coefficients of each basic vector in the virtual vector are recalculated to suppress the NPV fluctuation. Through the above control strategy, the dual effect of suppressing the CMV and balancing the NPV is achieved in the full modulation. The feasibility and effectiveness of the strategy are verified by simulation and experiment.© 2017 Elsevier Inc. All rights reserved.

A unified duty-cycle modulation algorithm for a three-level NPC inverter

In this paper, it is a kind of challenge to simplify the conventional pulse width modulation (PWM) algorithms for a three-level neutral-point-clamped inverter. Thus, the unified duty-cycle modulation (UDM) algorithm is presented. It is more attractive than the carrier-based PWM (CBPWM), space-vector PWM (SVPWM), and unified PWM algorithms with a simpler calculation by utilizing the usefulness of the SVPWM algorithm to synthesize the duty cycles in time-domain and the CBPWM algorithm to synthesize the duty cycles in frequency-domain with the lesser conditions and the blankness of the lookup tables, switching sequence design, and zero-sequence component finding. Besides, it is outstanding with three outcomes: (1) comprehensive mathematical models of the dwell times, (2) permanent mathematical models of the duty cycles in time-domain, and (3) simplified PWM algorithm, which has a better workflow with the reduction of the computation burden. As it is very easy to implement as the sinusoidal PWM technique while its performance is equivalent to the SVPWM algorithm, this makes the proposed UDM algorithm a good candidate to optimize between the performance and the cost. Both the simulation and experimental results can confirm the feasible practicability and performance. The comparison with the conventional algorithms can evidently emphasize the superiority.

Modeling and Performance Analysis of a Grid-Connected Photovoltaic System with Advanced Controller considering Varying Environmental Conditions

This paper presents a mathematical model of 255 kW grid-connected solar photovoltaic (SPV) system. To study the performance characteristics of the grid-connected SPV system, a new hybrid adaptive grasshopper optimization algorithm with the recurrent neural network (AGO-RNN) control technique was implemented. Furthermore, the power quality at the point of common coupling (PCC) has been studied using the conventional (PSO) and proposed AGO-RNN controllers. The characteristics of the PV system were analyzed under varying environmental (variable irradiance and temperature) conditions considering 3 different cases such as (i) standard test conditions (STC), (ii) variable radiation with constant temperature, and (iii) variable radiation with variable temperature. For each case, the total harmonic distortion (THD) has been calculated using the proposed AGO-RNN control technique, and the results were compared with particle swarm optimization (PSO) technique. The 255 kW PV model is initially developed and connected to a three-level NPC inverter, an MPPT-based perturbation and observation algorithm. Later, the PV model is controlled by an AGO-RNN pulse width modulation (PWM) controller and is then integrated to the main grid at PCC. The main advantage of this technique is exploiting the separate DC-DC converter between the SPV module and the inverter. Finally, the proposed grid-connected SPV system was simulated on MATLAB for analyzing the performance of the system based on its I-V and P-V characteristics, inverter voltage, grid power, gird voltage, grid current, power factor, and THD under different environmental conditions. The simulation results demonstrate that the current magnitude and THD of the SPVGC system are improved with the cutting-edge AGO-RNN controller compared to PSO in all three different scenarios, and this value is less than 1.6%, which is within the permitted limits of IEC 61727 standards.

Modelling of Bidirectional Three-Phase Four-Wire Three-Level NPC MLC under Single-Loop Current Sensorless Control

Single-loop current sensorless control allows for abolishing of the instantaneous current measurement in the control system using only a single control loop with voltage feedback to stabilise the DC-bus voltage. This approach eliminates current sensors in the control circuit, benefiting from saving space on the printed circuit board and minimising power dissipation in the current measurement circuitry. This paper focuses on the single-loop current sensorless control applied to bidirectional three-phase four-wire three-level NPC MLC by simulation analysis and demonstrates the performance of the proposed current control algorithm in the rectifier and inverter modes and the step response with power direction change and grid-voltage change. In capacitor voltage balancing, an additional controller is applied, which is capable of compensating for the voltage asymmetry caused by adding a 2.5 kOhm resistor in parallel to one of the DC-bus capacitors. Our results demonstrate good performance of the proposed control method both in the inverter and rectifier modes, showing stable current shape in the low power and full power modes with acceptable harmonics content, meeting the requirements of the IEC 61000-3-2 standard for Class A devices. The analysis showed that the proposed control approach is suitable for industrial application.

Analysis and Reduction of Current and Voltage Ripple in DC Link for Three-Level NPC Inverter-Fed Dual Three-Phase Motor Drives

In this article, switching strategies for dc-link current and voltage ripple reduction have been studied. The considered topology is a neutral-point clamped three-level (NPC-3L) inverter feeding a dual three-phase permanent-magnet synchronous motor (PMSM). The mechanisms of dc-link current and voltage ripple generation in an NPC-3L inverter-fed PMSM drive are analyzed in detail. Then, a two-step collaborative switching strategy is proposed, where the optimum switching sequences, including opposite small vectors, are applied in the two inverters collaboratively. Furthermore, the switching vectors of two inverters are rearranged in the sequence of their corresponding dc-link capacitor currents so that the overlapping of their peaks is avoided. Consequently, both the voltage ripple and current ripple in the dc-link capacitors are mitigated with the proposed two-step collaborative switching strategy. For the midpoint voltage of the NPC-3L inverter, the amplitude of fluctuation is reduced under low modulation index operation, while the high-frequency harmonic components are mitigated under high modulation index operation. The experimental results are given to verify the validity of the theoretical analysis and the proposed switching strategy.

An Improved Carrier-Based PWM Strategy with Reduced Common-Mode Voltage for a Three-Level NPC Inverter

Double modulation wave carrier-based pulse width modulation (CBPWM) is a solution for eliminating the deviations of the neutral-point voltage (NPV) in three-level neutral-point clamped inverters. In this paper, a new hybrid CBPWM strategy is proposed that not only eliminates the neutral-point voltage oscillations but also reduces the common-mode voltage (CMV) by half. Furthermore, the harmonic content is also reduced compared with the available reduced CMV modulation by adjusting the modulation waves based on the location of the reference vector in the space vector diagram. An active neutral-point voltage controller is also realized in order to maintain the performance of the modulation strategy under the NPV perturbations. The performance of the proposed algorithm is compared to the available CBPWM-based techniques in the literature. The effectiveness of the proposed method is also verified by experimental results.

Stabilizing dc-link voltage and neutral point current fluctuation in grid-connected three-level NPC converter under generalized grid fault conditions

Stabilizing dc-link voltage and neutral point current fluctuation in grid-connected three-level NPC converter under generalized grid fault conditions

Real-Time Switching Number Reduction SVM for a Two-Phase Motor Powered by Three-Level NPC Inverter

A three-level neutral point clamped inverter with three phase legs is often used to power three-phase electrical motors. This type of multilevel inverter has its advantages over two-level inverters. The main advantages are lower harmonic distortion and less stress on motor windings. This three-level inverter can be also used as a power source for a two-phase induction motor. A one-phase induction motor with a starting capacitor and auxiliary windings is in fact a two-phase induction motor. In this article, we show that the switching number reduction method, previously presented for use with three-phase induction motors, can be used with two-phase motors as well, after some crucial modifications. The reduction of switching decreases the switching losses. The switching number reduction is obtained with modified space vector modulation using redundant voltage vectors. The method was simulated and then implemented on a prototype 3L-NPC inverter powering a one-phase induction motor with auxiliary windings. A switching number reduction of about 19% to 29% was obtained, depending on modulation parameters.

Unidirectional Finite Control Set-Predictive Torque Control of IPMSM Fed by Three-Level NPC Inverter with Simplified Voltage-Vector Lookup Table

This paper proposes a unidirectional finite control set-predictive toque control (UFCS-PTC) method for a three-level neutral-point-clamped (3L-NPC) inverter fed interior permanent magnet synchronous motor (IPMSM). The proposed algorithm can lower the complexity of PTC fed by 3L-NPC by reducing the number of admissible voltage vectors (VVs) effectively. The candidate VVs are restricted within 60° of the voltage space voltage diagram (VSVD), which is the nearest to the flux trajectory for each 60° flux sector. After the segmentation of the VSVD and flux trajectory, the proposed method can keep VVs in one direction during the prediction process, which can result in significant torque/flux reduction. Therefore, the UFCS-PTC can reduce the number of admissible VVs from twenty-seven to six while achieving excellent steady-state performance in terms of reduced flux and torque ripples. Additionally, the proposed method eliminates the need for weighting factor calculation for neutral point voltage associated with a 3L-NPC inverter. The UFCS-PTC of IPMSM also has other features, such as improved balancing capability of the DC-link capacitors’ voltage, small computation time due to the reduced number of admissible voltage vectors considered in the cost function, and easy implementation. The effectiveness of the proposed method is verified through experimental results.

A Hybrid Modulation Method With the Maximum Controllable Range of the Neutral-Point Current for Three-Level NPC

In order to analyze the maximum neutral-point (NP) voltage controllability of the three-level NPC under carrier-based pulsewidth modulation, this article deduces the accurate relationship between the three degrees of freedom under carrier-based pulsewidth modulation (zero-sequence voltage, zero-level disassembly phase, and the extent of zero-level disassembled) and the NP current. Meanwhile, a hybrid method is proposed to obtain the suitable values of the three degrees of freedom that can achieve the maximum controllable range of the NP current directly. Therefore, the proposed hybrid method avoids the huge computational burden caused by the cyclic traversal method. Compared with the traditional method of injecting zero-sequence voltage or disassembling the zero level, the proposed method can realize the maximum controllability of the NP voltage under the full range of the power factor and the modulation index with a lower switching frequency. The proposed method is verified by experiments.

Hybrid modeling and control of three-level NPC rectifiers

This article revisits the modeling of the grid-connected neutral point-clamped converter as a time-varying nonlinear hybrid dynamical system. As a result, an embedded control law that guarantees stability and fulfills the control objectives, namely dc-link voltage regulation, power-to-grid energy exchange and capacitor voltage balancing, is proposed. In addition, a rigorous study of stability is carried out without depending on an averaged model and considering the hybrid dynamical character of the system. Moreover, the hybrid control guarantees a minimum dwell time. This approach could be extended to other topologies or control laws in the search for rigorous stability guarantee The algorithm is evaluated and tested experimentally, verifying the feasibility of the approach. This process involves adapting the algorithm to be programmed in a FPGA as well as some further modifications to improve the steady-state performance. The experimental results are performed under several reference changes and perturbations to prove the feasibility of the proposed approach.

Three-Level NPC Inverter-Fed IM Drives under PTC, Minimizing the Involved Voltage Vectors and Balancing the DC Bus Capacitor Voltages

The paper presents a comparative study of the steady-state and transient behaviors of three-level neutral-point clamped (3L-NPC) inverter-fed induction motor (IM) drives under the control of three predictive torque control (PTC) schemes: the conventional one (C-PTC) and two new strategies involving selected stator voltage vectors (SVs), namely: (SV-PTC1) and (SV-PTC2). Compared to the C-PTC, the latter enable a reduction of the number of voltage vectors as well as the weighting factors. The introduced PTCs mainly differ by the cost function, which is more simple in the case of SV-PTC2. However, SV-PTC1 allows a systematic clamping of each stator phase to the DC bus voltage, at a low level of 60 degrees, and a high level at 60 degrees per cycle, while such a clamping is arbitrary in the case of SV-PTC2. Simulations prove the higher performances of the introduced SV-PTCs over the C-PTC ones, in terms of the reduction of the current distortion and of the torque ripple. Simulation results were validated by the experiments.

Switching Loss Optimization for a Pulsewidth Modulation Strategy With Reduced CMV and Improved Output Harmonic Distortion for a Three-Level NPC Converter

Switching Loss Optimization for a Pulsewidth Modulation Strategy With Reduced CMV and Improved Output Harmonic Distortion for a Three-Level NPC Converter

A New Neutral-point Voltage Balance Control Based on Virtual Space Vector Modulation for Three-Level NPC Converter

A New Neutral-point Voltage Balance Control Based on Virtual Space Vector Modulation for Three-Level NPC Converter

Third-order current harmonic suppression and neutral-point voltage balance control strategy for single-phase three-level NPC inverter

The imbalance of capacitor voltage on the DC side of the inverter will cause the third-order current harmonics and the device will be damaged greatly with the increase of voltage stress. The mechanism of imbalance capacitors voltage and the third-order current harmonics generated by the double frequency fluctuation are analyzed. This paper presents a feedforward capacitor differential pressure control strategy based on PR controller, which is aimed at the single-phase three-level NPC inverter and considers the cause of double modulation wave. The PR controller is used in the current loop to suppress the third-order harmonic by static-free tracking of the AC signal, and the voltage balance is realized by the feedforward DC-link capacitor voltage difference to offset the DC component of the output side. The simulation model and 1kW prototype driven by the control strategy have been established to demonstrate that the capacitor voltage of the inverter is balanced and the third-order harmonic is suppressed efficiently.