Analysis and Reduction of Current and Voltage Ripple in DC Link for Three-Level NPC Inverter-Fed Dual Three-Phase Motor Drives

Abstract

In this article, switching strategies for dc-link current and voltage ripple reduction have been studied. The considered topology is a neutral-point clamped three-level (NPC-3L) inverter feeding a dual three-phase permanent-magnet synchronous motor (PMSM). The mechanisms of dc-link current and voltage ripple generation in an NPC-3L inverter-fed PMSM drive are analyzed in detail. Then, a two-step collaborative switching strategy is proposed, where the optimum switching sequences, including opposite small vectors, are applied in the two inverters collaboratively. Furthermore, the switching vectors of two inverters are rearranged in the sequence of their corresponding dc-link capacitor currents so that the overlapping of their peaks is avoided. Consequently, both the voltage ripple and current ripple in the dc-link capacitors are mitigated with the proposed two-step collaborative switching strategy. For the midpoint voltage of the NPC-3L inverter, the amplitude of fluctuation is reduced under low modulation index operation, while the high-frequency harmonic components are mitigated under high modulation index operation. The experimental results are given to verify the validity of the theoretical analysis and the proposed switching strategy.