SiO2 Film Thickness Research Articles

A New Isolation Technique for SOS/LSI's–Local Buried Oxide Isolation of SOS (LOBOS)–

A new self-aligned oxide isolation technique is described which produces high yield SOS/LSI's. The new technique utilizes self-aligned photoetching steps where the photoresist is exposed to ultraviolet light projected through the back surface of the sapphire substrate. This technique enables a thick SiO2 film grown by chemical vapor deposition to be completely buried between the silicon islands, and is called Local Buried Oxide Isolation of SOS (LOBOS). The buried SiO2 film reduces the step height and prevents the diffusion of impurities from the sapphire substrate to the silicon film. These features result in good interconnections and improved device characteristics. The device characteristics of SOS/MOSFET's with LOBOS structures are compared with those of conventional SOS/MOSFET's.

Deformed layers observed at the interface between a Sn-doped epitaxial layer and a Cr-doped substrate in GaAs

Interfacial deformed layers existing in GaAs epitaxial wafers are conveniently observed on a {110} cleavage face by means of a room-temperature photoetching technique with a slightly modified Abrahams-Buiocchi etchant. Examination is mainly confined to vapor-grown GaAs samples composed of an 0.4-μ-thick Sn-doped epitaxial layer [n? (6–10) ×1016 cm−3] and a Cr-doped semi-insulating substrate. It is established that the deformed layer results from thermal stress imposed on the arsenic depletion layer generated at the substrate surface in the preheating stage prior to growth. The strain field is found to extend more than 10 μ into the substrate side and even into the epitaxial layer side. Electron mobility in the submicron epitaxial layer is lowered by the presence of this strain field. However, this can be improved from 10 to 30% by annealing. It is also found that dislocations are generated in the deformed layer when the imposed stress is increased by coating the back side of the substrate with a SiO2 film. The dislocation density increases rapidly, but the deformed-layer thickness gradually decreases as the SiO2 film thickness increases. Slip dislocations are generated from the periphery of the epitaxial wafer during the cooling process. This is due to stress concentration at the periphery.

Breakdown Characteristics in Thin SiO2 Film

The breakdown processes at a weak spot in SiO2 film under pulse conditions were investigated with samples having 200 Å to 1450 Å thick SiO2 films. Three types of breakdowns were observed. Two were attributed to electric breakdown and the third to thermal breakdown. Electric breakdown becomes dominant with increasing SiO2 film thickness, especially over 1000 Å, and with decreasing temperature. Electric breakdown was distinguished from thermal breakdown by using pulse technique, and the thickness dependence of electric breakdown was found to be proportional to the square root of the SiO2 film thickness. In addition, the time lag in the initiation of breakdown after the application of a pulse voltage and the resistance of current path formed by electric breakdown were studied. It was revealed that the probability that the avalanche grows to a critical destruction size in the SiO2 film increases with increasing temperature.

Submicron thickness calibration of vapor-deposited SiO2 films by infrared spectroscopy

Infrared transmission spectra of a series of SiO2 films vapor deposited on silicon from SiH4 and O2 at 450 °C have been studied as a function of film thickness in the submicron range from 1000 to 9000 Å. Absorbances of band maxima observed in the frequency range 250–1400 cm−1 are shown to obey the Lambert-Bouguer's law in both as-deposited and heat-treated (800–1200 °C) materials. Apparent absorption coefficients calculated for the transmission mimima at 1060, 800, and 450 cm−1 are 2.5 ± 0.1 × 104, 0.24 ± 0.02 × 104, and 0.74 ± 0.02 × 104 cm−1 for as-deposited films and 3.4 ± 0.1 × 104, 0.34 ± 0.02 × 104, and 1.06 ± 0.02 × 104 cm−1 for heat-treated films, respectively. The thickness of SiO2 films as-deposited at 450 °C as well as heat treated to 800 °C and above can be determined nondestructively using the present absorbance data.

Electronic Processes in MNOS System (II) Transitions between the Types of C-V, I-V and G-V Characteristics

Using MNOS diodes with a wide range of device parameters such as the thickness of SiO2 films, conductivities of Si3N4 films, and conductivities and carrier types of Si substrates, C-VG and VFB-VG curves were measured as a function of the measurement temperature, heat treatment and maximum applied voltage. Two types of C-VG curves and the transition from one type to the other were observed. It was found that a correspondence between the type of C-VG curve and the direction of the shift of VFB, observed in the grown samples such as those described in a previous paper persisted even after the transition from the one to the other types of C-VG curves had occurred. In addition, two types of G-VG curves were also observed. These results were qualitatively explained by a model described before.

Influence of Device Parameters on Memory Performance of MNOS Structure

The influence of various device parameters on the characteristics of MNOS (metal-nitride-oxide-silicon) memory devices has been examined. Three types of charge storage are found to exist according to the thickness of SiO2 film and the specific conductivity of Si3N4 film; injection type, ion drift type and mixed type (where only negative charges are stored at the SiO2-Si3N4 interface under both polarities of bias voltages). Furthermore, even if the thickness of Si3N4 film is changed with other parameters kept constant, no change of charge storage types is observed. It is considered that there are two discharging mechanisms, namely, the one where stored charges near the interface between SiO2 and Si3N4 films flow through SiO2 film into silicon and the other one where the stored charges flow into bulk region of Si3N4 film.

Surface enhancement of CdSe by SiO2

The effect of SiO2 on the surface of thin-film CdSe (both vacuum deposited) is reported. An enhancement of the semiconductor-film conductance was observed which was dependent on the SiO2-film thickness.