TFET Research Articles

Performance analysis of dual material control gate cavity on source electrically doped TFET biosensor for biomedical applications

The fabrication complexity, low sensitivity, detection speed, and costs associated with nanoscale devices have been significant concerns in the development of label-free biosensors. To address these issues, we report a novel dual material control gate cavity on source electrically doped tunnel field-effect transistor (DM-CG-CS-ED-TFET) for label-free biosensors. In this regard, the n+ drain and p+ source regions within the proposed device are induced by applying polarity gate (PG) bias voltages of PG-1 = +1.2 V and PG-2 = −1.2 V, respectively, across the respective polarity gate electrodes. This approach not only overcomes doping control issues but also avoids thermal budget constraints and minimizes fabrication complexity when compared to conventional TFET. For biomolecule sensing in the device, a nanogap cavity is created within the gate dielectric by selectively etching a portion of the polarity gate dielectric layer towards the source side. The performance of the proposed biosensor device is evaluated based on the variations in carrier concentration profile, energy band diagram, electric field, transfer (IDS - VGS) characteristics, drain current (IDS) sensitivity, ON-state current (ION) sensitivity, switching ratio (ION/IOFF) and subthreshold swing (SS) sensitivity. The sensitivity of the device is also investigated based on nano-cavity dimensions, practical challenges such as various filling factors, and the step profile generated from the steric hindrance. Moreover, the effect of temperature on sensitivity has also been investigated. For this, various biomolecules including Streptavidin (k = 2.1), APTES (k = 3.57), ferrocytochrome c (k = 4.7), keratin (k = 8) and Gelatin (k = 12), have been investigated for their performance using Silvaco ATLAS device simulator. The simulation results demonstrate that the proposed biosensor is a viable option for biosensing applications in biomedical engineering.

Utilizing Forward Characteristics of Pocket Doped SiGe Tunnel FET for Designing LIF Neuron Model

Utilizing Forward Characteristics of Pocket Doped SiGe Tunnel FET for Designing LIF Neuron Model

Energy efficient artificial gustatory system for in-sensor computing

In this work, a novel bio-inspired artificial gustatory system is proposed for in-sensor neuromorphic computing. The system is demonstrated using a novel material-engineered compound-semiconductor double-gate ferroelectric tunnel FET. The behaviour of the device as a biosensor and as a spiking neuron is verified individually. Using extensive simulation in Atlas TCAD, the biosensor functionality is validated with ION sensitivity of 108. Likewise, the device shows excellent neuronal behaviour with energy consumption of 37 aJ/spike, without using any external circuitry. It also exhibits control over the spiking frequency through amplitude, frequency, and duty cycle of input synaptic current. By cascading the biosensor and neuron, a complete bio-mimicked gustatory system is designed to identify a separate pattern for different tastes. The proposed gustatory system integrates both the devices, and simultaneously performs sensing and spike encoding. The biosensor transduces the pH and dielectric constant of the target biomolecule, corresponding to gustatory neurons present in the taste buds of a biological gustatory system. The neuron performs spike encoding and acts as an input neuron in a classifying network, which corresponds to gustatory cortex of its biological counterpart. The system consumes an average power of 49.58 pW which is ∼1000 × lesser than the state-of-the-art artificial gustatory system, eliminating the need for complex hardware and exorbitant energy consumption. Therefore, the proposed gustatory system provides a highly efficient and compact solution for neuromorphic gustatory sensing and classification, with potential applications in portable, wearable, and implantable devices.

Tunnel Field Effect Transistor (TFET): A Review

Tunnel Field Effect Transistor (TFET): A Review

CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology.

After more than five decades, Moore's Law for transistors is approaching the end of the international technology roadmap of semiconductors (ITRS). The fate of complementary metal oxide semiconductor (CMOS) architecture has become increasingly unknown. In this era, 3D transistors in the form of gate-all-around (GAA) transistors are being considered as an excellent solution to scaling down beyond the 5 nm technology node, which solves the difficulties of carrier transport in the channel region which are mainly rooted in short channel effects (SCEs). In parallel to Moore, during the last two decades, transistors with a fully depleted SOI (FDSOI) design have also been processed for low-power electronics. Among all the possible designs, there are also tunneling field-effect transistors (TFETs), which offer very low power consumption and decent electrical characteristics. This review article presents new transistor designs, along with the integration of electronics and photonics, simulation methods, and continuation of CMOS process technology to the 5 nm technology node and beyond. The content highlights the innovative methods, challenges, and difficulties in device processing and design, as well as how to apply suitable metrology techniques as a tool to find out the imperfections and lattice distortions, strain status, and composition in the device structures.

Drain Source-Engineered Double-Gate Tunnel FET for Improved Performance

Drain Source-Engineered Double-Gate Tunnel FET for Improved Performance

A novel TFET based nanogap high-sensitive biosensor by boosted reliability- new metric for sensitivity definition

This is a detailed report about the proposal of an efficient nanogap dielectrically modulated tunnel field-effect transistor (TFET) biodevice granting a high sensitivity in the detection of the targeted biomolecules while keeping high performance in the realistic situations with boosting the reliability. Two attractive approaches in the cases of the bandgap engineering and charge plasma concept have been suggested for the band energy correction increasing the sensing current and the sensitivity without occurrence possibility of fabrication process related issues as compared to common TFET and PNPN TFET biosensors. The streptavidin, biotin and APTES samples have been selected as typical biomolecules for the sensing performance comparison of the biosensors under the study. Also, the proposed biosensor showed performance superiority for other biomolecules. For the first time, a new metric for measuring sensitivity is proposed to combine both maximum current sensitivity and well-defined average sensitivity in a unique relation named effective sensitivity. This prevents the possible noise impact on the sensitivity of the biosensors since the TFET based biosensors suffer from the low detection current. Defining the effective sensitivity, the proposed biosensor has been evaluated in more realistic conditions including partial hybridization of biomolecules inside the nanogap, trap-assisted-tunneling (TAT) component, neutral/charged biomolecules and biomolecules accumulation in different orientations showing the performance superiority of the proposed biosensor.

Performance and reliability assessment of source work function engineered charge plasma based Ti/HfO2/Al2O3/Ge, double gate TFET

The Tunnel Field Effect Transistor (TFET) often suffers from low ON current (I ON), charge traps, and thermal variability, which limits its performance and reliability. To address these issues, the source work function engineered Ge Charge Plasma Double Gate Tunnel Field Effect Transistor (CP-DGTFET) device structure with HfO2/Al2O3 bilayer gate dielectric is designed and investigated using numerical TCAD simulations. The proposed Ti/HfO2/Al2O3/Ge CP-DGTFET device structure showed excellent DC characteristics with exceptional I ON, I ON/I OFF ratio, and minimal sub-threshold swing (S) of ∼3.04 × 10−4 A μm−1, ∼1.2 × 1010, and ∼3.4 mV/dec, respectively. Furthermore, the device’s analog characteristics displayed good transconductance, cut-off frequency, and gain bandwidth product of ∼0.75 mS/μm, ∼0.97 THz, and ∼102 GHz, respectively. Moreover, the charge trap exploration divulges that positive ITCs can enhance device performance, whereas negative ITCs can adversely impact the electrical characteristics of CP-DGTFET. Additionally, the temperature-dependent analysis showed that the OFF-state leakage current increases from ∼1.7 × 10−15 A μm−1 to 2.4 × 10−10 A μm−1 with temperature fluctuations from 275 K to 375 K. Overall, the work function-engineered CP-based Ti/HfO2/Al2O3/Ge DGTFET device structure shows great potential for improving the performance and reliability of Ge TFET technology.

Sensitivity, linearity, and noise evaluation of L‐shaped dielectrically modulated label free tunnel field‐effect transistor biosensor

AbstractThis research article examines a L‐shaped dielectrically modulated label free TFET (L‐DM‐TFET) biosensor for the purpose of detecting different biomolecules using a label‐free biosensing detection technique. The proposed structure allows for the recognition of biomolecules by modulating various electrical properties, such as the drain current, transconductance, and linearity parameters. The source region of the proposed TFET incorporates a SiGe (source)/Si (channel) heterojunction, utilizing a low bandgap material of SiGe. This heterojunction is employed to enhance the ON‐state current of the devices. The materials used and the fabrication steps involved in our proposed device are compatible with complementary metal‐oxide‐semiconductor (CMOS) technology. This analysis is conducted using a calibrated Silvaco technology computer‐aided design (TCAD) simulator. Additionally, by considering a dielectric constant range of 1–12, we calculate various figure of merits (FOMs) parameters for the device. These include evaluation of linearity, sensitivity, and noise characteristics. Furthermore, we have conducted an analysis of linearity FOMs, such as VIP2, VIP3, IIP3, and IMD3 for the proposed device under study. Additionally, the linearity analysis of the presented tunneling FET (TFET) indicates the device's excellent performance in distortionless switching operations. Consequently, the L‐shaped dielectrically modulated biosensor holds potential suitability for high‐speed circuit designs.

Circuit Level Implementation of Negative Capacitance Source Pocket Double Gate Tunnel FET for Low Power Applications

This manuscript presents a pioneering study on enhancing analog and radio frequency performance through the implementation of negative capacitance source pocket double gate tunnel field-effect transistor. By integrating a ferroelectric material into the gate stack and introducing a fully depleted n-type pocket near the source/channel junction, we achieved significant enhancements in key metrics such as ON current (ION), switching ratio, subthreshold swing (SS), and various analog/RF parameters like transconductance (gm), cutoff frequency (fT) when compared to existing literature. Additionally, we extend our analysis to circuit-level applications such as inverter and 5-stage ring oscillator. Our findings reveal an impressive inverter delay of 1.09 ps with a gain of 104, as well as a ring oscillator operating at a frequency of 500 GHz. These results position the proposed device as an ideal candidate for high-speed, low-power applications.

Two-dimensional transition metal dichalcogenides van der Waals heterojunctions with broken-gap for tunnel field-effect transistors applications

The scaling down of transistors is nearing the limits dictated by Moore's Law, primarily due to the quantum tunneling effect. This challenge has spurred considerable interest in exploring novel materials characterized by broken-gap band alignment. Among these materials, two-dimensional (2D) materials-based van der Waals heterojunctions (vdWHs) have emerged as promising candidates, owing to their nanoscale dimensions, which render them suitable for transistor construction. Type-III vdWHs, in particular, have been investigated for their ability to facilitate rapid quantum Band-To-Band Tunneling (BTBT), thereby enabling low-power charge transport. In our study, we conducted a detailed analysis of four vdWHs comprised of HfSe2 and WXY (where X and Y represent Se or Te). Our findings indicate that 2D WSeTe (or WTe2)/HfSe2 vdWHs exhibit a broken-gap band alignment (type-Ⅲ) under the influence of an external electric field, thus showcasing potential for integration into future tunnel field-effect transistors (TFETs). Additionally, our investigation revealed that the band gap of two other vdWHs, WTeSe (or WSe2)/HfSe2, varies linearly with the external electric field, fluctuating between 0.4 eV and 1.0 eV. This characteristic makes them well-suited for application as infrared detectors. By unveiling the distinct properties of these vdWH configurations, our research not only anticipates the emergence of a notable type-III band alignment vdWH but also underscores the potential of 2D vdWHs in optical sensor applications.

Al2O3/ZrO2 dual-dielectric Gr/CNT nanoribbon vertical tunnel FET based biosensor for genomic classification and S-protein detection in SARS-CoV-2

The ongoing genetic mutation of severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) possesses the capacity to inadvertently lead to an increase in both the rates of transmission and mortality. In this study, we showcase the use of an Al2O3/ZrO2 Dual-Dielectric Gr/CNT Nanoribbon vertical tunnel field-effect transistor biosensor for the purpose of detecting spike proteins of SARS-CoV-2 in clinical samples. The proteins mentioned above are situated within the protein capsids of the virus. The effectiveness of the suggested detector has been assessed through measurements of the alteration in current drain. The present study utilizes the dielectric coefficient analogue of viral proteins as a substitute for biomolecules that exhibit internal hybridization nanogaps. The high sensitivity of the suggested detector, as evaluated on a scale ranging from 0 to 115, suggests its potential as a high-quality sensing instrument. The purpose of this study is to examine the sensitivity of DNA charge density with the aim of identifying any alterations in the virus that may impact its ability to spread and infect humans. The chromosomal composition of SARS-CoV-2 has been determined. The CMC Research Centre, situated in Vellore, Tamil Nadu, India, conducted an examination of SARS-CoV-2 samples. The scientists possess the capability to do genome sequencing on these specimens, so facilitating the examination of mutation patterns and the dispersion of different clades. A total of 250 different mutations were found out of the 600 sequences that were evaluated. The sequencing data consists of a complete collection of 250 distinct variants, including 150 missense mutations, 80 synonymous mutations, 15 mutations in noncoding regions, and 5 deletions. The comprehension of genetic variety is significantly dependent on these mutations. The proposed detector is connected to a variety of previously documented biosensors based on field-effect transistors (FETs), which are employed for the examination of genetic modifications.

An ultra energy-efficient hardware platform for neuromorphic computing enabled by 2D-TMD tunnel-FETs

Brain-like energy-efficient computing has remained elusive for neuromorphic (NM) circuits and hardware platform implementations despite decades of research. In this work we reveal the opportunity to significantly improve the energy efficiency of digital neuromorphic hardware by introducing NM circuits employing two-dimensional (2D) transition metal dichalcogenide (TMD) layered channel material-based tunnel-field-effect transistors (TFETs). Our novel leaky-integrate-fire (LIF) based digital NM circuit along with its Hebbian learning circuitry operates at a wide range of supply voltages, frequencies, and activity factors, enabling two orders of magnitude higher energy-efficient computing that is difficult to achieve with conventional material and/or device platforms, specifically the silicon-based 7 nm low-standby-power FinFET technology. Our innovative 2D-TFET based NM circuit paves the way toward brain-like energy-efficient computing that can unleash major transformations in future AI and data analytics platforms.

Unveiling the influence of temperature and interface traps on the performance of source-all-around vertical TFET

This study investigates the electrical performance of a line-tunneling based source-all-around vertical Tunnel Field-Effect Transistor (SAA-VTFET) under diverse temperature and trap charge conditions. The proposed device achieves remarkable performance improvements across DC and AC parameters by employing strategically engineered III-V semiconductors and a wide source-channel tunneling heterojunction. Key metrics like on-state current (ION = 6.35 × 10−5 A/μm), off-state current (IOFF = 3.17 × 10−17 A/μm), threshold voltage (VT = ⁓0.18V), subthreshold swing (SSavg = ⁓7 mV/dec), transconductance (gm = 0.16 mS), cut-off frequency (fc = ⁓0.42 THz), gain bandwidth product (GBP), delay (τ), and various capacitances are thoroughly analyzed. Sentaurus TCAD 3D simulations employed in this study demonstrate the promising future of SAA-VTFETs in low-power and high-speed electronics.

Improvement of C-shaped pocket TFET with sandwiched drain for ambipolar performance and analog/RF performance

A novel structure of tunneling field effect transistor device (CSP-SD-TFET) is proposed, which adds a sandwiched drain to the C-shaped pocket TFET (CSP-TFET). This structure can increase the resistance of the drain, share the lateral electric field at the tunneling junction between the channel and the drain, reduce the lateral electric field at the tunneling junction, and suppress the generation of ambipolar current. The DC and analog/RF characteristics of CSP-SD-TFET are simulated and analyzed by Sentaurus TCAD, and the sandwiched structure parameters of the drain are optimized. The results show that the sandwiched drain structure suppresses the ambipolar current and on-state current, so the parameters of the sandwiched drain structure need to be a compromise between low ambipolar current and high on-state current. The optimized CSP-SD-TFET device has good DC characteristics, such as low average subthreshold swing SSavg (12.2mV/dec), high on/off current ratio Ion/Ioff (2.5 × 1011), high on-state current Ion (9.02 × 10−4 A/μm) and low ambipolar current Iamb (5.41 × 10−17A/μm). The RF performance of the CSP-SD-TFET, such as the cut-off frequency fT (1 × 1011 Hz) and gain-bandwidth product GBP (5.66 × 1010 Hz), are improved. It can be seen that the CSP-SD-TFET device not only has good DC characteristics but also improves analog/RF characteristics.

A Ternary Inverter Based on Hybrid Conduction Mechanism of Band-to-Band Tunneling and Drift-Diffusion Process.

In this paper, a novel transistor based on a hybrid conduction mechanism of band-to-band tunneling and drift-diffusion is proposed and investigated with the aid of TCAD tools. Besides the on and off states, the proposed device presents an additional intermediate state between the on and off states. Based on the tri-state behavior of the proposed TDFET (tunneling and drift-diffusion field-effect transistor), a ternary inverter is designed and its operation principle is studied in detail. It was found that this device achieves ternary logic with only two components, and its structure is simple. In addition, the influence of the supply voltage and the key device parameters are also investigated.

Optimization of Dual Material Based Dielectric Modulated Heterojunction Double Gate Tunnel FETs with Noise Reduction Analysis for High Frequency Applications

Optimization of Dual Material Based Dielectric Modulated Heterojunction Double Gate Tunnel FETs with Noise Reduction Analysis for High Frequency Applications

Design and Evaluation of a Double-Gate Tunnel Field Effect Transistor for the Detection of Breast Cancer Cells

This research paper investigates the application of a Double Gate (DG) Tunnel Field-Effect Transistor (DG-TFET) for the detection of cell lines derived from breast cancer tissue, namely Hs578T, MDA-MB-231, MCF-7, and T47D. The device incorporates two nanocavities positioned beneath the two gate electrodes, significantly enhancing detection capabilities. The study emphasizes the differentiation between healthy non-tumorigenic cells (MCF-10A) and breast cancer-derived cell lines by incorporating gate engineering into the TFET. Furthermore, the research explores the impact of changes in dielectric values specific to different breast malignant cell types on the biosensor's detection capabilities. Additionally, the investigation delves into the influence of variations in device geometry, including cavity dimensions and dielectric layer thickness, on critical parameters such as drain current sensitivity, transconductance sensitivity, and ION/IOFF sensitivity. Sensitivity analysis concerns drive current, ION/IOFF ratio, threshold voltage (Vth), and transconductance. The structural design of the device is tailored to facilitate array-based diagnosis and screening of cell lines derived from breast cancer tissue. This design offers several advantages, including a simplified transduction process, compatibility with CMOS processes, cost-effectiveness, reproducibility, and adjustable electrical responses. The researchers employed ATLAS, a two-dimensional (2D) device simulator from Silvaco, to model and define the device structure. The numerical simulations validate the device's performance, demonstrating favorable ON-OFF transition profiles.

Leaky-integrate-fire neuron based on vertically extended drain Si[formula omitted]Ge[formula omitted] source TFET: Ultra-energy-efficient and high speed design

This article investigates the performance of a vertically extended drain double gate Si1−x Gex source tunnel field effect transistor (VD-DG-Si1−x Gex S-TFET) as a leaky integrate-and-fire (LIF) neuron. The proposed VD-DG-Si1−x Gex S-TFET structure has been designed and optimized by deploying the commercially available Silvaco TCAD. The LIF neuron using VD-DG-Si1−x Gex S-TFET requires a low spiking threshold voltage (i.e. 0.20 V) which is 5x, 3x, 5x, 1.3x, 1.55x, 7.5x, and 1.44x times less in comparison to MOSFET, Bulk FinFET, phase change device, SOI MOSFET, DG-JLFET, silicon nanowire, and DL-TFET silicon neuron. The proposed device based neuron demonstrates the least spiking energy (177 ZJ) reported to date which is 18192 times less as compared to BTBT based PDSOI MOSFET neuron. The threshold value of current is achieved at 0.20 V drain voltage which is 15x, 14x, 10x, and 1.5x less as compared to FinFET, PD-SOI MOSFET, LBIMOS, and DL-TFET, respectively. Moreover, the effects of gate metal work function, germanium mole fraction, and temperature on the spike current variations have also been investigated. Here, impact ionization is a key method for generating a neuron spike due to holes accumulated in the potential well of VD-DG-Si1−xGex S-TFET. In addition, a LIF neuron based on VD-DG-Si0.5Ge0.5 S-TFET device exhibits a 9 THz spiking frequency which is approximately 12 times higher than real nerves present in the human body. This work shows a remarkable reduction in the power consumption and the proposed device neuron is a potential start-up solution for a large scale spiking neural networks (SNN) implementation because of its better performance and compact circuitry.

Quantum transport in WSe2/SnSe2 tunneling field effect transistors with high-k gate dielectrics

Combining two-dimensional materials and high-k gate dielectrics offers a promising way to enhance the device performance of tunneling field-effect transistor (TFET). In this work, the device performance of WSe2/SnSe2 TFET with various gate dielectric materials is investigated based on quantum transport simulation. Results show that TFETs with high-k gate dielectric materials exhibit improved on-off ratio and enhanced transconductance. The optimized WSe2/SnSe2 TFET with TiO2 gate dielectrics achieves an on-state current of 1560 μA/μm and a subthreshold swing (SS) of 48 mV/dec. The utilization of high-k gate dielectric materials results in shorter tunneling length, higher transmission efficiency, and increased electron tunneling probability. The performance of the WSe2/SnSe2 TFET would be affected by the presence of the underlap region. Moreover, WSe2/SnSe2 TFETs with La2O3 dielectric can be scaled down to 3 nm while meeting high-performance (HP) device requirements according to the International Technology Roadmap for Semiconductors (ITRS). This research presents a practical solution for designing advanced logic devices in the sub-5 nm technology node.