Ternary Operation Research Articles

Anti-absorbing ternary operations on metric spaces

The existence of a median-type ternary operation on a metric space is known to have a number of implications for the geometry of the space. For such operations, if two of the three arguments coincide, they also coincide with the output of the operation. We consider ternary operations with the opposite property: if two of the arguments coincide, the output is equal to the third one. The existence of such an operation is a necessary condition for the space to be an absolute retract.

A Study on Dual-Gate Dielectric Face Tunnel Field-Effect Transistor for Ternary Inverter.

In this article, we propose a dual-gate dielectric face tunnel field-effect transistor (DGDFTFET) that can exhibit three different output voltage states. Meanwhile, according to the requirements of the ternary operation in the ternary inverter, four related indicators representing the performance of the DGDFTFET are proposed, and we explain the impact of these indicators on the inverter and confirm that better indicators can be obtained by choosing appropriate design parameters for the device. Then, the ternary inverter implemented with this device can exhibit voltage transfer characteristics (VTCs) with three stable output voltage levels and bigger static noise margins (SNMs). In addition, by comparing the indicators of the DGDFTFET and a face tunnel field-effect transistor (FTFET), as well as the SNM of inverters, it is demonstrated that the performance of the DGDFTFET far surpasses the FTFET.

Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure

In this study, we demonstrate binary and ternary logic-in-memory (LIM) operations of inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect transistors (FBFETs) with a triple-gated structure. The NS FBFETs are reconfigured in p- or n-channel modes depending on the polarity of the gate bias voltage and exhibit steep switching characteristics with an extremely low subthreshold swing of 1.08 mV dec–1 and a high ON/OFF current ratio of approximately 107. Logic circuits consisting of NS FBFETs perform binary and ternary logic operations of the inverters and NAND and NOR gates in each circuit and store their outputs under zero-bias conditions. Therefore, NS FBFETs are promising components for next-generation LIM.

An Invitation to Higher Arity Science

Analytical thinking is dominated by binary ideas. From pairwise interactions to algebraic operations, to compositions of processes, to network models, binary structures are deeply ingrained in the fabric of most current scientific paradigms. In this paper, we introduce arity as the generic conceptualization of the order of an interaction between a discrete collection of entities and argue that there is a rich universe of higher arity ideas beyond binarity waiting to be explored. To illustrate this, we discuss several higher-order phenomena appearing in a wide range of research areas, paying special attention to instances of ternary interactions. From the point of view of formal sciences and mathematics, higher arity thinking opens up new paradigms of algebra, symbolic calculus and logic. In particular, we delve into the special case of ternary structures, as that itself reveals ample surprises: new notions of associativity (or lack thereof) in ternary operations of cubic matrices, ternary isomorphisms and ternary relations, the integration problem of 3-Lie algebras, and generalizations of adjacency in 3-uniform hypergraphs. All these are open problems that strongly suggest the need to develop new ternary mathematics. Finally, we comment on potential future research directions and remark on the transdisciplinary nature of higher arity science.

Exploring Semantic Redundancy using Backdoor Triggers: A Complementary Insight into the Challenges facing DNN-based Software Vulnerability Detection

To detect software vulnerabilities with better performance, deep neural networks (DNNs) have received extensive attention recently. However, these vulnerability detection DNN models trained with code representations are vulnerable to specific perturbations on code representations. This motivates us to rethink the bane of software vulnerability detection and find function-agnostic features during code representation which we name as semantic redundant features. This paper first identifies a tight correlation between function-agnostic triggers and semantic redundant feature space (where the redundant features reside) in these DNN models. For correlation identification, we propose a novel Backdoor-based Semantic Redundancy Exploration (BSemRE) framework. In BSemRE, the sensitivity of the trained models to function-agnostic triggers is observed to verify the existence of semantic redundancy in various code representations. Specifically, acting as the typical manifestations of semantic redundancy, naming conventions, ternary operators and identically-true conditions are exploited to generate function-agnostic triggers. Extensive comparative experiments on 1613823 samples of 8 representative vulnerability datasets and state-of-the-art code representation techniques and vulnerability detection models demonstrate that the existence of semantic redundancy determines the upper trustworthiness limit of DNN-based software vulnerability detection. To the best of our knowledge, this is the first work exploring the bane of software vulnerability detection using backdoor triggers.

SOME FUNDAMENTAL PROPERTIES OF HEAPS

Heap is defined to be a non-empty set with ternary operation satisfying associativity, that is for every and satisfying Mal’cev identity, that is for all . There is a connection between heaps and groups. From a given heap, we can construct some groups and vice versa. The binary operation of groups can be built by choosing any fixed element of heap and is defined by =[x,e,y] for any . Otherwise, for given a binary operation of group , we can make a ternary operation defined by for every On heaps, there are some notions which are inspired by groups, such as sub-heaps, normal sub-heaps, quotient heaps, and heap morphisms. On this study, we will associate sub-heaps and corresponding subgroups and discuss some properties of heap morphisms.

Formation of Cluster-Structured Metallic Filaments in Organic Memristors for Wearable Neuromorphic Systems with Bio-Mimetic Synaptic Weight Distributions.

With increasing demand for wearable electronics capable of computing huge data, flexible neuromorphic systems mimicking brain functions have been receiving much attention. Despite considerable efforts in developing practical neural networks utilizing several types of flexible artificial synapses, it is still challenging to develop wearable systems for complex computations due to the difficulties in emulating continuous memory states in a synaptic component. In this study, polymer conductivity is analyzed as a crucial factor in determining the growth dynamics of metallic filaments in organic memristors. Moreover, flexible memristors with bio-mimetic synaptic functions such as linearly tunable weights are demonstrated by engineering the polymer conductivity. In the organic memristor, the cluster-structured filaments are grown within the polymer medium in response to electric stimuli, resulting in gradual resistive switching and stable synaptic plasticity. Additionally, the device exhibits the continuous and numerous non-volatile memory states due to its low leakage current. Furthermore, complex hardware neural networks including ternary logic operators and a noisy image recognitions system are successfully implemented utilizing the developed memristor arrays. This promising concept of creating flexible neural networks with bio-mimetic weight distributions will contribute to the development of a new computing architecture for energy-efficient wearable smart electronics.

Design of Binary and Ternary Logic Inverters Based on Silicon Feedback FETs Using TCAD Simulator

A feedback field effect transistor (FBFET) with p-n-p-n structure benefits from a positive feedback mechanism. In this structure, the accumulated charges in its potential well and limitation of carrier flow by its internal potential barrier lead to superior electrical properties such as lower subthreshold swing (SS) and higher I ON / I OFF ratio in comparison with FinFET. Thus, FBFET is a promising alternative for digital applications such as logic inverters. In this paper, binary and ternary logic inverters are designed by using FBFETs with 40 nm channel length. The doping profile in the device plays an essential role and specifies the binary or ternary operation of the inverter. The inverter is analyzed by using a TCAD mixed-mode simulator. The results indicate the high value of 1010 for I ON / I OFF ratio with an extremely low SS (1 mV/decade). The voltage transfer characteristics of the inverter and its dependence on doping levels have been investigated. Also, the electrical properties of this inverter are compared with previous inverter counterparts.

TERNARY ∗-BANDS ARE GLOBALLY DETERMINED

A non-empty set \(S\) together with the ternary operation denoted by juxtaposition is said to be ternary semigroup if it satisfies the associativity property \(ab(cde)=a(bcd)e=(abc)de\) for all \(a,b,c,d,e\in S\). The global set of a ternary semigroup \(S\) is the set of all non empty subsets of \(S\) and it is denoted by \(P(S)\). If \(S\) is a ternary semigroup then \(P(S)\) is also a ternary semigroup with a naturally defined ternary multiplication. A natural question arises: "Do all properties of \(S\) remain the same in \(P(S)\)?" The global determinism problem is a part of this question. A class \(K\) of ternary semigroups is said to be globally determined if for any two ternary semigroups \(S_1\) and \(S_2\) of \(K\), \(P(S_1)\cong P(S_2)\) implies that \(S_1\cong S_2\). So it is interesting to find the class of ternary semigroups which are globally determined. Here we will study the global determinism of ternary \(\ast\)-band.

Piezo-gated flexible transistors: A path to energy-efficient multi-functional piezotronic devices

Developing smart sensors and advanced electronics for the need of the internet of things prevails yet under the constraint of energy efficiency. Therefore, the development of multi-functional devices toward low power is the research spotlight. Due to the low energy consumption, semiconductor-based piezo-gated devices hold great promises. Herein, a flexible multi-dimensional strain sensor by growing two ZnO thin film-based terminals on both sides of a mica substrate is developed. This Multidimensional Piezo-Gated Flexible Transistor (M-PGFT) device successfully detects the positive (upward) bending, negative (downward) bending, and compressive load. Where the gauge factor (GF) of the Top/Bottom terminals under positive and negative bending strains are −3.44/+9.78 and +5.44/−4.03, respectively, and +94.93/+74.70 for compressive load is obtained. Notably, the GF of both ZnO terminals is asymmetric under two bending types of loads, whereas symmetric under compressive load. This unique behavior made this smart multi-dimensional strain sensor to distinguish between different types of strains. Furthermore, the same device can be implemented as a piezo-gated three-valued logic device, demonstrating standard ternary inversion and standard ternary NAND operations. This study presents a unique and simple design to fabricate flexible multi-functional piezo-gated devices for multi-dimensional strain sensing and three-valued logic operation at low power.

A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors

A new type of heterojunction non-volatile memory transistor (H-MTR) has been developed, in which the negative transconductance (NTC) characteristics can be controlled systematically by a drain-aligned floating gate. In the H-MTR, a reliable transition between N-shaped transfer curves with distinct NTC and monolithically current-increasing transfer curves without apparent NTC can be accomplished through programming operation. Based on the H-MTR, a binary/ternary reconfigurable logic inverter (R-inverter) has been successfully implemented, which showed an unprecedentedly high static noise margin of 85% for binary logic operation and 59% for ternary logic operation, as well as long-term stability and outstanding cycle endurance. Furthermore, a ternary/binary dynamic logic conversion-in-memory has been demonstrated using a serially-connected R-inverter chain. The ternary/binary dynamic logic conversion-in-memory could generate three different output logic sequences for the same input signal in three logic levels, which is a new logic computing method that has never been presented before.

Fundamental heap for framed links and ribbon cocycle invariants

A heap is a set with a certain ternary operation that is self-distributive and exemplified by a group with the operation [Formula: see text]. We introduce and investigate framed link invariants using heaps. In analogy with the knot group, we define the fundamental heap of framed links using group presentations. The fundamental heap is determined for some classes of links such as certain families of torus and pretzel links. We show that for these families of links there exist epimorphisms from fundamental heaps to Vinberg and Coxeter groups, implying that corresponding groups are infinite. A relation to the Wirtinger presentation is also described. The cocycle invariant is defined using ternary self-distributive (TSD) cohomology, by means of a state sum that uses ternary heap [Formula: see text]-cocycles as weights. This invariant corresponds to a rack cocycle invariant for the rack constructed by doubling of a heap, while colorings can be regarded as heap morphisms from the fundamental heap. For the construction of the invariant, first computational methods for the heap cohomology are developed. It is shown that the cohomology splits into two types, called degenerate and nondegenerate, and that the degenerate part is one-dimensional. Subcomplexes are constructed based on group cosets, that allow computations of the nondegenerate part. Computations of the cocycle invariants are presented using the cocycles constructed, and conversely, it is proved that the invariant values can be used to derive algebraic properties of the cohomology.

Contact‐Driven Snapping in Thermally Actuated Metamaterials for Fully Reversible Functionality

AbstractMechanical instability is often harnessed in mechanical metamaterials to generate a diverse range of functionalities, and can be triggered by either a mechanical or a field stimulus, such as temperature. Existing field‐responsive metamaterials with snap‐through instability, however, need to rely on a mechanical input to realize functional reversibility, a limitation depriving them of the capacity to operate solely via the applied field. This work demonstrates reversible snap‐through instability in a bi‐material framework that is exclusively driven by environmental temperature. The need for mechanical intervention is bypassed by leveraging the thermally induced contact and mismatched thermal expansion of the constituent materials. A combination of experiments, theory and simulations, unveils the physics underpinning the thermally driven snapping undergoing four successive regimes of deformation: noncontact, full contact, partial contact, and release. The advantages of the concept are showcased in two applications. The first is the development of thermal switches with ternary operation (OFF‐ON‐OFF) and logic functions, going beyond the capabilities of current binary switches. The second is reversible temporal morphing in deployable structures programmed to snap sequentially in multiple locked configurations at predefined values of temperature, opening the door to applications across sectors, such as deployable antennas, soft robots, and self‐reconfigurable medical devices.

Multi-state tunnel field effect transistor based on face tunneling with gate-source overlap

In this paper, a ternary surface tunneling field effect transistor (TF-TFET) based on the tunneling mechanism is designed and fabricated. By adjusting the parameters and bias voltage of the surface tunneling and the line tunneling, the transistor introduces a stable ”intermediate state” between the switching states of conventional binary TFET devices, which realizes the function of a ternary logic device. The device can realize the conversion of ternary logic and binary logic devices under certain conditions, and realize various functions. The fabrication process of the device is compatible with the traditional CMOS process and is also of great significance for realizing the development of the ternary logic operation unit.

A novel approach to study ternary semihypergroups in terms of prime soft hyperideals

<abstract> <p>In this paper, we give the generalized form of soft semihypergroups in ternary structure and have studied it with the help of examples. There are some structures that are not appropriately handled by using the binary operation of the semihypergroup, such as all the sets of non-positive numbers are not closed under binary operation but hold for ternary operation. To deal with this type of problem and handling special type of uncertainty, we study the ternary semihypergroup in terms of prime soft hyperideals. We have introduced prime, strongly prime, semiprime, irreducible and strongly irreducible soft bi-hyperideals in ternary semihypergroups and studied certain properties of these soft bi-hyperideals in ternary semihypergroups. The main advantage of this paper is that we proved that each soft bi-hyperideal of ternary semihypergroup $K$ is strongly prime if it is idempotent and the set of soft bi-hyperideals of $K$ is totally ordered by inclusion.</p> </abstract>

Static random‐access memory with embedded arithmetic logic units for in‐memory computing and ternary content addressable memory operation

Static random‐access memory with embedded arithmetic logic units for in‐memory computing and ternary content addressable memory operation

3-post-Lie algebras and relative Rota-Baxter operators of nonzero weight on 3-Lie algebras

In this paper, first we introduce the notions of relative Rota-Baxter operators of nonzero weight on 3-Lie algebras and 3-post-Lie algebras. A 3-post-Lie algebra consists of a 3-Lie algebra structure and a ternary operation such that some compatibility conditions are satisfied. We show that a relative Rota-Baxter operator of nonzero weight induces a 3-post-Lie algebra naturally. Conversely, a 3-post-Lie algebra gives rise to a new 3-Lie algebra, which is called the subadjacent 3-Lie algebra, and an action on the original 3-Lie algebra. Then we construct an L∞-algebra whose Maurer-Cartan elements are relative Rota-Baxter operators of nonzero weight. Consequently, we obtain the twisted L∞-algebra that controls deformations of a given relative Rota-Baxter operator of nonzero weight on 3-Lie algebras. Finally, we introduce a cohomology theory for a relative Rota-Baxter operator of nonzero weight on 3-Lie algebras and use the second cohomology group to classify infinitesimal deformations.

Transparent, Multivalued Transistors Enabled By Area‐Selective Optical Doping on Ga‐Doped IZTO Thin Films

AbstractMultivalued transistors are demonstrated on wafer‐scale, sputtered gallium‐doped indium‐zinc‐tin‐oxide (Ga‐doped IZTO) thin films by area‐selective optical doping. Cation elemental doping and ultraviolet (UV) exposure are representative techniques to control the carrier concentrations of metal oxide semiconductors. In this work, both doping techniques are exploited to design a pseudo‐heterojunction on a monolithic Ga‐doped IZTO thin film to generate multivalued electrical characteristics. The resulting semiconductor channel possessed two distinct work functions (i.e., smaller work function on the UV‐exposed area with respect to the masked Ga‐doped IZTO area), which resulted in sequential activation with two turn‐on voltages under a gate voltage sweep. Consequently, a stable intermediate state is generated for the ternary operation of the devices. This work further demonstrates the fabrication of transparent ternary device arrays by utilizing transparent elements including indium tin oxide (ITO), Ga‐doped IZTO, SiO2, and glass as electrodes, semiconducting channels, dielectric layers, and substrates, respectively.

Ternary arithmetic, factorization, and the class number one problem

Ordinary multiplication of natural numbers can be generalized to a ternary operation by considering discrete volumes of lattice hexagons. With this operation, a natural notion of ‘3-primality’ -primality with respect to ternary multiplication- is defined, and it turns out that there are very few 3-primes. They correspond to imaginary quadratic fields Q(√-n), n > 0, with odd discriminant and whose ring of integers admits unique factorization. We also describe how to determine representations of numbers as ternary products and related algorithms for usual primality testing and integer factorization.

Ideal ring extensions and trusses

It is shown that there is a close relationship between ideal extensions of rings and trusses, that is, sets with a semigroup operation distributing over a ternary abelian heap operation. Specifically, a truss can be associated to every element of an extension ring that projects down to an idempotent in the extending ring; every weak equivalence of extensions yields an isomorphism of corresponding trusses. Furthermore, equivalence classes of ideal extensions of rings by integers are in one-to-one correspondence with associated trusses up to isomorphism given by a translation. Conversely, to any truss T and an element of this truss one can associate a ring and its extension by integers in which T is embedded as a truss. Consequently any truss can be understood as arising from an ideal extension by integers. The key role is played by interpretation of ideal extensions by integers as extensions defined by double homothetisms of Redei (L. Redei (1952) [24]) or by self-permutable bimultiplications of Mac Lane (S. Mac Lane (1958) [18]), that is, as integral homothetic extensions. The correspondence between homothetic ring extensions and trusses is used to classify fully up to isomorphism trusses arising from rings with zero multiplication and rings with trivial annihilators.