Ternary Operation Research Articles

О КОНГРУЭНЦ–КОГЕРЕНТНЫХ АЛГЕБРАХ РИСА И АЛГЕБРАХ С ОПЕРАТОРОМ

The paper contains a classification of congruence-coherent Rees algebras and algebras with an operator. The concept of coherence was introduced by D.Geiger. An algebra A is called coherent if each of its subalgebras containing a class of some congruence on A is a union of such classes. In Section 3 conditions for the absence of congruence-coherence property for algebras having proper subalgebras are found. Necessary condition of congruence-coherence for Rees algebras are obtained. Sufficient condition of congruence-coherence for algebras with an operator are obtained. In this section we give a complete classification of congruence-coherent unars. In Section 4 some modification of the congruence-coherent is considered. The concept of weak and locally coherence was introduced by I.Chajda. An algebra A with a nullary operation 0 is called weakly coherent if each of its subalgebras including the kernel of some congruence on A is a union of classes of this congruence. An algebra A with a nullary operation 0 is called locally coherent if each of its subalgebras including a class of some congruence on A also includes a class the kernel of this congruence. Section 4 is devoted to proving sufficient conditions for algebras with an operator being weakly and locally coherent. In Section 5 deals with algebras ⟨ A,d,f ⟩ with one ternary operation d ( x,y,z ) and one unary operation f acting as endomorphism with respect to the operation d ( x,y,z ). Ternary operation d ( x,y,z ) was defined according to the approach offered by V.K. Kartashov. Necessary and sufficient conditions of congruence-coherent for algebras ⟨ A,d,f ⟩ are obtained. Also, necessary and sufficient conditions of weakly and locally coherent for algebras ⟨ A,d,f, 0⟩ with nullary operation 0 for which f (0) = 0 are obtained.

A polynomial relational class of binary CSP

Finding a solution to a constraint satisfaction problem (CSP) is known to be an NP-hard task. Considerable effort has been spent on identifying tractable classes of CSP, in other words, classes of constraint satisfaction problems for which there are polynomial time recognition and resolution algorithms. In this article, we present a relational tractable class of binary CSP. Our key contribution is a new ternary operation that we name mjx. We first characterize mjx-closed relations which leads to an optimal algorithm to recognize such relations. To reduce space and time complexity, we define a new storage technique for these relations which reduces the complexity of establishing a form of strong directional path consistency, the consistency level that solves all instances of the proposed class (and, indeed, of all relational classes closed under a majority polymorphism).

A Clifford algebra approach to chiral symmetry breaking and fermion mass hierarchies

We propose a Clifford algebra approach to chiral symmetry breaking and fermion mass hierarchies in the context of composite Higgs bosons. Standard model fermions are represented by algebraic spinors of six-dimensional binary Clifford algebra, while ternary Clifford algebra-related flavor projection operators control allowable flavor-mixing interactions. There are three composite electroweak Higgs bosons resulted from top quark, tau neutrino, and tau lepton condensations. Each of the three condensations gives rise to masses of four different fermions. The fermion mass hierarchies within these three groups are determined by four-fermion condensations, which break two global chiral symmetries. The four-fermion condensations induce axion-like pseudo-Nambu–Goldstone bosons and can be dark matter candidates. In addition to the 125 GeV Higgs boson observed at the Large Hadron Collider, we anticipate detection of tau neutrino composite Higgs boson via the charm quark decay channel.

Design and implementation of the modified signed digit multiplication routine on a ternary optical computer.

Multiplication with traditional electronic computers is faced with a low calculating accuracy and a long computation time delay. To overcome these problems, the modified signed digit (MSD) multiplication routine is established based on the MSD system and the carry-free adder. Also, its parallel algorithm and optimization techniques are studied in detail. With the help of a ternary optical computer's characteristics, the structured data processor is designed especially for the multiplication routine. Several ternary optical operators are constructed to perform M transformations and summations in parallel, which has accelerated the iterative process of multiplication. In particular, the routine allocates data bits of the ternary optical processor based on digits of multiplication input, so the accuracy of the calculation results can always satisfy the users. Finally, the routine is verified by simulation experiments, and the results are in full compliance with the expectations. Compared with an electronic computer, the MSD multiplication routine is not only good at dealing with large-value data and high-precision arithmetic, but also maintains lower power consumption and fewer calculating delays.

High-performance ternary operators for scrambling

This paper presents two new ternary operators which can be used in different scrambling crypto algorithms. The employment of the proposed operators (ScramOp1 and ScramOp2) leads to reduction in the number of decoding steps, equivalent to only one operation per digit for the receiver side. These operators are presented for the first time in ternary logic. There are some other ternary operators such as SUM, which are specifically suitable for computer arithmetic but they lack desirable efficiency for cryptographic applications. The transistor-level designs of the operators are simulated by using Synopsys HSPICE with 32nm bulk-CMOS technology. Simulation results demonstrate that ScramOp1 and ScramOp2 achieve significant saving in energy consumption (2.11% and 12.14%) in comparison with SUM. Additionally, ScramOp2 requires only 52 transistors while 58 and 60 transistors are needed to implement ScramOp1 and SUM, respectively.

Ортогональні доповнення тернарних операцій.

In the article, we describe methods for construction of orthogonal ternary operations, and we study algorithms of finding orthogonal complements of a complete ternary operation and a pair of orthogonal ternary operations to a triplet of orthogonal ternary operations. We give a complete classification of recursive algorithms for construction of orthogonal ternary operations.

Selenoureas for anion binding as molecular logic gates

The first example of a molecular logic gate based on selenourea/anion host-guest interaction that performs a ternary logic operation using an 1H-NMR easy to read response output is described here. Selenoureas are very versatile receptors for anion binding, capable of forming both mono- and bi-coordinated adducts at room temperature in solution.

Beck–Chevalley condition and Goursat categories

We characterise regular Goursat categories through a specific stability property of regular epimorphisms with respect to pullbacks. Under the assumption of the existence of some pushouts this property can be also expressed as a restricted Beck–Chevalley condition, with respect to the fibration of points, for a special class of commutative squares. In the case of varieties of universal algebras these results give, in particular, a structural explanation of the existence of the ternary operations characterising 3-permutable varieties of universal algebras.

Large-scale rank and rigidity of the Teichmüller metric

We study the coarse geometry of the Teichmuller space of a compact orientable surface in the Teichmuller metric. We describe when this admits a quasi-isometric embedding of a euclidean space, or a euclidean half-space. We prove quasi-isometric rigidity for Teichmuller space of a surface of complexity at least 2: a result proven independently by Eskin, Masur and Rafi. We deduce that, apart from some well-known coincidences, the Teichmuller spaces are quasi-isometrically distinct. (See also Lemma 2.5 for further discussion.) We also show that Teichmuller space satisfies a quadratic isoperimetric inequality. A key ingredient for proving these results is the fact that Teichmuller space admits a ternary operation, natural up to bounded distance, which endows the space with the structure of a coarse median space whose rank is equal to the complexity of the surface. From this, one can also deduce that any asymptotic cone is bilipschitz equivalent to a CAT(0) space, and so in particular, is contractible

Noncommutative Galois Extensions and Ternary Clifford Analysis

In this paper we introduce the idea of Galois extension for a class of associative algebras and discuss binary and ternary Clifford algebras by such an algebraic construction. Nonion algebra is characterized by Galois extensions and a ternary structure is proposed for \({\mathfrak{su}(3)}\) leading to a duality for certain binary and ternary differential operators.

New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources

Novel designs of current-mode Ternary minimum (AND) and maximum (OR) are proposed in this paper based on Carbon NanoTube Field Effect Transistors (CNTFET). First, these Ternary operators are designed separately. Then, they are combined together in order to generate both outputs concurrently in an integrated design. This integration results in the elimination of common parts when both functions are required at the same time. The third proposed current-mode integrated circuit generates both ternary operators with the usage of only 30 transistors. The new designs are composed of three main parts: (1) the part which converts current to voltage; (2) threshold detectors; and (3) the parallel paths through which the output current flows. Unlike the previously presented structure, there is no need for any constant current source within the new designs. This elimination leads to less static power dissipation. The second proposed current-mode segregated Ternary minimum operates 43% faster and consumes 40% less power in comparison with a previously presented structure.

A three-valued photoelectrochemical logic device realising accept anything and consensus operations.

A new application of a hybrid material exhibiting the photoelectrochemical photocurrent switching (peps) effect in a three-valued logic device is reported. In contrast to other similar peps-based systems, the one described here is capable of performing basic ternary logic operations: gullibility and consensus.

Ordered groupoids and the holomorph of an inverse semigroup

We present a construction for the holomorph of an inverse semigroup, derived from the cartesian closed structure of the category of ordered groupoids. We compare the holomorph with the monoid of mappings that preserve the ternary heap operation on an inverse semigroup: for groups these two constructions coincide. We present detailed calculations for semilattices of groups and for the polycyclic monoids.

Existence and uniqueness of fixed point for mixed monotone ternary operators with application

Abstract In this paper, partial order theory is used to study the fixed point of a mixed monotone ternary operator A : P × P × P → P . The existence and uniqueness of a fixed point are obtained without assuming the operators to be compact or continuous. In the end, the application to an integral equation is presented. Our results unify, generalize, and complement various known comparable results from the current literature. MSC:47H05, 47H10.

Quantum dot ternary-valued full-adder: Logic synthesis by a multiobjective design optimization based on a genetic algorithm

A methodology is proposed for designing a low-energy consuming ternary-valued full adder based on a quantum dot (QD) electrostatically coupled with a single electron transistor operating as a charge sensor. The methodology is based on design optimization: the values of the physical parameters of the system required for implementing the logic operations are optimized using a multiobjective genetic algorithm. The searching space is determined by elements of the capacitance matrix describing the electrostatic couplings in the entire device. The objective functions are defined as the maximal absolute error over actual device logic outputs relative to the ideal truth tables for the sum and the carry-out in base 3. The logic units are implemented on the same device: a single dual-gate quantum dot and a charge sensor. Their physical parameters are optimized to compute either the sum or the carry out outputs and are compatible with current experimental capabilities. The outputs are encoded in the value of the electric current passing through the charge sensor, while the logic inputs are supplied by the voltage levels on the two gate electrodes attached to the QD. The complex logic ternary operations are directly implemented on an extremely simple device, characterized by small sizes and low-energy consumption compared to devices based on switching single-electron transistors. The design methodology is general and provides a rational approach for realizing non-switching logic operations on QD devices.

Ternary universal logic gates using quantum dot gate field effect transistors

In this paper, we have discussed universal logic gates, NAND and NOR logic using the circuit model of three-state quantum dot gate field effect transistor. Quantum dot gate field effect transistors produce one intermediate state between the normal two stable, on and off states due to a change in the threshold voltage over this range. The authors have developed a simplified circuit model that accounts for this intermediate state. Interesting logic can be implemented using quantum dot gate field effect transistors. In this work, designs of various quantum dot gate field effect transistor based two-input ternary logic operations like NAND and NOR and their application in implementing other ternary logic circuits, have been discussed. Increased number of states in three state quantum dot gate field effect transistor increases the number of bit handling capability of this device and helps us to handle more bits at a time with less circuit elements.

On some ternary operations in knot theory

We introduce a way to color the regions of a classical knot diagram using ternary operations, so that the number of colorings is a knot invariant. By choosing appropriate substitutions in the algebras that we assign to diagrams, one obtains the relations from the knot group, and from the core group. Using the ternary operator approach, we generalize the Dehn presentation of the knot group to extra loops, and a similar presentation for the core group to the variety of Moufang loops.

Design of ternary counter based on adiabatic domino circuit

By researching the ternary counter and low power circuit design method, a novel design of low power ternary Domino counter on switch-level is proposed. Firstly, the switch-level structure expression of ternary loop operation circuit with enable pin is derived according to the switch-signal theory, and the one bit ternary counter is obtained combining the ternary adiabatic Domino literal operation circuit and buffer. Then the switch-level structure expression of enable signal circuit is derived, and the four bits ternary counter is obtained by cascade connection. Finally, the circuit is simulated by Spice tool and the output waveforms transform in proper order indicating that the logic function is correct. The energy consumption of the four bits ternary adiabatic Domino counter is 63% less than the conventional Domino counterpart.

C1-structure on the cohomology of the free 2-nilpotent lie algebra

We consider the free 2-step nilpotent Lie algebra and its cohomology ring. The homotopy transfer induces a homotopy commutative algebra on its cohomology ring which we describe. We show that this cohomology is generated in degree 1 as C1-algebra only by the induced binary and ternary operations.

Design of ternary low-power Domino JKL flip—flop and its application

By researching the ternary flip—flop and the adiabatic Domino circuit, a novel design of low-power ternary Domino JKL flip—flop on the switch level is proposed. First, the switch-level structure of the ternary adiabatic Domino JKL flip—flop is derived according to the switch-signal theory and its truth table. Then the ternary loop operation circuit and ternary reverse loop operation circuit are achieved by employing the ternary JKL flip—flop. Finally, the circuit is simulated by using the Spice tool and the results show that the logic function is correct. The energy consumption of the ternary adiabatic Domino JKL flip—flop is 69% less than its conventional Domino counterpart.