Terminal Charges Research Articles

Characterization of Membrane Pores Formed by Cationic Amphipathic α-Helical Antimicrobial Peptides

Antimicrobial peptides can kill bacteria by permeabilizing their membranes. One proposed mechanism is by forming a membrane-spanning toroidal pore, where peptides in a transmembrane orientation are lining the pore. It is hard to study such transient pores unless conditions to stabilize the pore are found. We have recently shown that pore formation is promoted and pores stabilized by lipids with a positive spontaneous curvature, like lyso-lipids [1,2]. Using KIA peptides with a repetitive amino acid sequence KIAGKIA of different length, we observed that the amphipathic α-helices can insert into DMPC membranes in the presence of lyso-MPC, and that the tilt angle of the peptides depend on hydrophobic matching between the peptide length and the membrane thickness, i.e., that longer peptides are more tilted for a given bilayer thickness [3,4]. We used solid-state 31P-, 15N- and 2H-NMR on the cationic antimicrobial peptide MSI-103 (also called KIA21) to characterize the pore in detail. The minimum concentration of peptide and lyso-lipid for pore formation was determined, and the effect of charges on the normal lipid or the lyso-lipid was studied. Our results show that pore formation is enhanced in the presence of anionic lyso-MPG compared to neutral lyso-MPC, indicating that a toroidal wormhole pore, enriched in lyso-lipids, is indeed formed. We also found that pore formation is affected by terminal charges of the peptides: charged residues are improving activity when located at the N-terminus but reducing it at the C-terminus. This is discussed in terms of the 3D hydrophobic moment [5] of the peptides.

Compact Modeling of Surface Potential, Drain Current and Terminal Charges in Negative Capacitance Nanosheet FET including Quasi-Ballistic Transport

In this article, we propose a compact model for Negative Capacitance Nanosheet Field Effect Transistor (NC-NSFET) including quasi-ballistic transport for sub-7nm technology node. The model captures the electrical characteristics of NC-NSFET for different ferroelectric thicknesses. Further, it captures the reverse short channel effects of NCFET for different channel lengths with a single set of parameters. Also, we build a model for terminal charges of NC-NSFET using the core model and the earlier developed inner fringing charge model. Using our physics-based model, we find that quasi ballistic transport worsens the capacitance matching in NCFET compared to drift-diffusion only case. We validate the compact model for the drain current and the terminal charges with the TCAD results. The proposed compact model is computationally efficient and implemented in the Verilog-A code to enable SPICE circuit simulations. Finally, we demonstrate this by applying our model for NC-NSFET based CMOS inverter and SRAM circuit implementations in SPICE.

Large-signal model of 2DFETs: compact modeling of terminal charges and intrinsic capacitances

We present a physics-based circuit-compatible model for double-gated two-dimensional semiconductor-based field-effect transistors, which provides explicit expressions for the drain current, terminal charges, and intrinsic capacitances. The drain current model is based on the drift-diffusion mechanism for the carrier transport and considers Fermi–Dirac statistics coupled with an appropriate field-effect approach. The terminal charge and intrinsic capacitance models are calculated adopting a Ward–Dutton linear charge partition scheme that guarantees charge conservation. It has been implemented in Verilog-A to make it compatible with standard circuit simulators. In order to benchmark the proposed modeling framework we also present experimental DC and high-frequency measurements of a purposely fabricated monolayer MoS2-FET showing excellent agreement between the model and the experiment and thus demonstrating the capabilities of the combined approach to predict the performance of 2DFETs.

Upgrade of Drain Current Compact Model for Nanoscale Triple-Gate Junctionless Transistors to Continuous and Symmetric

In this brief, we upgrade our initial drain current compact model for triple-gate junctionless transistors (JLTs) to a continuous model satisfying the source/drain (S/D) symmetry. This is achieved by reformulating the key equations of our original model, using Lambert-function-based terminal charges. The upgraded model is compact, bulk-referenced valid in all regions of operation and it is validated through comparison with experimental data to verify its accuracy. The symmetry condition is investigated and validated performing the dc Gummel symmetry test (GST) for all derivatives up to the fifth order.

Optimizing the fold stability of the circularly permuted Trp-cage motif.

Through optimization of the linker region and key stabilizing mutations, it has been possible to improve the stability of the circularly permuted (cp) Trp-cage miniprotein. However, even the most stable Trp-cage circular permutants are still less stable than the analogous standard topology (std) Trp-cages. Extending mutational studies of Trp-cage fold stability to cp-species, including analogs lacking chain terminal charges, has uncovered and quantitated some additional stabilizing and destabilizing interactions. Upon protonation, the circular permutants are destabilized to a much greater extent than the standard topology series. End effects, particularly Coulombic interactions, appear to be more important for the cp-series while the Y10/P4 interaction in the cp-series is not as significant a stabilizing feature as the corresponding Y3/P19 in the standard topology series.

Explicit continuous models of drain current, terminal charges and intrinsic capacitance for a long-channel junctionless nanowire transistor

An explicit charge-based solution for the drain current, terminal charges and intrinsic capacitance of a long-channel junctionless nanowire transistor (JNT) incorporating the importance of an interface trap density that affect the threshold voltage and the subthreshold slope is presented in this study. Initially, a continuous implicit solution of the unified charge-based control model (UCCM) is derived from the 1D Poisson equation by invoking the parabolic potential approximation. The the continuous solution of the mobile charge density at the source/drain is obtained by adding the decoupled UCCM expression for the depletion and complementary parts, where each part is explicitly solved using the Lambert function without having an additional smoothing function to unify the two limits. The omission of an additional smoothing function could lead to a shorter computation time. Secondly, by solving Pao-Sah’s dual integral, a continuous charge-based expression for the drain current is derived. The expressions for the terminal charge are then derived based on the decoupled drain current model that also becomes an input for computing all four independent capacitances of the JNT. The explicit continuous models show a good agreement with numerical simulation over practical terminal voltages, doping levels, and geometry effects. For a given maximum surface potential error of 5%, the model is accurate for a dopant-geometry ratio of 0.001 < qNDR2/4ϵSi < 0.3 and it is also independent of fitting parameters that may vary for different terminal biases or dopant geometries. The nonpiecewise models for drain current, terminal charges and intrinsic capacitance are significantly resolved by decoupling the mobile charge into depletion and complementary parts with no additional smoothing function to unify between operating regions, and omitting fitting parameters that have no physical meaning.

Static and Quasi-Static Drain Current Modeling of Tri-Gate Junctionless Transistor With Substrate Bias-Induced Effects

In this paper, a surface potential-based drain current model is developed to explore the static and quasi-static performance of substrate-biased tri-gate junctionless field-effect-transistors (TGJLFETs). The effects of substrate bias voltage on surface potential, charge density, and drain current are analyzed. The 2-D Poisson’s equation is solved to obtain front and back surface potentials incorporating the effect of substrate bias voltage for a long-channel TGJLFET. The front and back surface potentials are subsequently utilized to obtain total conduction charge density and drain current. Further, short-channel and quantum mechanical corrections are incorporated in the model to use it for scaled devices. Moreover, the terminal charges calculated using Ward–Dutton’s charge partitioning scheme are utilized to model the transcapacitances and quasi-static drain current for TGJLFET. Further, an equivalent large-signal transient model of the device is implemented in SPICE using Verilog-A, and the transient behavior of inverter and ring oscillator circuits are simulated and studied. The models are validated using a 3-D Visual TCAD device simulator from Cogenda Pvt. Ltd.

A quasi-ballistic drain current, charge and capacitance model with positional carrier scattering dependency valid for symmetric DG MOSFETs in nanoscale regime

This paper presents a physically valid quasi-ballistic drain current model applicable for nanoscale symmetric Double Gate (SDG) MOSFETs. The proposed drain current model includes both diffusive and ballistic transport phenomena. The model considers the important positional carrier scattering dependency effect near the source region described in terms of transmission and reflection co-efficients related to the scattering theory. The significance of carrier transport near the bottleneck source region is illustrated where the carriers diffuse into the channel at a relatively lower velocity before accelerating ballistically. The results obtained demonstrate carrier scattering dependency at the critical layer defined near the low field source region on the drain current characteristics. The proposed model partly evolves from Natori’s ballistic bulk MOSFET model that is modified accordingly to be valid for a symmetric Double Gate MOSFET in the nanoscale regime. Carrier degeneracy and Fermi–Dirac statistics are included in the work so as to justify the complete physicality of the model. The model is further extended and is shown to be continuous in terms of terminal charges and capacitances in all regions of operation. A comparative analysis is also done between the proposed quasi-ballistic model and a hypothetical complete ballistic device.

Modeling and Simulation of Quasi-Ballistic III-Nitride Transistors for RF and Digital Applications

This paper presents a self-consistent analytic model to describe the current-voltage (I-V) and charge-voltage (Q-V) behavior of quasi-ballistic III-nitride transistors. We focus on two types of transistor geometries: (i) high electron mobility transistors (HEMTs) suitable for radio frequency (RF) applications and (ii) nanowire field-effect transistors (FETs) for digital applications. Our core model is based on Landauer transport theory which is combined with the calculation of charge density and velocity of charges at the top-of-the-barrier in the transistor. The effect of extrinsic device features, such as the nonlinearity of access regions and Joule heating at high currents, are included in the static I-V model. In the case of the dynamic Q-V model, we calculate intrinsic terminal charges by approximating the solution of the 2D Poisson equation in the channel over a broad bias range. The effect of fringing capacitances, prominently inner-fringing capacitance that varies nonlinearly with the gate bias, is included in our Q-V model. We amend the model electrostatics and the description of source/drain rectifying contacts in our core model to represent the I-V characteristics of III-nitride nanowire FETs. The model shows excellent match against experimentally and numerically measured characteristics of GaN transistors with gate lengths ranging from 42 nm to 274 nm. With only 38 input parameters, most of which are extracted based on straightforward device characterization, our model can be used for device-circuit co-design and optimization using a standard hierarchical circuit simulator.

Merger waves and alliance stability in container shipping

Recently, the container shipping industry has been witnessing a wave of new mergers and reshuffling of cooperation agreements (alliances), which have heavily affected the market. This development has also taken place among vertically integrated carriers, thus affecting not just the shipping side of the business, but the different supply chains as well. By using non-cooperative merger control games, featuring carriers involved in strategic alliances and competition authorities, this paper analyses the impact of the vertical integration of carriers and terminal operators on the stability of alliances. Starting from a benchmark set-up where carriers and stevedores are separated, we first find that when the integration concerns merging carriers only, alliance stability is undermined because non-merging allied carriers are more likely to register losses due to market share reductions and possibly higher terminal tariffs. However, by assuming that alliance agreements are extended to terminal operations, for all the allied partners, we show that alliances might be more stable, since non-merging carriers are vertically integrated as well and can internalize terminal charges. Given the on-going trends of consolidations in container shipping, this last hypothesis implies that merger waves might still occur without the breaking down of alliances, as long as landside cooperation among carriers along the supply chain, is also considered.

A Compact Charge and Surface Potential Model for III–V Cylindrical Nanowire Transistors

Considering the demand of III-V multigate (MUG) transistors for next-generation CMOS technologies, a compact model is required to test their performance in different circuits. The low effective mass and highly confined geometry of these MUG devices demand the use of computationally expensive coupled Poisson-Schrödinger (PS) solver for terminal charges and surface potential. In this paper, we propose an approximation, which decouples the PS equations and enables the development of a computationally efficient analytical model. The surface potential and semiconductor charge equations for III-V low effective mass channel cylindrical nanowire (NW) transistors are derived using the proposed approximation. The proposed model is physics-based and does not include any empirical parameters. The accuracy of the model is verified across NWs of different sizes and materials using the data from the 2-D PS solver and found to be accurate.

Impacts of the Terminal Charged Residues on Polyproline Conformation.

Cis-trans isomerization of proline is involved in various biological processes, such as protein folding, cell signaling, and ion-channel gating. Polyproline is a useful system for better understanding proline isomerization because it exists predominantly as two forms, all-cis polyproline I (PPI) and all-trans polyproline II (PPII) helices. The stability of PPI and PPII can be modulated by various effects, including aromatic-proline interactions, terminal charges, and stereoelectronic effects. Here, we used a series of oligoproline peptides in which positively charged or negatively charged amino acids were incorporated into the termini to investigate their effects on polyproline conformation. Circular dichroism measurements show that a cationic residue at the C-terminus or an anionic residue at the N-terminus increases the stability of a PPII helix; in particular, the C-terminal cationic residues impose an enormous impact on PPII stability. The electrostatic attractions between a cationic sidechain and the C-terminal carboxylate exhibit a greater effect than those between an anionic sidechain and the N-terminal ammonium on the conversion of PPII to PPI, suggesting that the stabilization effect of electrostatic interactions on PPII is directional. In contrast, incorporating a cationic residue seems more favorable than adding an anionic residue into the N-terminus because the cationic residue can stabilize PPI. Moreover, the predicted dipole moments from optimized oligopeptide models reveal that the macrodipole of the peptides with a cationic residue at the C-terminus exhibits the opposite direction to that of other peptides in the PPI conformation, suggesting that such a dipole distortion may cause these peptides to disfavor PPI helices. Together, we have found that the introduction of terminal electrostatic interactions can have a significant effect on PPII stability, providing useful information to the design of polyproline-based scaffolds for biomedical applications.

Compact Modeling of Drain Current, Charges, and Capacitances in Long-Channel Gate-All-Around Negative Capacitance MFIS Transistor

In this paper, we present a surface potential-based explicit continuous model for a metal-ferroelectric-insulator-semiconductor (MFIS) type gate-all-around negative capacitance transistor (GAA-NCFET). Unlike previously reported models, an explicit formulation to calculate the electrical characteristics of GAA-NCFET is proposed. Our model includes the radial dependence of the electric field in the ferroelectric, ignored in the previous works and accurately captures ferroelectric material parameter variations in the nonhysteretic regime. In contrast to bulk NCFETs, GAA-NCFET characteristics show different bias dependence due to the absence of bulk charge. We also present analytical expressions for the terminal charges which are essential to obtain the trans-capacitances for transient simulations. We find that, compared with conventional MOSFETs, the gate charge saturates to a different fraction of its maximum value. Furthermore, the modeling of quantum mechanical effect and overlap capacitances in an MFIS NCFET structure is discussed. Finally, the proposed model has been implemented in Verilog-A and tested for the transient response of ring oscillator in a commercial circuit simulator.

A Core Compact Model for IGZO TFTs Considering Degeneration Mechanism

A core scheme including dc and capacitance models of amorphous indium gallium zinc oxide thin-film transistors is presented based on terms of surface potential. Due to the intrinsic physical fact, carrier degeneracy is taken into account. A simpler symmetric quadrature version of charge-sheet model is adopted, which offers a new approach to deduce the expressions of current and terminal charges. Through the extensive comparisons between model results and numerical iterations or experimental data, the validity of the proposed models is strongly supported. The simplicity of algorithm and clear physical conception make the model suitable for circuit simulators.

Physics-Based Compact Model of Parasitic Bipolar Transistor for Single-Event Transients in FinFETs

A physics-based compact model of the parasitic bipolar current induced by an energetic particle is presented for single-event transients in FinFETs. The terminal charges are modeled to predict the body voltage of the FinFET in the transient correctly. The models are implemented using Verilog-A and are verified through 3-D technology computer-aided design (TCAD) simulations. The results of the modeling show good agreement with the TCAD data, for both structural variations and energy variations of the energetic particles.

Compact Model for Low Effective Mass Channel Common Double-Gate MOSFET

In the spirit of quantum drift-diffusion formalism, we propose a core compact model for low-effective mass channel common double-gate MOSFET. In contrast to the existing models, carriers in each subband are treated to be in locally thermal equilibrium within that subband, but not with the carriers in a different subband. We observe quasi-linear relationship between energy eigenvalue, quasi-Fermi level, and carrier density in each subband and exploit it to obtain closed-form expressions for drain current and terminal charges. Proposed model, which is free from any unphysical model parameter or interpolating function, captures the essential device physics (strong transverse confinement, wave function penetration, multisubband occupancy, bias-dependent diffusivity, and Fermi–Dirac distribution of the carriers) while preserving the mathematical simplicity of industry standard Silicon MOSFET models. Drain current, conductance, and capacitances calculated from the proposed model are found to be in good agreement with numerical device simulation for a wide range of channel thickness, effective mass, oxide thickness asymmetry, and bias voltages.

Competition and cooperation for intermodal container transhipment: A network optimization approach

This study presents an analysis of cross-border competition and cooperation between ports in Bangladesh and India. Nepal and Bhutan are countries without access to seaports — two landlocked countries in South Asia, depending solely on the Indian port of Kolkata for their international seaborne trade. Alternatives do exist in the Bangladeshi ports of Chittagong and Mongla but these are not exploited, in spite of trade agreements that allow access to a third country's port, and/or crossing the land of a third, intermediate, country. We formulate a mixed integer linear programming optimization model to find the optimum economic benefit of port users (serving Bhutan, Nepal and Northeast India) and port authorities (Chittagong, Kolkata, Mongla), were Indian and Bangladeshi ports to cooperate in serving intermodal transhipment traffic. Our results show that port users would benefit greatly from such a cooperation, in terms of reduced transportation costs, although Kolkata Port Authority (KPA) would suffer a revenue loss for which it ought to be somehow compensated. Sensitivity analyses considering equal terminal handling charges (THC) for transhipment container at the three ports, as well as different capacity and demand volatilities are also carried out, to establish the robustness of any strategic decisions that might be made on the basis of our findings. Finally, we show that inland transportation costs determine container transhipment demand to distant hinterlands, rather than THC at ports.

Container shipping route design incorporating the costs of shipping, inland/feeder transport, inventory and CO2 emission

As container shipping networks have become important components in global supply chains, route design should take both maritime and inland factors into consideration. In this article, a model is proposed to optimise container flows between two continents via an end-to-end service. The model is concerned not only with the design of an optimal shipping route but also with inland connections between hinterlands and ports. The objective is to minimise total costs, consisting of ship costs, port costs, inland/feeder transport costs, inventory costs and CO2 costs. The model is applied to the actual trade between Europe and the United States. Computational outcomes show that ship costs and port costs (port dues and terminal handling charges) represent less than one third of total costs. Therefore, the maritime network is only a part of a bigger system and piecemeal optimisation may not guarantee the optimisation of the whole network. Inland/feeder transport costs contribute the most to total costs, and they are influenced significantly by port choice. Although the use of a greater number of ports results in longer distances and higher shipping costs, this benefits in terms of lower distribution costs between hinterlands and ports. Inventory costs play a considerable part in total costs and they increase as vessel capacity goes up. In other words, these costs present a barrier to the introduction of bigger vessels. Optimal size is obviously a trade-offs between inventory and shipping costs.

Physics-Based Multi-Bias RF Large-Signal GaN HEMT Modeling and Parameter Extraction Flow

In this paper, a consistent DC to RF modeling solution for Al gallium nitride (GaN)/GaN high electron mobility transistors is demonstrated that is constructed around a surface-potential-based core. Expressions for drain current and intrinsic terminal charges in the form of surface-potential are used to simultaneously model the DC characteristics and the intrinsic capacitances of a commercial GaN device. Self-heating and trapping effects are incorporated to account for the non-linear nature of the device. We discuss the parameter extraction flow for some of the key model parameters that are instrumental in fitting the DC characteristics, which simultaneously determines the bias-dependent intrinsic capacitances and conductances that significantly eases the RF parameter extraction. Parasitic capacitances, gate finger resistance, and extrinsic bus-inductances are extracted, from a single set of measured non-cold-FET S-parameters, using the model process design kit. The extraction procedure is validated through overlays of broadband (0.5–50 GHz) S-parameters, load-pull and harmonic-balance (10 GHz) simulations against measured data, under multiple bias conditions to successfully demonstrate the model performance at large-signal RF excitations.

Nanomaterials: Reconfigurable Chiral Self‐Assembly of Peptides through Control of Terminal Charges (Small 30/2017)

Nanomaterials: Reconfigurable Chiral Self‐Assembly of Peptides through Control of Terminal Charges (Small 30/2017)