Terms Of Total Harmonic Distortion Research Articles

Modeling, Simulation and Harmonic Reduction of Three-Phase Multilevel Cascaded Inverters with SVPWM for Photovoltaic System

This paper presents a control for a three-phase an eleven-level cascaded H-bridge inverter for photovoltaic (PV) system. The maximum power point tracking (MPPT) is capable of extracting maximum power from the PV array connected to each DC link voltage level. The MPPT algorithm is solved by fuzzy logic controller. Space vector pulse width modulation (SVPWM) algorithm uses a simple mapping to generate gate signals for the inverter. This is done to achieve high dynamic performance with low total harmonic distortion (THD). The validity of the system is verified through MATLAB/Simulink and results are compared with three-phase three-level, five-level, seven-level and nine-level cascaded H-bridge inverter for PV system in terms of THD. Finally, simulation results are presented to verify the effectiveness and accuracy of the proposed system.

Simulation and an experimental investigation of SVPWM technique on a multilevel voltage source inverter for photovoltaic systems

This paper presents a space vector pulse width modulation (SVPWM) control for a three-phase five-level diode clamped multilevel inverter (DCMLI) for photovoltaic (PV) systems. SVPWM algorithm uses a simple mapping to generate gate signals for the inverter. The location of the reference vector and time are easily determined. The maximum power point tracking (MPPT) is capable of extracting maximum power from PV array connected to each DC link voltage level. The MPPT algorithm is solved by fuzzy logic controller. A digital design of a generator SVPWM using hardware description language (VHDL) is proposed and implemented on a field programmable gate array (FPGA). This is done to achieve high dynamic performance with low total harmonic distortion (THD). Simulation and experimental results are given to verify the implemented SVPWM control in terms of THD. The results are compared with conventional sinusoidal pulse width modulation (SPWM) in terms of lower THD is obtained. Finally, the implementation on a FPGA is tested in a laboratory with a real prototype using a three-level three-phase voltage source inverter. Experimental results are presented to verify the effectiveness and accuracy of the proposed system. This scheme can be easily extended to an n-level inverter for PV system.

FPGA based multilevel cascaded inverters with SVPWM algorithm for photovoltaic system

This paper presents the control for three-phase multilevel cascaded H-bridge inverter for photovoltaic (PV) system. The maximum power point tracking (MPPT) is capable of extracting maximum power from the PV array connected to each DC link voltage level. The MPPT algorithm is solved by perturbation and observation method (P&O). Space vector pulse width modulation (SVPWM) algorithm uses a simple mapping to generate gate signals for the inverter. The location of the reference vector and time are easily determined. The adjustments of modulation index and phase angles are synthesized onto field programmable gate array (FPGA) by means of hardware description language (VHDL). A digital design of the generator SVPWM using VHDL is proposed and implemented on FPGA. This is done to achieve high dynamic performance with low total harmonic distortion (THD). Simulation and experimental results are given to verify the implemented SVPWM control for PV system in terms of THD.

Characterization of a system for measurements on soft ferrites

This paper deals with the characterization of a system for measurements on soft ferrites through a volt-amperometric method. The accurate control of the driving input field is discussed as a critical aspect for the definition of the correct operating conditions on the magnetic sample. A custom-built transimpedance amplifier is characterized in terms of total harmonic distortion and signal-to-noise and distortion ratio of the primary current and shown as a valid configuration for the required purposes. As a main contribution, the uncertainty analyses of the major loop measurement and of the magnetic accommodation measurement of minor asymmetric loops are provided.

Effectual SVPWM Techniques and Implementation of FPGA Based Induction Motor Drive

This paper presents a field programmable gate array(FPGA)-based control integrated circuits(IC) for controlling the pulsewidth modulation (PWM) inverter used in power conditioning system for ac-voltage regulation. Space vector pulsewidth modulation(SVPWM) algorithm offers great flexibility to optimise switching waveform. Among them,double edge triggering can be implemented, It consumes less power compare to other PWM techniques. The SVPWM pulses thus generated through Xilinx is given as switching pulses to voltage source inverter(VSI) circuit to trigger the motor. The delay time of PWM output is programmable and SVPWM control IC is reprogrammable.It shows the advantage of lower total harmonic distortion(THD) without increasing the switching losses. Results are provided along with simulation analysis in terms of THD,output fundamental voltage and voltage transfer ratio to verify the feasibility of operation. The SVPWM switching pattern has been achieved with a fundamental frequency of 50HZ.

Simulation and Performance Evaluation of Total Harmonic Distortion And Fft Analysis in Multi Carrier Nine-Level Cascade H- Bridge Inverter Using Psim

This paper presents a harmonic analysis in terms of Total Harmonic Distortion (THD) and Fast Fourier transformation (FFT) for a Nine level cascaded H-Bridge Multi level inverter(CHB-MLI) with phase shift PWM and level shifted PWM. The performance indices of the proposed system are simulated using PSIM and tabulated. Various level shift PWM techniques like Phase Displacement (PD), Phase opposition Displacement (POD), Anti Phase opposition Displacement (APO), variable frequency (VF) and Carrier overlap (CO) is discussed. It is inferred from the simulation that THD and FFT of COPWM is low.

Space-vector-based hybrid pulse width modulation technique to reduce line current distortion in induction motor drives

Pulse width modulation (PWM) techniques involving different switching sequences are used in space vector-based PWM generation for reducing line current ripple in induction motor drives. This study proposes a hybrid PWM technique employing five switching sequences. The proposed technique is a combination of continuous PWM, discontinuous PWM (DPWM) and advanced bus clamping PWM methods. Performance of the proposed PWM technique is evaluated and compared with those of the existing techniques on a constant volts per hertz induction motor drive. In terms of total harmonic distortion in the line current, the proposed method is shown to be superior to both conventional space vector PWM (CSVPWM) and DPWM over a fundamental frequency range of 32–50 Hz at a given average switching frequency. The reduction in harmonic distortion is about 42% over CSVPWM at the rated speed of the drive.

Space vector-based synchronised bus-clamping pulse width modulation algorithms for three-level voltage source inverter in overmodulation region

The main objective of the present work is to develop space vector-based synchronised bus-clamping pulse width modulation algorithms to improve total harmonic distortion and higher DC-bus utilisation of the three-level inverter in overmodulation region. The proposed algorithms can generate synchronised pulse width modulation waveforms with all possible pulse number preserving all the waveform symmetries. The results of the proposed algorithms are evaluated and compared with conventional space vector pulse width modulation algorithm. It is shown that the proposed algorithms give improved results in terms of total harmonic distortion and DC-bus utilisation than that of conventional one in overmodulation region. The proposed method is implemented and verified experimentally on a constant v/f drive fed from insulated gate bipolar transistor (IGBT)-based voltage source inverter using Motorola power PC-based embedded controller.

A comparative study on the grid integrated wind energy conversion systems (WECS) using different generator models

A huge number of wind generators are going to be connected with the existing network in the near future. Therefore, it is necessary to analyse various models of wind energy conversion systems (WECS) for the purpose of studying the impacts upon grid. This paper presents comparative study on grid connected WECS having two different wind turbine generator systems (WTGS): model 1 [WTGS having doubly fed induction generators (DFIGs)] and model 2 [WECS having permanent magnet synchronous generators (PMSG)]. Both models are connected to AC grid through an efficient power electronic interface. Transient simulations are carried out under the condition of sudden short circuit disturbance and effect of increased generator inertia constant, friction factor and base speed is analysed. The power quality is also analysed in terms of total harmonic distortion (THD) for both models and steps are taken to improve the power quality by reducing THD.

Modeling and simulation of three phase multilevel inverter for grid connected photovoltaic systems

This paper presents a control for a three phase five-level neutral clamped inverter (NPC) for grid connected PV system. The maximum power point tracking (MPPT) is capable of extracting maximum power from the PV array connected to each DC link voltage level. The MPPT algorithm is solved by fuzzy logic controller. The fuzzy MPPT is integrated with the inverter so that a DC–DC converter is not needed and the output shows accurate and fast response. A digital PI current control algorithm is used to remain the current injected into the grid sinusoidal and to achieve high dynamic performance with low total harmonic distortion (THD). The validity of the system is verified through MATLAB/Simulink and the results are compared with three phase three-level grid connected NPC inverter in terms of THD.

Equal-Area Theorem Based Direct Digital Sinusoidal Pulse-Width Modulation Method for Multilevel Voltage Inverters

Focusing on the relative location of the centre of gravity of the pulse-width modulation waveform in each section, a novel direct digital sine pulse-width modulation (SPWM) method based on equal-area theorem for multilevel inverters is proposed in this paper. Three different direct digital SPWM schemes are illustrated and investigated thoroughly in terms of total harmonic distortion (THD) and amplitude of the fundamental-frequency voltage, and the best scheme with the lowest THD is identified. The THD and fundamental voltage produced with the proposed method with modulation index M varying from zero to its maximum value are calculated and compared with level-shifted carrier-based SPWM method. It is demonstrated that the proposed direct digital SPWM method can provide far lower THD, while its fundamental voltages are on par with the carrier-based SPWM method. Other advantages of the proposed modulation scheme include simplicity, digital oriented and generalised for multilevel inverter with any levels and any topologies, including cascaded H-bridge, neutral point clamped, flying-capacitor and any other types of inverters. Simulations and experiments are carried out. The experimental results agree well with simulations, which prove the validity of the proposed digital SPWM method.

A Two-Frequency Quasi Six-Phase Voltage Source Inverter Based on Space Vector PWM

With development of series multi-phase motor drives and harmonic injection technique to enhance torque for multi-phase motor drives, there is an immense need for multifrequency PWM voltage source inverters (VSI).The PWM techniques used in the previous works are either of ramp-comparison or of hysteresis type. The first suffer from implementation difficulties and the second has the high variable switching frequency drawback (difficulties of LC input EMI filter design). SVM possesses many advantages over the mentioned PWM techniques and it can be used in multiphase drive applications.One of the most popular multi-phase machines is quasi six-phase (QS) machine. The phasor diagram of a QS system and a two level six-phase VSI are depicted in Fig. 1. Despite the three-phase case the numbers of switching vectors are very high (refer to Fig. 2) and the removal of low-order harmonics in SVM six-phase systems is so complicated. In this paper, a two frequency QS SVM VSI is designed and implemented. The approach improves the performance of the system in terms of total harmonic distortion (THD) and DC-bus utilization. The resulted SVM VSI is used to generate two reference vectors for two series QS machines.Some analysis and discussions are given through the development of the SVM technique, computer simulation and practical results.

A novel pulse width modulation for grid-connected multilevel inverter

This paper presents a single-phase five-level grid-connected photovoltaic inverter with a novel dual reference modulation technique. Two reference signals identical to each other with an offset equivalent to the amplitude of the triangular carrier signal were used to generate pulse width modulation (PWM) signals. The inverter consists of a full-bridge inverter and an auxiliary circuit comprising of four diodes and a switch. The inverter produces output voltage in five levels: 0, +1/2Vdc, Vdc, −1/2Vdc, and −Vdc. A digital proportional-integral (PI) current control algorithm is implemented in DSP TMS320F2812 to keep the current injected into the grid sinusoidal and to have high dynamic performance with low total harmonic distortion (THD). The validity of the proposed inverter is verified through simulation and is implemented in a prototype. The experimental results are compared to conventional single-phase three-level grid-connected pulse width modulation (PWM) inverter in terms of THD.

HOPF BIFURCATION AS AN INTERMEDIATE-SCALE INSTABILITY IN SINGLE-STAGE POWER-FACTOR-CORRECTION POWER SUPPLIES: ANALYSIS, SIMULATIONS AND EXPERIMENTAL VERIFICATION

This paper reports intermediate-scale instability in a single-stage power-factor-correction (PFC) power supply that employs a cascade configuration of a boost stage operating in discontinuous conduction mode (DCM) and a forward stage operating in continuous conduction mode (CCM). The two stages combine into a single stage by sharing one main switch and one control loop to achieve input PFC and tight output regulation. The main results are given by "exact" cycle-by-cycle circuit simulations. The effect of the intermediate-scale instability on the attainable power factor is illustrated in terms of total harmonic distortion (THD) which is found by taking the Fast Fourier Transform (FFT) of the input current. The intermediate-scale instability usually manifests itself as local oscillations within a line cycle. Based on the stability analysis of a buck converter operating in CCM, the underlying mechanism of such instability can be attributed to the Hopf bifurcation that occurred in CCM forward stage. Finally, experimental results are presented for verification purposes.

Slow-Scale Instability of Single-Stage Power-Factor-Correction Power Supplies

This paper reports slow-scale instability in a single-stage power-factor-correction (PFC) power supply, which is a popular design solution for low power applications. The circuit employs a cascade configuration of a boost converter and a forward converter, which share an active switch and operate in discontinuous-conduction mode (DCM), to provide input PFC and tight output regulation. Main results are given by "exact" cycle-by-cycle circuit simulations. The effect of the slow-scale instability on the attainable power factor is illustrated in terms of total harmonic distortion which can be found by taking the fast Fourier transform of the input current. The slow-scale instability usually manifests itself as local oscillations within a line cycle. Based on the critical condition of DCM for the buck converter, the underlying mechanism of such instability is further investigated. It has been found that border collision is the underlying cause of the phenomenon. Moreover, it has been shown that the border collision observed here is effectively a nonsmooth Neimark-Sacker bifurcation. Finally, experimental results are presented for verification purposes.

Characterization of a 4$\,\times\,$4 Gb/s Parallel Electronic Bus to WDM Optical Link Silicon Photonic Translator

A 4times4 Gb/s microring modulator cascade, which can directly convert data from a parallel electrical bus to a multiple-wavelength optical signal in a single silicon-on-insulator waveguide, is demonstrated and characterized. The integrity of the modulated optical signal is verified using Q-factor extrapolations. In addition, the frequency characteristics and crosstalk, in terms of total harmonic distortion, are quantified. A transparent translator from electronics to optics such as this is crucial for the development of large-scale high-bandwidth interconnects based on photonic integrated circuits

Voltage control of current source inverters

The current source inverters may become direct competitors of the voltage source inverters thanks to the voltage control techniques. The paper proposes an improved voltage control technique for current source inverters, that chooses the current vectors relying on bang-bang controllers. This technique is compared to a well-established one using current space vector modulation and synchronous-frame proportional and integral controllers. The presented controller is explained and validated by means of off-line as well as real time simulations and experimental tests. The numerical results prove that the proposed control technique produces less distorted voltage waveforms in terms of total harmonic distortion and spectrum. According to the real-time simulations performed the proposed control technique is computationally less expensive than the benchmark. Finally, the experimental results obtained confirm the feasibility of the proposal.

06/00919 Identification and properties of the fundamental expansion functions for neutron transport in an infinite homogeneous medium: Milgram, M. S. Annals of Nuclear Energy, 2005, 32, (11), 1167–1190.

This study deals with a new nonlinear backstepping sliding mode control for Photovoltaic (PV) based grid interactive voltage source converter (VSC) system. The VSC dynamic design is incorporated with a low pass LCL filter prior to utility grid connectivity, which is expressed in terms of active (P1) and reactive (Q1) power. Low pass LCL filter is introduced as passive ac element and hence a reduced harmonic profile is obtained in terms of total harmonic distortion (THD). The aim of the work is to arbitrate between dynamic performance and filtering effect of the proposed PV-VSC system to provide better reliability with superior power quality. To design a robust control theory with grid uncertainty eradication capability, a new finite time backstepping sliding mode control (FTBFSMC) is proposed in this paper. The control method is implemented in terms of reactive power at PCC (Q1) and dc side converter voltage (Vpv), where the converter dynamics are being calculated directly from instantaneous values of converter current (Ii,abc) and bus voltage (V1,abc) to avoid PLL angle calculation at the beginning. A new small signal stability phenomenon is depicted by multivariable dynamic model of the proposed PV based grid converter system, where PV penetration as well as nonlinear control parameter optimization practices is considered. The performance of the proposed control is verified through various case studies in MATLAB/script environment, which are being extended to MATLAB/Simulink model as well as PSCAD/EMTDC platform for validation.

A new hardware-efficient digital sinusoidal oscillator with low- and uniform-frequency spacing

In this paper, a new low-frequency digital sinusoidal oscillator with uniform-frequency spacing is proposed, and its performance is evaluated. The proposed oscillator structure, P, requires a single, short word-length multiplier for its hardware implementation. For the same frequency range, the single multiplier utilized can be implemented using an 8-bit word length, assuming that the multipliers in the previously reported oscillators, such as the multiple-output direct form digital oscillator and its modified versions, are implemented using 16 bits. The saving in multiplier word length results in a reduction in the silicon area and power dissipation. The proposed oscillator structure utilizes a multiple-output direct form digital oscillator with a single, short word-length multiplier in addition to a very simple switching and sign changing operation. The proposed oscillator structure is capable of generating sinusoidal signals with a large number of samples per cycle. The phase of the generated sinusoids is continuous at the switching points, and the difference between any two adjacent generated frequencies is approximately constant. Simulation results are presented to verify the analysis and demonstrate the performance as measured in terms of total harmonic distortion. It is evident from the simulation results that the performance of the proposed oscillator is essentially the same as those of the previously reported oscillators with less hardware complexity.

A, multifrequency range digital sinusoidal oscillator with high resolution and uniform frequency spacing

In this work, a high-resolution and multifrequency range complex digital sinusoidal oscillator with uniform frequency spacing is proposed and its performance is evaluated. The proposed oscillator structure is capable of generating both the real and imaginary components of a complex exponential digital signal. The proposed oscillator utilizes two integrators with adjustable gains and two multipliers and can be implemented on already available digital signal processors. The frequency resolution of the proposed oscillator is shown to be adjustable and is superior to that of the direct-form digital oscillator. Simulation results are presented to verify the analysis and demonstrate the quality of the generated sinusoids measured in terms of total harmonic distortion.