Abstract

This paper presents a space vector pulse width modulation (SVPWM) control for a three-phase five-level diode clamped multilevel inverter (DCMLI) for photovoltaic (PV) systems. SVPWM algorithm uses a simple mapping to generate gate signals for the inverter. The location of the reference vector and time are easily determined. The maximum power point tracking (MPPT) is capable of extracting maximum power from PV array connected to each DC link voltage level. The MPPT algorithm is solved by fuzzy logic controller. A digital design of a generator SVPWM using hardware description language (VHDL) is proposed and implemented on a field programmable gate array (FPGA). This is done to achieve high dynamic performance with low total harmonic distortion (THD). Simulation and experimental results are given to verify the implemented SVPWM control in terms of THD. The results are compared with conventional sinusoidal pulse width modulation (SPWM) in terms of lower THD is obtained. Finally, the implementation on a FPGA is tested in a laboratory with a real prototype using a three-level three-phase voltage source inverter. Experimental results are presented to verify the effectiveness and accuracy of the proposed system. This scheme can be easily extended to an n-level inverter for PV system.

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