FPGA based multilevel cascaded inverters with SVPWM algorithm for photovoltaic system

Abstract

This paper presents the control for three-phase multilevel cascaded H-bridge inverter for photovoltaic (PV) system. The maximum power point tracking (MPPT) is capable of extracting maximum power from the PV array connected to each DC link voltage level. The MPPT algorithm is solved by perturbation and observation method (P&O). Space vector pulse width modulation (SVPWM) algorithm uses a simple mapping to generate gate signals for the inverter. The location of the reference vector and time are easily determined. The adjustments of modulation index and phase angles are synthesized onto field programmable gate array (FPGA) by means of hardware description language (VHDL). A digital design of the generator SVPWM using VHDL is proposed and implemented on FPGA. This is done to achieve high dynamic performance with low total harmonic distortion (THD). Simulation and experimental results are given to verify the implemented SVPWM control for PV system in terms of THD.