Synthesis Of Circuits Research Articles

Quantum Computer-Aided Design Automation

Quantum computing is an essential issue for taking advantage of quantum properties in real-world applications. Realizing quantum computing with a corresponding quantum circuit is a critical step. This study introduces the AngelQ system, which provides quantum computing-as-a-service (QCaaS) for the cloud. The AngelQ system integrates quantum design automation (QDA) to achieve quantum and reversible circuit synthesis by a quantum-inspired optimization (QiO) technique and has visualization software interfaces to verify the QiO process and the correctness of the synthesized quantum and reversible circuits. First, the proposed novel QiO method has four significant features: Adaptive strategy, quantum-Not gate, update mechanism by Global solutions, and Entanglement Local search, named Angel QiO. which is a flexible technique to realize various circuits under different gate libraries with a few alterations. Angel QiO can construct diversified function-equivalent circuits to assess the circuit composition and boost the development of circuit synthesis. Second, researchers can observe the QiO algorithm process and inspect the intermediate result formula through AngelQ system’s visualization interface to further adjust the parameters and improve the performance. Moreover, it benefits beginners’ learning and adds convenience to education. In summary, the AngelQ system can extend and facilitate the future design and automation of quantum computing.

A Study on the VLSI Implementation of Fingerprint Thinning Processors Using Hybrid GDI Technique

Although the gate-diffusion input (GDI) technique supports low power and small area compared to conventional CMOS standard cell, it is limited to design larger integrated circuits for several reasons. It is difficult to apply the general RTL design flow of building a GDI standard cell library and designing a chip through logic circuit synthesis. In this paper, we proposed the hybrid GDI technique with new structure. We analyzed the problems of the GDI technique, and the analysis extracted the circuit characteristics of previous CMOS and GDI cells and found the cause of the problems. We proposed the synthesis algorithm for the hybrid GDI design. The performance of hybrid GDI was compared and analyzed using synthesized thinning image processor on 1.8 V, 180n CMOS process. The proposed hybrid GDI technique proved that it could be applied to system-on-a-chip (SoC) design with low power and small cell area.

Automatic synthesis of light-processing functions for programmable photonics: theory and realization

Linear light-processing functions (e.g., routing, splitting, filtering) are key functions requiring configuration to implement on a programmable photonic integrated circuit (PPIC). In recirculating waveguide meshes (which include loop-backs), this is usually done manually. Some previous results describe explorations to perform this task automatically, but their efficiency or applicability is still limited. In this paper, we propose an efficient method that can automatically realize configurations for many light-processing functions on a square-mesh PPIC. At its heart is an automatic differentiation subroutine built upon analytical expressions of scattering matrices that enables gradient descent optimization for functional circuit synthesis. Similar to the state-of-the-art synthesis techniques, our method can realize configurations for a wide range of light-processing functions, and multiple functions on the same PPIC simultaneously. However, we do not need to separate the functions spatially into different subdomains of the mesh, and the resulting optimum can have multiple functions using the same part of the mesh. Furthermore, compared to nongradient- or numerical differentiation-based methods, our proposed approach achieves 3× time reduction in computational cost.

Автоматизированный синтез многополосовых согласующих устройств

When solving a number of technical problems, it often becomes necessary to create devices that operate in multiple operating frequency bands. This leads to the problem of designing multiband filters, which is solved quite simply with a purely active internal resistance of the signal source and load. In the case when the internal resistance of the signal source and load are complex, Along with this, there is also the problem of coordination. This leads to the need to solve the problem synthesis of broadband multiband circuits connecting complex internal resistance signal source and load. In this paper, the use of methods for constructing a good initial approximations that make it possible to obtain the structure of the eigenfunctions of the device of an adequately problem with subsequent optimization on a computer, allows the synthesis of broadband multiband matching circuits in a lumped element basis for arbitrary admittances signal source and load.

Исследование характеристик литий-ионной аккумуляторной батареи

Purpose: To conduct research on obtaining data, that ties lithium-ion battery voltage to perturbing effects of current flow, to synthesize accumulator equivalent circuit, to obtain algorithm for calculating element parameters for accumulator equivalent circuit on experimental data basis with subsequent check of the model adequacy. Methods: Prognosing battery work that doesn’t correspond to real one at accumulator equivalent circuit synthesis. Equivalent-circuit models of cells plays a battery state though they do not possess all characteristics of physical model. Results: Algorithm for lithium-ion battery equivalent circuit synthesis has been considered, physical experiment on finding accumulator equivalent circuit parameters was conducted, mathematical model on the research results has been compiled and its adequacy has been confirmed. Practical significance: The pursued study made it possible to work out algorithm for calculating parameters to form the algorithm of lithium-ion battery functional diagnosis.

Series-parallel mechanical circuit synthesis of a positive-real third-order admittance using at most six passive elements for inerter-based control

This paper investigates the circuit synthesis problem for a certain positive-real bicubic (third-order) admittance with a simple pole at the origin (s=0) to be realizable as a one-port series-parallel damper-spring-inerter circuit consisting of at most six elements, where the results can be directly applied to the design and physical realization of inerter-based control systems. Necessary and sufficient conditions for such a specific bicubic admittance to be realizable by a one-port passive series-parallel mechanical circuit containing at most six elements are derived, and a group of mechanical circuit configurations covering the whole set of realizability conditions are presented together with element value expressions. The conditions and element value expressions are related to the admittance coefficients and the roots of certain algebraic equations. The circuit synthesis results of this paper are illustrated by several numerical examples including the control system design of a train suspension system. Any realization circuit in this paper contains much fewer passive elements than the ten-element realization circuit by the well-known Bott-Duffin circuit synthesis approach. The investigations of this paper can contribute to the theory of circuit synthesis and many other related fields.

Properties Investigation of Self-Dual Combinational Devices with Calculation Control Based on Hamming Codes

A new approach to the synthesis of self-checking devices is considered, based on the control of calculations in testing objects using Hamming codes, the check bits of which are described by self-dual functions. In this case, the structure operates in a pulsed mode, which is actually based on the introduction of temporal redundancy when building a self-checking device. This, unfortunately, leads to some decrease in performance, however, it significantly improves the characteristics of controllability, which is especially important for devices and systems of critical use, the input data for which does not change so often. A brief review of methods for constructing built-in control circuits based on the self-duality property of calculated functions is given. The basic structures of the organization of built-in control circuits are given. The proposed ways of developing the theory of synthesis of built-in control circuits are based on checking whether or not the calculated functions belong to a class of self-dual Boolean functions. All possible values of the number of data bits for Hamming codes have been established. They will have the property of the self-duality of functions describing control bits. En-coders of such Hamming codes will be self-dual devices. Since the functions of the check bits of Hamming codes are linear, in order for them to be self-dual, it is necessary that an odd number of arguments be used in each of them. It is proved that the number of bits of code words of Hamming codes with self-dual check functions is equal to n=3+4l, l∈N0. The results of the simulations self-dual devices with built-in control circuits along two diagnostic parameters in the Multisim environment are presented. A method is proposed for modification of the structure of calculation control along two diagnostic parameters, which allows to use any linear block code (not necessarily Hamming code). It is based on retrofitting the encoder with a device for converting functions into self-dual ones. In fact, this is a code modification device. It is proved that to obtain a modified Hamming code with self-dual control functions for n≠3+4l, l∈N0; cases, it is enough to add modulo M=2 the non-self-dual control function with the function of the high data bit.

Towards Unique Circuit Synthesis of Power Transformer Winding Using Gradient and Population Based Methods

The aim of the paper is to synthesize a nearly unique, physically realizable and mutually coupled ladder circuit representation of a two-winding transformer by identifying the most accurate and reliable optimization technique such that prior knowledge in selecting the initial guess and search space is avoided. To this end, magnitude and phase of the driving-point impedance function are captured by performing sweep frequency response analysis (SFRA). Then, two widely used population-based algorithms namely, particle swarm optimization (PSO) and artificial bee colony (ABC) and one gradient-based sequential quadratic programming (SQP) algorithm are implemented. Two case studies are considered namely, i) 15 MVA, 66/11.55 kV transformer and, ii) 111 kVA, 7.33/1.22 kV transformer. The performance of the aforementioned algorithms is compared using three evaluation parameters namely, repeatability, accuracy and reliability

Logical Minimization of Multilevel Representations of Boolean Function Systems

A decisive influence on complexity and speed of a combinational logic circuit of library CMOS elements is exerted by the preliminary stage of technologically independent optimization of the implemented system of Boolean functions. At present, the main methods of such optimization in the logical synthesis of custom CMOS VLSI blocks are methods for minimizing binary decision diagrams — Binary Decision Diagrams (BDD) or their modifications. Graphical representations of BDD are built on the basis of the Shannon expansions of Boolean functions. A BDD graph corresponds to a set of interrelated Shannon expansion formulas that form a multilevel representation of the minimized system of Boolean functions. The efficiency of applying various optimization procedures of minimization for several types of BDD representations of systems of Boolean functions is investigated in the paper. 7hese procedures are used as a technologically independent optimization in the synthesis of multi-output logic circuits of library CMOS elements. In addition to single logical optimization procedures, sequences of such procedures are studied that form various methods of logical optimization of multilevel representations of systems of Boolean functions. The results of experiments on 49 examples of systems of Boolean functions are presented. 25 optimization routes have been studied, efficient routes have been determined for various types of specifications of function systems. The obtained experimental results are compared with the known ones. It has been established that to estimate the complexity of optimized algebraic representations of systems of functions, it is advisable to use such a criterion as the total number of literals (variables or their inversions) of Boolean variables.

LEAP: Scaling Numerical Optimization Based Synthesis Using an Incremental Approach

While showing great promise, circuit synthesis techniques that combine numerical optimization with search over circuit structures face scalability challenges due to a large number of parameters, exponential search spaces, and complex objective functions. The LEAP algorithm improves scaling across these dimensions using iterative circuit synthesis, incremental reoptimization, dimensionality reduction, and improved numerical optimization. LEAP draws on the design of the optimal synthesis algorithm QSearch by extending it with an incremental approach to determine constant prefix solutions for a circuit. By narrowing the search space, LEAP improves scalability from four to six qubit circuits. LEAP was evaluated with known quantum circuits such as QFT and physical simulation circuits like the VQE, TFIM, and QITE. LEAP can compile four qubit unitaries up to 59× faster than QSearch and five and six qubit unitaries with up to 1.2× fewer CNOTs compared to the QFAST package. LEAP can reduce the CNOT count by up to 36×, or 7× on average, compared to the CQC Tket compiler. Despite its heuristics, LEAP has generated optimal circuits for many test cases with a priori known solutions. The techniques introduced by LEAP are applicable to other numerical optimization based synthesis approaches.

Design and Simulation of an Autonomous Molecular Mechanism Using Spatially Localized DNA Computation.

As a well-established technique, DNA synthesis offers interesting possibilities for designing multifunctional nanodevices. The micro-processing system of modern semiconductor circuits is dependent on strategies organized on silicon chips to achieve the speedy transmission of substances or information. Similarly, spatially localized structures allow for fixed DNA molecules in close proximity to each other during the synthesis of molecular circuits, thus providing a different strategy that of opening up a remarkable new area of inquiry for researchers. Herein, the Visual DSD (DNA strand displacement) modeling language was used to design and analyze the spatially organized DNA reaction network. The execution rules depend on the hybridization reaction caused by directional complementary nucleotide sequences. A series of DNA strand displacement calculations were organized on the locally coded travel track, and autonomous movement and addressing operations are gradually realized. The DNA nanodevice operates in this manner follows the embedded "molecular program", which improves the reusability and scalability of the same sequence domain in different contexts. Through the communication between various building blocks, the DNA device-carrying the target molecule moves in a controlled manner along the programmed track. In this way, a variety of molecular functional group transport and specific partition storage can be realized. The simulation results of the visual DSD tool provide qualitative and quantitative proof for the operation of the system.

Dynamical behaviors, circuit design, and synchronization of a novel symmetric chaotic system with coexisting attractors

In this paper, we introduce a novel three-dimension chaotic system with strange characteristic by applying construction of a 3D chaotic circuit method. Multiple equilibria and abundant coexisting attractors exist in this system. A mathematical model is developed and detailed stability analyses for equilibrium points are executed with obtaining significant results of the period-doubling bifurcation patterns confirmed by phase plane plots and Lyapunov exponent spectra. By varying the initial value and unique controlled parameter, the double-scroll chaotic attractor is broken up into a pair of symmetric singular attractors. Then, the local basins of attraction are investigated concerning the initial condition. Next, the circuit synthesis results generated by Multisim simulation tool validate the self-excitation characteristics of this system. Finally, the feedback control technique is used to study difference synchronization of this system. Main conclusions prove the validity and reliability of difference synchronization.

A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling

Device sizing is a challenging problem for analog circuit design. Traditional methods depend on domain knowledge and intensive simulations to search for feasible parameters. Recent studies apply the Bayesian optimization (BO) and a Gaussian process (GP) model in analog circuit synthesis to improve efficiency. The BO framework automatically selects the parameter candidates by inferring the surrogate GP model. However, naive BO employs a sequential updating strategy which is inefficient in a multicore environment. Besides, the widely used GP model requires costly high fidelity data, which are obtained from fine simulations. In this article, we propose a constrained batch BO approach with a multifidelity (MF) model to solve the above difficulties. The batch BO exploits parallel computing and selects promising parameters by multiple acquisition function ensemble. In addition, the MF GP model adapts the low fidelity data obtained from coarse simulations. Specifically, the proposed method incorporates information gain in a weighted clustering algorithm to refine the parameter candidates. As a result, the proposed method maintains the candidates’ quality and diversity, which speeds up the optimization convergence. In the experiments, we demonstrate the efficiency of the proposed approach on three real-world circuits. The results show that our approach reduces the simulation costs by at least 54.6% compared to the state-of-the-art baselines.

Context-Aware Technology Mapping in Genetic Design Automation.

Genetic design automation (GDA) tools hold promise to speed-up circuit design in synthetic biology. Their widespread adoption is hampered by their limited predictive power, resulting in frequent deviations between the in silico and in vivo performance of a genetic circuit. Context effects, i.e., the change in overall circuit functioning, due to the intracellular environment of the host and due to cross-talk among circuits components are believed to be a major source for the aforementioned deviations. Incorporating these effects in computational models of GDA tools is challenging but is expected to boost their predictive power and hence their deployment. Using fine-grained thermodynamic models of promoter activity, we show in this work how to account for two major components of cellular context effects: (i) crosstalk due to limited specificity of used regulators and (ii) titration of circuit regulators to off-target binding sites on the host genome. We show how we can compensate the incurred increase in computational complexity through dedicated branch-and-bound techniques during the technology mapping process. Using the synthesis of several combinational logic circuits based on Cello's device library as a case study, we analyze the effect of different intensities and distributions of crosstalk on circuit performance and on the usability of a given device library.

Modified Hamming Codes in Computing Devices Technical Diagnostic Systems

Previously unknown error detection characteristics by types and multiplicities in modified Hamming codes code words are established. The rules for constructing this modification of Hamming codes are described. Detailed characteristic tables of codes with data vectors lengths m = 4...16 are given. The considered code's error detection properties brief analysis is given. The results obtained in the study can be effectively used in the digital computing devices with controllable structures synthesis, as well as in the self-checking concurrent error-detection (CED) circuit synthesis using the Boolean complement method. The modified Hamming codes key property is the impossibility of 100 % double error detection in all code word bits when any single and double errors that occur only in data bits are detected. That is why it is recommended, when synthesizing a CED circuit using the Boolean complement method, to convert only those functions that describe the operating functions of the diagnostic object that will form the modified Hamming code control bits, and to separate the converted and non-convertible outputs into two groups of independent outputs. The experiment results with test combinational circuits presented in the article confirm the effectiveness of their use in the CED circuit synthesis by the Boolean complement method.

A Modular Circuit Synthesis Oriented Modelling Approach for Non-Isolated DC-DC Converters in CCM

The continued commissioning of DC microgrids in an effort to achieve net-zero carbon levels in the atmosphere demands the large-scale deployment of converters to make the power from renewable energy sources, such as solar PV, usable. To control these inherently non-linear converters using classical linear control methods, averaged modelling techniques are employed. These methods are laborious and easily become intractable when applied to converters with increased energy storage elements. A modular modelling approach is proposed. This approach is based on the synthesis of converters using refined basic building blocks. The refined basic building blocks are independently modelled as two-port networks and used in a circuit synthesis-oriented manner to derive power stage models of commonly used DC-DC converters. It is found that most of the converters considered in the study can be described as a cascade combination of these basic building blocks. As such, transmission parameters are mainly used to model the two-port networks. Moreover, it is also found that using this modelling technique enables the computation of generalized expressions for all power stage models of interest. The use of two-port networks curtails the size of the matrices describing the basic building blocks to 2 × 2, and thus simplifies the entire modelling procedure. Additionally, two-port network analysis makes this modelling technique modular, thus making it more suited to be employed in DC microgrids. The independence of the two-port models on the circuit topology and functionality makes it possible to even model new converters containing the described basic building blocks solely based on circuit connection.

Comprehensive Mapping of Continuous/Switching Circuits in CCM and DCM to Machine Learning Domain Using Homogeneous Graph Neural Networks

This paper proposes a method of transferring physical continuous and switching/converter circuits working in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) to graph representation, independent of the connection or the number of circuit components, so that machine learning (ML) algorithms and applications can be easily applied. Such methodology is generalized and is applicable to circuits with any number of switches, components, sources and loads, and can be useful in applications such as artificial intelligence (AI) based circuit design automation, layout optimization, circuit synthesis and performance monitoring and control. The proposed circuit representation and feature extraction methodology is applied to seven types of continuous circuits, ranging from second to fourth order and it is also applied to three of the most common converters (Buck, Boost, and Buck-boost) operating in CCM or DCM. A classifier ML task can easily differentiate between circuit types as well as their mode of operation, showing classification accuracy of 97.37% in continuous circuits and 100% in switching circuits.

SYNTHESIS AND IMPLEMENTATION OF A POLYNOMIAL NOTCH FILTER ACCORDING TO AN RF PROTOTYPE

The use of modern methods of synthesis of electrical circuits makes it possible to create circuits with frequency characteristics of any complexity that do not require restructuring. However, when solving the problem of creating tunable filters, additional requirements arise for the filter and tuning technologies, especially if we are talking about creating systems in the frequency region bordering between frequencies, where implementation in the form of systems with lumped and distributed parameters is inconvenient in both cases. This article is devoted to the synthesis of a stop filter under such conditions. The goal of synthesizing tunable filters is to obtain either a constant absolute or constant relative bandwidth. The first requirement is typical for radio receiving devices, where it is necessary to ensure the minimum permissible bandwidth during tuning, the second – for radio transmitting devices, where minimum losses in the passband and a constant harmonic filtering coefficient are required. A modified method for the synthesis of rejection filters according to operating parameters is described, the synthesis of a specific filter and technological solutions for its implementation, the choice of a method for its electronic restructuring is described.

THE NUMBER OF THE SHORTEST CUTS OF THE GRAPH

In many modern areas of automatic design, problems in the synthesis and analysis of stable electronic circuits arise, which can be geometrically presented by directed or undirected graphs, in which the number of the shortest paths between the given vertices plays a significant role. The article investigates the problem of finding the number of shortest paths connecting vertices s and t of the graph G. For this graph, the concepts of vertex and edge (s, t)-cuts are defined and among these cuts simple cuts are highlighted. The concepts of graphs (s, t)-critical with respect to vertices and (s, t)-critical with respect to edges are also defined. Statements are given based on the known rules in combinatorial analysis sum and product and their generalizations, by which we can find the number of the shortest (s, t)-chains of the graph G through the given vertex (s, t)-cut or the given edge (s, t)-cut. The paper considers, in particular, the graph of a square grid of the size n × m, which is (s, t)-critical with respect to both vertices and edges, where s and t are the opposite vertices of this grid. For such a grid we have described all possible vertex (s, t)-cuts, which are simple. The edge (s, t)-cuts of this grid are also described, which are determined by the shortest paths of the dual graph, which is also a square grid of size (n+1) × (m+1). From the considered cuts for the number of combinations ((n+m)¦n) equal to ((n+m)!)/n!m! we get ((n+m+2)!)/((n+1)!(m+1)!) + n + m – 3 combinatorial identities. The above statements can also be applied to study the number of shortest paths in multigraphs – graphs containing parallel edges. Based on the canonical decomposition of a natural number a into prime factors, an optimal multigraph is shown in which the number of the shortest (s, t)-paths is equal to a given number a.

An Approach to Solve Some Unsolved Limitations: Rough Set Theory

Rough set theory is a mathematical approach to dealing with uncertainty and vagueness in data. It was introduced as a way to approximate classical sets using lower and upper bounds. Rough set theory has been applied to various domains such as data mining, knowledge discovery, machine learning, soft computing, medical analysis, synthesis of switching circuits, and civil engineering. Rough set theory can handle imprecise and noisy data by finding structural relationships and dependencies among attributes. It can also reduce redundant and irrelevant attributes and generate decision rules from data. Rough set theory is closely related to fuzzy set theory, but differs in that it uses multiple memberships instead of partial memberships to model uncertainty. Lot of research works have taken place in this domain with many fruitful outcomes that helped lot in expanding this field to much wider reach of knowledge irrespective of the domain concerned to mathematical and technological application development. In lieu of such research-oriented progress in different versatile domain, many areas of research has remained untouched as many a problem remained unsolved being shrouded under the mystery. This paper deals mainly with some of the still unsolved questions on Rough Set that are under study for new discovery and a way to overcome such limitations citing proper techniques, examples, working models, and graphs.