A Study on the VLSI Implementation of Fingerprint Thinning Processors Using Hybrid GDI Technique

Abstract

Although the gate-diffusion input (GDI) technique supports low power and small area compared to conventional CMOS standard cell, it is limited to design larger integrated circuits for several reasons. It is difficult to apply the general RTL design flow of building a GDI standard cell library and designing a chip through logic circuit synthesis. In this paper, we proposed the hybrid GDI technique with new structure. We analyzed the problems of the GDI technique, and the analysis extracted the circuit characteristics of previous CMOS and GDI cells and found the cause of the problems. We proposed the synthesis algorithm for the hybrid GDI design. The performance of hybrid GDI was compared and analyzed using synthesized thinning image processor on 1.8 V, 180n CMOS process. The proposed hybrid GDI technique proved that it could be applied to system-on-a-chip (SoC) design with low power and small cell area.