To balance the instantaneous power difference between the pulsed output power and the constant input power of the pulse load power supply (PLPS), an active capacitor converter (ACC), which can compensate the pulsed current, is connected in parallel with the output of the dc-dc converter in the PLPS. In this paper, based on the Fourier decomposition results of the load current, it is evident that square waves have significant harmonic content. Hence, to provide the lower impedance at the frequencies of the high content harmonics in the load current, a virtual impedance that consisted of the multiple quasi-notch-filters (MQNF) is proposed to be in parallel at the port of the ACC for the suppression of output voltage drop and input current ripple. The virtual parallel impedance is implemented by the output voltage feedforward control (FFC) of the ACC. The design considerations of the virtual parallel impedance are presented to ensure the stability of the PLPS. Finally, a synchronous rectifier buck (SR-buck) converter with a bidirectional buck/boost converter is tested at the pulse repetition frequency (PRF) of 100-300 Hz and the pulse duty cycle of 0.15 to verify the validity of the proposed control scheme.