A Line Cycle Synchronous Rectification Strategy Based on Time-Domain Analysis for Single- Stage AC–DC LLC Converters

Abstract

Synchronous rectification that is being widely used in high power and current DC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> resonant converters to reduce conduction losses can be challenging in single-stage AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters with high output voltage levels (i.e., >200 V) where synchronous rectifier (SR) driving ICs cannot be used. In this paper, a simple AC line cycle synchronous rectification strategy with direct control by a cost-effective microcontroller unit (MCU) is proposed for single-stage AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converters with high switching frequencies using wide bandgap devices (i.e., GaN or SiC). The SR gate pulse is generated based on the time-domain calculated conduction time, which is then switched <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> over the AC line cycle to avoid reverse power flow in light load conditions. The proposed strategy reduces the complexity of implementation over any adaptive online calculation or model-based methods that require powerful and expensive MCUs. First, the operation is briefly described followed by the time-domain analysis for AC operation. Next, the calculation and methodology behind the proposed AC line cycle SR driving strategy are discussed in detail. A scaled-down wide bandgap-based AC-DC <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter prototype with a 250--400 V output voltage range is used with digital control implementation to validate the performance of the proposed synchronous rectification strategy. It is found that maximum efficiency of 98.1% can be achieved which is improved by around 0.5% over the conventional fixed conduction time method. Moreover, it is shown that the proposed method obtains the same efficiency levels as more complex adaptive SR driving approaches.