Synaptic Weight Update Research Articles

Highly Linear and Symmetric Synaptic Memtransistors Based on Polarization Switching in Two-Dimensional Ferroelectric Semiconductors.

Brain-inspired neuromorphic computing hardware based on artificial synapses offers efficient solutions to perform computational tasks. However, the nonlinearity and asymmetry of synaptic weight updates in reported artificial synapses have impeded achieving high accuracy in neural networks. Here, this work develops a synaptic memtransistor based on polarization switching in a two-dimensional (2D) ferroelectric semiconductor (FES) of α-In2 Se3 for neuromorphic computing. The α-In2 Se3 memtransistor exhibits outstanding synaptic characteristics, including near-ideal linearity and symmetry and a large number of programmable conductance states, by taking the advantages of both memtransistor configuration and electrically configurable polarization states in the FES channel. As a result, the α-In2 Se3 memtransistor-type synapse reaches high accuracy of 97.76% for digit patterns recognition task in simulated artificial neural networks. This work opens new opportunities for using multiterminal FES memtransistors in advanced neuromorphic electronics.

Flexible Active Crossbar Arrays Using Amorphous Oxide Semiconductor Technology toward Artificial Neural Networks Hardware

AbstractMemristor crossbar arrays can compose the efficient hardware for artificial intelligent applications. However, the requirements for a linear and symmetric synaptic weight update and low cycle‐to‐cycle (C2C) and device‐to‐device variability as well as the sneak‐path current issue have been delaying its further development. This study reports on a thin‐film amorphous oxide‐based 4×4 1‐transistor 1‐memristor (1T1M) crossbar. The a‐IGZO crossbar is built on a flexible polyimide substrate, enabling IoT and wearable applications. In the novel framework, the thin‐film transistor and memristor are fabricated at the same level, with the same processing steps and sharing the same materials for all layers. The 1T1M cells show linear and symmetrical plasticity characteristic with low C2C variability. The memristor performs like an analog dot product engine and vector–matrix multiplications in the 4×4 crossbars is demonstrated experimentally, in which the sneak‐path current issue is successfully suppressed, resulting in a proof‐of‐concept for a cost‐effective, flexible artificial neural networks hardware.

Neuromorphic-computing-based adaptive learning using ion dynamics in flexible energy storage devices.

High-accuracy neuromorphic devices with adaptive weight adjustment are crucial for high-performance computing. However, limited studies have been conducted on achieving selective and linear synaptic weight updates without changing electrical pulses. Herein, we propose high-accuracy and self-adaptive artificial synapses based on tunable and flexible MXene energy storage devices. These synapses can be adjusted adaptively depending on the stored weight value to mitigate time and energy loss resulting from recalculation. The resistance can be used to effectively regulate the accumulation and dissipation of ions in single devices, without changing the external pulse stimulation or preprogramming, to ensure selective and linear synaptic weight updates. The feasibility of the proposed neural network based on the synapses of flexible energy devices was investigated through training and machine learning. The results indicated that the device achieved a recognition accuracy of ∼95% for various neural network calculation tasks such as numeric classification.

Dendritic spine morphology regulates calcium-dependent synaptic weight change.

Dendritic spines act as biochemical computational units and must adapt their responses according to their activation history. Calcium influx acts as the first signaling step during postsynaptic activation and is a determinant of synaptic weight change. Dendritic spines also come in a variety of sizes and shapes. To probe the relationship between calcium dynamics and spine morphology, we used a stochastic reaction-diffusion model of calcium dynamics in idealized and realistic geometries. We show that despite the stochastic nature of the various calcium channels, receptors, and pumps, spine size and shape can modulate calcium dynamics and subsequently synaptic weight updates in a deterministic manner. Through a series of exhaustive simulations and analyses, we found that the calcium dynamics and synaptic weight change depend on the volume-to-surface area of the spine. The relationships between calcium dynamics and spine morphology identified in idealized geometries also hold in realistic geometries, suggesting that there are geometrically determined deterministic relationships that may modulate synaptic weight change.

High‐Performance Neuromorphic Computing Based on Ferroelectric Synapses with Excellent Conductance Linearity and Symmetry

AbstractArtificial synapses can boost neuromorphic computing to overcome the inherent limitations of von Neumann architecture. As a promising memristor candidate, ferroelectric tunnel junctions (FTJ) enable the authors to successfully emulate spike‐timing‐dependent synapses. However, the nonlinear and asymmetric synaptic weight update under repeated presynaptic stimulation hampers neuromorphic computing by favoring the runaway of synaptic weights during learning. Here, the authors demonstrate an FTJ whose conductivity varies linearly and symmetrically by judiciously combining ferroelectric domain switching and oxygen vacancy migration. The artificial neural network based on this FTJ‐synapse achieves classification accuracy of 96.7% during supervised learning, which is the closest to the maximum theoretical value of 98% achieved to date. This artificial synapse also demonstrates stable unsupervised learning in a noisy environment for its well‐balanced spike‐timing‐dependent plasticity response. The novel concept of controlling ionic migration in ferroelectric materials paves the way toward highly reliable and reproducible supervised and unsupervised learning strategies.

HfOx /AlOy Superlattice-Like Memristive Synapse.

The adjustable conductance of a two‐terminal memristor in a crossbar array can facilitate vector‐matrix multiplication in one step, making the memristor a promising synapse for efficiently implementing neuromorphic computing. To achieve controllable and gradual switching of multi‐level conductance, important for neuromorphic computing, a theoretical design of a superlattice‐like (SLL) structure switching layer for the multi‐level memristor is proposed and validated, refining the growth of conductive filaments (CFs) and preventing CFs from the abrupt formation and rupture. Ti/(HfOx/AlOy)SLL/TiN memristors are shown with transmission electron microscopy , X‐ray photoelectron spectroscopy , and ab initio calculation findings corroborate the SLL structure of HfOx/AlOy film. The optimized SLL memristor achieves outstanding conductance modulation performance with linearly synaptic weight update (nonlinear factor α = 1.06), and the convolutional neural network based on the SLL memristive synapse improves the handwritten digit recognition accuracy to 94.95%. Meanwhile, this improved synaptic device has a fast operating speed (30 ns), a long data retention time (≥ 104 s at 85 ℃), scalability, and CMOS process compatibility. Finally, its physical nature is explored and the CF evolution process is characterized using nudged elastic band calculations and the conduction mechanism fitting. In this work, as an example the HfOx/AlOy SLL memristor provides a design viewpoint and optimization strategy for neuromorphic computing.

Multiwavelength Optoelectronic Synapse with 2D Materials for Mixed-Color Pattern Recognition.

Neuromorphic visual systems emulating biological retina functionalities have enormous potential for in-sensor computing, with prospects of making artificial intelligence ubiquitous. Conventionally, visual information is captured by an image sensor, stored by memory units, and eventually processed by the machine learning algorithm. Here, we present an optoelectronic synapse device with multifunctional integration of all the processes required for real time object identification. Ultraviolet-visible wavelength-sensitive MoS2 FET channel with infrared sensitive PtTe2/Si gate electrode enables the device to sense, store, and process optical data for a wide range of the electromagnetic spectrum, while maintaining a low dark current. The device exhibits optical stimulation-controlled short-term and long-term potentiation, electrically driven long-term depression, synaptic weight update for multiple wavelengths of light ranging from 300 nm in ultraviolet to 2 μm in infrared. An artificial neural network developed using the extracted weight update parameters of the device can be trained to identify both single wavelength and mixed wavelength patterns. This work demonstrates a device that could potentially be used for realizing a multiwavelength neuromorphic visual system for pattern recognition and object identification.

Spontaneous dynamics of synaptic weights in stochastic models with pair-based spike-timing-dependent plasticity.

We investigate spike-timing dependent plasticity (STPD) in the case of a synapse connecting two neuronal cells. We develop a theoretical analysis of several STDP rules using Markovian theory. In this context there are two different timescales, fast neuronal activity and slower synaptic weight updates. Exploiting this timescale separation, we derive the long-time limits of a single synaptic weight subject to STDP. We show that the pairing model of presynaptic and postsynaptic spikes controls the synaptic weight dynamics for small external input on an excitatory synapse. This result implies in particular that mean-field analysis of plasticity may miss some important properties of STDP. Anti-Hebbian STDP favors the emergence of a stable synaptic weight. In the case of an inhibitory synapse the pairing schemes matter less, and we observe convergence of the synaptic weight to a nonnull value only for Hebbian STDP. We extensively study different asymptotic regimes for STDP rules, raising interesting questions for future work on adaptative neuronal networks and, more generally, on adaptative systems.

Interface state-dependent synaptic characteristics of Pt/CeO2/Pt memristors controlled by post-deposition annealing

Artificial synapses with analog resistance changes have been actively investigated since they are essential elements in brain-inspired neuromorphic systems. In this study, interface state-dependent artificial synaptic characteristics of analog, linear, and symmetric synaptic weight update are demonstrated in Pt/CeO2/Pt memristors controlled by post-deposition annealing of CeO2 layer. The devices with optimized annealing temperature, i.e., 400 and 500 °C-annealed devices, show reliable and analog-type resistance decrease upon applying positive voltage, and vice versa upon applying negative voltage. The resistance change emulates wide-range, linear, and symmetric potentiation and depression behaviors, as being tunable by the number of pulses and its amplitude. It also exhibits short-term and long-term plasticity with respect to pulse conditions. The conduction modes are fitted well with Schottky conduction controlled by interface energy barrier. In addition, negligible resistance changes are observed in reference device with SiO2 interfacial layers inserted at top and bottom Pt/CeO2 interfaces, i.e., Pt/SiO2/CeO2/SiO2/Pt device, supporting that the resistance change is associated with tunable Pt/CeO2 interface states. It is concluded that the resistance change is induced by voltage-driven tuning of Pt/CeO2 interface states, and the control of these interfaces is crucial for reliable synaptic operations.

Unsupervised Learning in Winner-Takes-All Neural Network Based on 3D NAND Flash

Experimental demonstration of unsupervised learning is realized with charge-trapping 3D NAND flash device array. The charge-trapping characteristic of the memory cell is leveraged so that the devices perform not only as non-volatile memory but also synaptic cells in hardware neural network. Experiments reveal that the 3D NAND flash devices hold good potential for neuromorphic computing because of its delicately modulated synaptic weight. Furthermore, differential pair scheme is employed to enable larger dynamic range and finer weight tunability as compared with previous works. And based on the 3D NAND array, unsupervised learning is implemented by experiments with a winner-takes-all neural network, which can achieve perfect clustering of stylized letters within tens of training epochs. Beyond that, the 3D NAND devices also exhibit highly robust reliability against various disturb during synaptic weight update. The excellent synaptic device performance and reliability altogether make solid foundation for the winner-takes-all update rule in unsupervised learning neural network.

A Reconfigurable Two‐WSe2‐Transistor Synaptic Cell for Reinforcement Learning

Reward-modulated spike-timing-dependent plasticity (R-STDP) is a brain-inspired reinforcement learning (RL) rule, exhibiting potential for decision-making tasks and artificial general intelligence. However, the hardware implementation of the reward-modulation process in R-STDP usually requires complicated Si complementary metal-oxide-semiconductor (CMOS) circuit design that causes high power consumption and large footprint. Here, a design with two synaptic transistors (2T) connected in a parallel structure is experimentally demonstrated. The 2T unit based on WSe2 ferroelectric transistors exhibits reconfigurable polarity behavior, where one channel can be tuned as n-type and the other as p-type due to nonvolatile ferroelectric polarization. In this way, opposite synaptic weight update behaviors with multilevel (>6 bit) conductance states, ultralow nonlinearity (0.56/-1.23), and large Gmax /Gmin ratio of 30 are realized. By applying positive/negative reward to (anti-)STDP component of 2T cell, R-STDP learning rules are realized for training the spiking neural network and demonstrated to solve the classical cart-pole problem, exhibiting a way for realizing low-power (32 pJ per forward process) and highly area-efficient (100 µm2 ) hardware chip for reinforcement learning.

MoS2 Synapses with Ultra-low Variability and Their Implementation in Boolean Logic.

Brain-inspired computing enabled by memristors has gained prominence over the years due to the nanoscale footprint and reduced complexity for implementing synapses and neurons. The demonstration of complex neuromorphic circuits using conventional materials systems has been limited by high cycle-to-cycle and device-to-device variability. Two-dimensional (2D) materials have been used to realize transparent, flexible, ultra-thin memristive synapses for neuromorphic computing, but with limited knowledge on the statistical variation of devices. In this work, we demonstrate ultra-low-variability synapses using chemical vapor deposited 2D MoS2 as the switching medium with Ti/Au electrodes. These devices, fabricated using a transfer-free process, exhibit ultra-low variability in SET voltage, RESET power distribution, and synaptic weight update characteristics. This ultra-low variability is enabled by the interface rendered by a Ti/Au top contact on Si-rich MoS2 layers of mixed orientation, corroborated by transmission electron microscopy (TEM), electron energy loss spectroscopy (EELS), and X-ray photoelectron spectroscopy (XPS). TEM images further confirm the stability of the device stack even after subjecting the device to 100 SET-RESET cycles. Additionally, we implement logic gates by monolithic integration of MoS2 synapses with MoS2 leaky integrate-and-fire neurons to show the viability of these devices for non-von Neumann computing.

Four-Terminal Ferroelectric Schottky Barrier Field Effect Transistors as Artificial Synapses for Neuromorphic Applications

In this paper, artificial synapses based on four terminal ferroelectric Schottky barrier field effect transistors (FE-SBFETs) are experimentally demonstrated. The ferroelectric polarization switching dynamics gradually modulate the Schottky barriers, thus programming the device conductance by applying negative or postive pulses to imitate the excitation and inhibition behaviors of the biological synapse. The excitatory post-synaptic current can be modulated by the back-gate bias, enabling the reconfiguration of the weight profile with high speed of 20 ns and low energy (< 1 fJ/spike) consumption. Besides, the tunable long term potentiation and depression show high endurance and very small cycle-to-cycle variations. Based on the good linearity, high symmetricity and large dynamic range of the synaptic weight updates, a high recognition accuracy (92.6%) is achieved for handwritten digits by multilayer perceptron artificial neural networks. These findings demonstrate FE-SBFET has high potential as an ideal synaptic component for the future intelligent neuromorphic network.

Design of Synaptic Neuronal Circuit Based on Memristors

To solve the problems of poor learning efficiency and low accuracy caused by the single fixed synaptic weight in the traditional artificial neural network. On the foundation of the improved memristor model, this paper designs a synaptic neuronal circuit based on the natural memory characteristics of the memristor. This synapse is composed of six memristors. The resistance of the memristor is changed by adding a periodic square wave to update the synaptic weight. This circuit can realize signed synaptic weighting, which has certain linear characteristics. Finally, two synaptic weight update methods are proposed based on this circuit, and the validity of the design is verified through Spice simulation experiments.

Impact of the Ferroelectric Stack Lamination in Si Doped Hafnium Oxide (HSO) and Hafnium Zirconium Oxide (HZO) Based FeFETs: Toward High-Density Multi-Level Cell and Synaptic Storage

A multi-level cell (MLC) operation as a 1–3 bit/cell of the FeFET emerging memory is reported by utilizing optimized Si doped hafnium oxide (HSO) and hafnium zirconium oxide (HZO) based on ferroelectric laminates. An alumina interlayer was used to achieve the thickness independent of the HSO and HZO-based stack with optimal ferroelectric properties. Various split thicknesses of the HSO and HZO were explored with lamination to increase the FeFET maximum memory window (MW) for a practical MLC operation. A higher MW occurred as the ferroelectric stack thickness increased with lamination. The maximum MW (3.5 V) was obtained for the HZO-based laminate; the FeFETs demonstrated a switching speed (300 ns), 10 years MLC retention, and 104 MLC endurance. The transition from instant switching to increased MLC levels was realized by ferroelectric lamination. This indicated an increased film granularity and a reduced variability through the interruption of ferroelectric columnar grains. The 2–3 bit/cell MLC levels and maximum MW were studied in terms of the size-dependent variability to indicate the impact of the ferroelectric area scaling. The impact of an alumina interlayer on the ferroelectric phase is outlined for HSO in comparison to the HZO material. For the same ferroelectric stack thickness with lamination, a lower maximum MW, and a pronounced wakeup effect was observed in HSO laminate compared to the HZO laminate. Both wakeup effect and charge trapping were studied in the context of an MLC operation. The merits of ferroelectric stack lamination are considered for an optimal FeFET-based synaptic device operation. The impact of the pulsing scheme was studied to modulate the FeFET current to mimic the synaptic weight update in long-term synaptic potentiation/depression.

Low‐Voltage Electrochemical LixWO3 Synapses with Temporal Dynamics for Spiking Neural Networks

Neuromorphic computing has the great potential to enable faster and more energy‐efficient computing by overcoming the von Neumann bottleneck. However, most emerging nonvolatile memory (NVM)‐based artificial synapses suffer from insufficient precision, nonlinear synaptic weight update, high write voltage, and high switching latency. Moreover, the spatiotemporal dynamics, an important temporal component for cognitive computing in spiking neural networks (SNNs), are hard to generate with existing complementary metal–oxide–semiconductor (CMOS) devices or emerging NVM. Herein, a three‐terminal, LixWO3‐based electrochemical synapse (LiWES) is developed with low programming voltage (0.2 V), fast programming speed (500 ns), and high precision (1024 states) that is ideal for artificial neural networks applications. Time‐dependent synaptic functions such as paired‐pulse facilitation (PPF) and temporal filtering that are critical for SNNs are also demonstrated. In addition, by leveraging the spike‐encoded timing information extracted from the short‐term plasticity (STP) behavior in the LiWES, an SNNs model is built to benchmark the pattern classification performance of the LiWES, and the result indicates a large boost in classification performance (up to 128×), compared with those NO‐STP synapses.

Learning Without Feedback: Fixed Random Learning Signals Allow for Feedforward Training of Deep Neural Networks.

While the backpropagation of error algorithm enables deep neural network training, it implies (i) bidirectional synaptic weight transport and (ii) update locking until the forward and backward passes are completed. Not only do these constraints preclude biological plausibility, but they also hinder the development of low-cost adaptive smart sensors at the edge, as they severely constrain memory accesses and entail buffering overhead. In this work, we show that the one-hot-encoded labels provided in supervised classification problems, denoted as targets, can be viewed as a proxy for the error sign. Therefore, their fixed random projections enable a layerwise feedforward training of the hidden layers, thus solving the weight transport and update locking problems while relaxing the computational and memory requirements. Based on these observations, we propose the direct random target projection (DRTP) algorithm and demonstrate that it provides a tradeoff between accuracy and computational cost that is suitable for adaptive edge computing devices.

A Comparison Study on Multilayered Barrier Oxide Structure in Charge Trap Flash for Synaptic Operation

A synaptic device that contains weight information between two neurons is one of the essential components in a neuromorphic system, which needs highly linear and symmetric characteristics of weight update. In this study, a charge trap flash (CTF) memory device with a multilayered high-κ barrier oxide structure on the MoS2 channel is proposed. The fabricated device was oxide-engineered on the barrier oxide layers to achieve improved synaptic functions. A comparison study between two fabricated devices with different barrier oxide materials (Al2O3 and SiO2) suggests that a high-κ barrier oxide structure improves the synaptic operations by demonstrating the increased on/off ratio and symmetry of synaptic weight updates due to a better coupling ratio. Lastly, the fabricated device has demonstrated reliable potentiation and depression behaviors and spike-timing-dependent plasticity (STDP) for use in a spiking neural network (SNN) neuromorphic system.

Run-off election-based decision method for the training and inference process in an artificial neural network

Generally, the decision rule for classifying unstructured data in an artificial neural network system depends on the sequence results of an activation function determined by vector–matrix multiplication between the input bias signal and the analog synaptic weight quantity of each node in a matrix array. Although a sequence-based decision rule can efficiently extract a common feature in a large data set in a short time, it can occasionally fail to classify similar species because it does not intrinsically consider other quantitative configurations of the activation function that affect the synaptic weight update. In this work, we implemented a simple run-off election-based decision rule via an additional filter evaluation to mitigate the confusion from proximity of output activation functions, enabling the improved training and inference performance of artificial neural network system. Using the filter evaluation selected via the difference among common features of classified images, the recognition accuracy achieved for three types of shoe image data sets reached ~ 82.03%, outperforming the maximum accuracy of ~ 79.23% obtained via the sequence-based decision rule in a fully connected single layer network. This training algorithm with an independent filter can precisely supply the output class in the decision step of the fully connected network.

Characteristics of sequential activity in networks with temporally asymmetric Hebbian learning

Sequential activity has been observed in multiple neuronal circuits across species, neural structures, and behaviors. It has been hypothesized that sequences could arise from learning processes. However, it is still unclear whether biologically plausible synaptic plasticity rules can organize neuronal activity to form sequences whose statistics match experimental observations. Here, we investigate temporally asymmetric Hebbian rules in sparsely connected recurrent rate networks and develop a theory of the transient sequential activity observed after learning. These rules transform a sequence of random input patterns into synaptic weight updates. After learning, recalled sequential activity is reflected in the transient correlation of network activity with each of the stored input patterns. Using mean-field theory, we derive a low-dimensional description of the network dynamics and compute the storage capacity of these networks. Multiple temporal characteristics of the recalled sequential activity are consistent with experimental observations. We find that the degree of sparseness of the recalled sequences can be controlled by nonlinearities in the learning rule. Furthermore, sequences maintain robust decoding, but display highly labile dynamics, when synaptic connectivity is continuously modified due to noise or storage of other patterns, similar to recent observations in hippocampus and parietal cortex. Finally, we demonstrate that our results also hold in recurrent networks of spiking neurons with separate excitatory and inhibitory populations.