Synaptic Arrays Research Articles

A Dual Magnetic Tunnel Junction‐Based Neuromorphic Device

With the advent of artificial intelligence (AI) in computational devices technology, various synaptic array architectures are proposed for neuromorphic computing applications. Among them, the non‐volatile memory (NVM) architectures are very promising for their small cell size, ultra‐low energy consumption, and capability for large parallel data processing through 3D configurations capable of multilevel signal processing. Herein, the viability of such magnetic tunnel junction (MTJ)‐based synaptic devices via fabrication and characterization of multi‐junction spintronic devices is demonstrated, with the experimental results supported through micromagnetic simulations.

Binary Memristive Synapse Based Vector Neural Network Architecture and Its Application

The vector neural network (VNN) based on memristor has tremendous potential in applications such as electronic reconnaissance, medical diagnosis, and speech processing. However, the VNNs that encompass a huge amount of multiply-accumulate (MAC) operations often acquire network weights through massive numerical calculations with high precision, which results in a heavy consumption of energy and computing resource. Nevertheless, the resistance states of existing memristive devices can hardly meet the high-precision regulation requirements that restricts the application of VNN. We propose a binary memristor based vector-type back propagation (BMVTBP) architecture that integrates the advantages of low-precision memristive devices and VNN. The core function of this architecture is to realize the low-precision weights of three states by employing binarized memristive synapses, and further construct the positive and negative synaptic arrays to implement the MAC operations of interval data. Simulations verify the identification performance of the BMVTBP architecture on the emitter library. The ensuing results demonstrate that the identification rates exceed 96% and 87% for the interval-value and scalar-value noisy emitter samples, respectively, with an architecture requirement of only 1920 memristive devices and an energy consumption of about 2.43e-10 J.

Perovskite/Organic Semiconductor-Based Photonic Synaptic Transistor for Artificial Visual System.

Artificial visual system with information sensing, processing, and memory function is promoting the development of artificial intelligence techniques. Photonic synapse as an essential component can enhance the visual information processing efficiency owing to the high propagation speed, low latency, and large bandwidth. Herein, photonic synaptic transistors based on organic semiconductor poly[2,5-(2-octyldodecyl)-3,6-diketopyrrolopyrrole-alt-5,5-(2,5-di(thien-2-yl)thieno [3,2-b]thiophene)] (DPPDTT) and perovskite CsPbBr3 quantum dots are fabricated by a simple solution process. The device can simulate fundamental synaptic behaviors, including excitatory postsynaptic current, pair-pulse facilitation, the transition of short-term memory to long-term memory, and "learning experience" behavior. Combining the advantages of the high photosensitivity of perovskites and relatively high conductivity of DPPDTT, the device can exhibit excellent synaptic performances at a low voltage of -0.2 V. Even under an ultralow operation voltage of -0.0005 V, the device can still show obvious synaptic responses. Tunable synaptic integration behaviors including "AND" and "OR" light logic functions can be realized. An artificial visual system is successfully emulated by illuminating the synaptic arrays employing light of different densities. Therefore, low-voltage synaptic devices based on organic semiconductor and CsPbBr3 quantum dots with a simple fabrication technique present high potential to mimic human visual memory.

Investigation of Read Disturb and Bipolar Read Scheme on Multilevel RRAM-Based Deep Learning Inference Engine

The multilevel resistive random access memory (RRAM)-based synaptic array can enable parallel computations of vector–matrix multiplication for machine learning inference acceleration; however, any conductance drift of the cell may induce an inference accuracy drop because the analog current is summed up along the column. In this article, the read disturb-induced conductance drift characteristic is statistically measured on a test vehicle based on 2-bit HfO2 RRAM array. The drift behavior of four states is empirically modeled by a vertical and lateral filament growth mechanism. Furthermore, a bipolar read scheme is proposed and tested to enhance the resilience against the read disturb. The modeled read disturb and proposed compensation scheme are incorporated into a VGG-like convolutional neural network for CIFAR-10 data set inference.

Leaky integrate-and-fire neurons based on perovskite memristor for spiking neural networks

Artificial neuron is an important part of constructing neuromorphic network in which information can be computed with high parallelism and efficiency like in the human brain. However, owing to the poor biological plausibility, artificial neurons based on traditional complementary metal-oxide-semiconductor (CMOS) platform fail to reveal the rich ion dynamics of the biological counterparts. Organic–inorganic halide perovskites (OHPs) are prospective for imitating the ion dynamics on the membranes of biological neurons because of its intrinsic ion migration. Herein, a diffusive CH 3 NH 3 PbI 3 (MAPbI 3 )-based memristor with superior amplitude-frequency characteristics and highly linear conductivity modulation for more than 1000 states have been fabricated for the construction of a leaky integrate-and-fire (LIF) bio-inspired neuron. The as-designed LIF model can successfully emulate the leakage, spatiotemporal integration and firing functions in a biological neuron. Moreover, by connecting LIF neurons with a 2*2 non-volatile Al 2 O 3 -based synaptic array, a simple spiking neural network (SNN) which is called the 3rd generation of neural network has been implemented at the hardware level to study the cognitive performance of the network. The SNN exhibits outstanding selective sensitivity to particular input sequence, indicating the excellent adaptability and versatility of the network for future applications of neuromorphic computing by utilizing novel ionotropic device. Herein, for the first time, a diffusive CH 3 NH 3 PbI 3 (MAPbI 3 )-based memristor with superior amplitude-frequency characteristics and highly linear conductivity modulation for more than 1000 states have been fabricated for the construction of a leaky integrate-and-fire (LIF) bio-inspired neuron. The as-designed LIF model can successfully emulate the leakage, spatiotemporal integration and firing functions in a biological neuron, indicating the great potential for neuromorphic computing. Furthermore, by connecting LIF neurons with a 2*2 non-volatile Al 2 O 3 -based synaptic array, a simple spiking neural network has been implemented at the hardware level to study the cognitive performance of the network. • The conductance states of MAPbI 3 -based memristor can be modulated linearly and consecutively for more than 1000 states. • The memristor exhibits superior amplitude-frequency response characteristics which may be also suitable for filter. • A leaky integrate-and-fire artificial neuron is implemented, and the leakage, spatiotemporal integration and firing functions are emulated successfully. • By combining the artificial neuron with an synaptic array, a simple spiking neural network has been implemented.

Reconfigurable Logic‐in‐Memory and Multilingual Artificial Synapses Based on 2D Heterostructures

AbstractNonvolatile logic devices have attracted intensive research attentions recently for energy efficiency computing, where data computing and storage can be realized in the same device structure. Various approaches have been adopted to build such devices; however, the functionality and versatility are still very limited. Here, 2D van der Waals heterostructures based on direct bandgap materials black phosphorus and rhenium disulfide for the nonvolatile ternary logic operations is demonstrated for the first time with the ultrathin oxide layer from the black phosphorus serving as the charge trapping as well as band‐to‐band tunneling layer. Furthermore, an artificial electronic synapse based on this heterostructure is demonstrated to mimic trilingual synaptic response by changing the input base voltage. Besides, artificial neural network simulation based on the electronic synaptic arrays using the handwritten digits data sets demonstrates a high recognition accuracy of 91.3%. This work provides a path toward realizing multifunctional nonvolatile logic‐in‐memory applications based on novel 2D heterostructures.

Parallel weight update protocol for a carbon nanotube synaptic transistor array for accelerating neuromorphic computing.

Brain-inspired neuromorphic computing has the potential to overcome the inherent inefficiency of the conventional von Neumann architecture by using the massively parallel processing power of artificial neural networks. Neuromorphic parallel processing can be implemented naturally using the crossbar geometry of synaptic device arrays with Ohm's and Kirchhoff's laws. However, selective and parallel weight updates of the synaptic crossbar array are still very challenging due to the unavoidable crosstalk between adjacent devices and sneak path currents. Here, we experimentally demonstrate a weight update protocol in a carbon nanotube synaptic transistor array, where selective and parallel weight updates can be executed by exploiting the individually controllable three terminals of the synaptic device via a localized carrier trapping mechanism. The trained 9 × 8 synaptic array solves four different convolution operations simultaneously for the feature extraction of an image. The massive parallelism and robustness of the weight update protocol are important features toward effective manipulation of big data through neuromorphic computing systems.

Zinc Tin Oxide Synaptic Device for Neuromorphic Engineering

Neuromorphic computing offers parallel data processing and low energy consumption and can be useful to replace conventional von Neumann computing. Memristors are two-terminal devices with varying conductance that can be used as synaptic arrays in hardware-based neuromorphic devices. In this research, we extensively investigate the analog symmetric multi-level switching characteristics of zinc tin oxide (ZTO)-based memristor devices for neuromorphic systems. A ZTO semiconductor layer is introduced between a complementary metal-oxide-semiconductor (CMOS) compatible Ni top electrode and a highly doped poly-Si bottom electrode. A variety of bio-realistic synaptic features are demonstrated, including long-term potentiation (LTP), long-term depression (LTD), and spike timing-dependent plasticity (STDP). The Ni/ZTO/Si device in which the adjustment of the number of states in conductance is realized by applying different pulse schemes is highly suitable for hardware-based neuromorphic applications. We evaluate the pattern recognition accuracy by implementing a system-level neural network simulation with ZTO-based memristor synapses. The density of states (DOS) and charge density plots reveal that oxygen vacancies in ZTO assist in generating resistive switching in the Ni/ZTO/Si device. The proposed ZTO-based memristor composed of metal-insulator-semiconductor (MIS) structure is expected to contribute to future neuromorphic applications through further studies.

Memristive synapses with high reproducibility for flexible neuromorphic networks based on biological nanocomposites.

Memristive synapses from biomaterials are promising for building flexible and implantable artificial neuromorphic systems due to their remarkable mechanical and biological properties. However, these biological devices have relatively poor memristive switching characteristics, and thus fail to meet the requirement of neuromorphic networks for high learning accuracy. Here, memristive synapses based on carrageenan nanocomposites that possess desirable characteristics are demonstrated. These devices show highly reproducible analog resistive switching behaviors with 250 conductance states, low write noise, good write linearity, high retention of more than 104 s and endurance for at least 106 pulses. The enhanced switching properties are attributed to controllable and confined conductive filament growth, owing to the synergistic effect of self-assembled silver nanocluster doping and nanocone-shaped electrode contact. Moreover, the devices exhibit excellent reliability after 1000 bending cycles. Simulations including the non-ideal factors prove that the synaptic device array can operate with an online learning accuracy of 94.3%. These findings enable broader applications of biomaterials in flexible memristive devices and neuromorphic systems.

The coexistence of threshold and memory switching characteristics of ALD HfO2 memristor synaptic arrays for energy-efficient neuromorphic computing

The development of bioinspired electronic devices that can mimic the biological synapses is an essential step towards the development of efficient neuromorphic systems to simulate the functions of the human brain. Among various materials that can be utilized to attain electronic synapses, the existing semiconductor industry-compatible conventional materials are more favorable due to their low cost, easy fabrication and reliable switching properties. In this work, atomic layer deposited HfO2-based memristor synaptic arrays are fabricated. The coexistence of threshold switching (TS) and memory switching (MS) behaviors is obtained by modulating the device current. The TS characteristics are exploited to emulate essential synaptic functions. The Ag diffusive dynamics of our electronic synapses, analogous to the Ca2+ dynamics in biological synapses, is utilized to emulate synaptic functions. Electronic synapses successfully emulate paired-pulse facilitation (PPF), post-tetanic potentiation (PTP), spike-timing-dependent plasticity (STDP), short-term potentiation (STP), long-term potentiation (LTP) and transition from STP to LTP with rehearsals. The psychological memorization model of short-term memory (STM) to long-term memory (LTM) transition is mimicked by image memorization in crossbar array devices. Reliable and repeatable bipolar MS behaviors with a low operating voltage are obtained by a higher compliance current for energy-efficient nonvolatile memory applications.

Gate-Tunable Synaptic Dynamics of Ferroelectric-Coupled Carbon-Nanotube Transistors.

Artificial neural networks (ANNs) based on synaptic devices, which can simultaneously perform processing and storage of data, have superior computing performance compared to conventional von Neumann architectures. Here, we present a ferroelectric coupled artificial synaptic device with reliable weight update and storage properties for ANNs. The artificial synaptic device, which is based on a ferroelectric polymer capacitively coupled with an oxide dielectric via an electric-field-permeable, semiconducting single-walled carbon-nanotube channel, is successfully fabricated by inkjet printing. By controlling the ferroelectric polarization, synaptic dynamics, such as excitatory and inhibitory postsynaptic currents and long-term potentiation/depression characteristics, is successfully implemented in the artificial synaptic device. Furthermore, the constructed ANN, which is designed in consideration of the device-to-device variation within the synaptic array, efficiently executes the tasks of learning and recognition of the Modified National Institute of Standards and Technology numerical patterns.

Unsupervised Learning by Spike-Timing- Dependent Plasticity in a Mainstream NOR Flash Memory Array—Part II: Array Learning

In this article, we show that, by exploiting the program and erase conditions identified in Part I of this article, operating a mainstream NOR Flash memory array as an artificial synaptic array learning in an unsupervised manner according to the spike-timing-dependent plasticity (STDP) rule can be easily achieved. To this aim, first, a word-line and a bitline voltage scheme allowing cells to change their memory state and, in turn, their synaptic weight to mimic the STDP learning rule is presented. Then, a simple spiking neural network making use of the NOR Flash array as a synaptic array is discussed along with its basic operating waveforms. Finally, the proof of concept for unsupervised learning in the array of a signal pattern provided at the network inputs is given.

Unsupervised Learning by Spike-Timing-Dependent Plasticity in a Mainstream NOR Flash Memory Array—Part I: Cell Operation

This article and its part II demonstrate the possibility to operate a mainstream NOR Flash memory array as an artificial synaptic array learning without external supervision according to the spike-timing-dependent plasticity (STDP) rule. As a first mandatory step to this aim, suitable array working conditions allowing not only selective cell programming but also selective cell erase are here identified, overcoming the block erase operation typical of any Flash memory technology. The proposed array working conditions exploit channel hot-electron injection and hot-hole injection at the drain side to achieve selective, bidirectional, and virtually analog tuning of cell threshold voltage, with no need for changes in the design of a common-ground double-polysilicon NOR array. In part II, the new working scheme will be shown to allow for a straightforward implementation of STDP and unsupervised learning in the array.

Polysilicon-Based Synaptic Transistor and Array Structure for Short/Long-Term Memory.

In this paper, we proposed and fabricated a polysilicon-based four-terminal synaptic transistor. The device has an asymmetric dual-gate structure. The top gate, which uses a thin SiO₂ layer as the gate dielectric, is the input terminal of the synaptic transistor, which receives spikes from pre-synaptic neurons. Meanwhile, a nitride trapping layer was inserted between the channel and the bottom gate to serve as a non-volatile memory. The bottom gate is the node that receives the post-neuron feedback signals and adjusts the synaptic weight. With this double-gate structure, the proposed artificial synapse can perform short-/long-term memory operations. In addition to the basic unit cell characteristics, a highly integrated synapse array structure is also proposed. In our array structure, the top gate is tied in the word-line direction to accept the input signal. Drain contacts are also tied in the same direction. With regard to bit-line direction, the source terminals are tied to carry post-synaptic signals and the bottom gate line receives feedback signals from the post-synaptic neurons.

Unsupervised online learning of temporal information in spiking neural network using thin-film transistor-type NOR flash memory devices

Brain-inspired analog neuromorphic systems based on the synaptic arrays have attracted large attention due to low-power computing. Spike-timing-dependent plasticity (STDP) algorithm is considered as one of the appropriate neuro-inspired techniques to be applied for on-chip learning. The aim of this study is to investigate the methodology of unsupervised STDP based learning in temporal encoding systems. The system-level simulation was performed based on the measurement results of thin-film transistor-type asymmetric floating-gate NOR flash memory. With proposed learning methods, 91.53% of recognition accuracy is obtained in inferencing MNIST standard dataset with 200 output neurons. Moreover, temporal encoding rules showed that the number of input pulses and the computing power can be compressed without significant loss of recognition accuracy compared to the conventional rate encoding scheme. In addition, temporal computing in a multi-layer network is suitable for learning data sequences, suggesting the possibility of applying to real-world tasks such as classifying direction of moving objects.

Physically Transient Memristive Synapse With Short-Term Plasticity Based on Magnesium Oxide

In this letter, fully transient artificial synapses based on magnesium oxide memristors with short-term plasticity (STP) were proposed for the first time. Typical physiological reactions related to STP including pair-pulse facilitation and pair-pulse depression were demonstrated in such a transient synaptic device. Importantly, water-assisted transfer printing method was employed to transfer the dissolvable synaptic arrays onto bioresorbable poly (vinyl alcohol) substrate to form a fully transient system, which finally disintegrated in deionized water within 30 min. This transient synaptic emulator possesses great potential in security neuromorphic computing and environmentally resorbable applications.

Photonic In-Memory Computing Primitive for Spiking Neural Networks Using Phase-Change Materials

Spiking Neural Networks (SNNs) offer an event-driven and more biologically realistic alternative to standard Artificial Neural Networks based on analog information processing. This can potentially enable energy-efficient hardware implementations of neuromorphic systems which emulate the functional units of the brain, namely, neurons and synapses. Recent demonstrations of ultra-fast photonic computing devices based on phase-change materials (PCMs) show promise of addressing limitations of electrically driven neuromorphic systems. However, scaling these standalone computing devices to a parallel in-memory computing primitive is a challenge. In this work, we utilize the optical properties of the PCM, Ge\textsubscript{2}Sb\textsubscript{2}Te\textsubscript{5} (GST), to propose a Photonic Spiking Neural Network computing primitive, comprising of a non-volatile synaptic array integrated seamlessly with previously explored `integrate-and-fire' neurons. The proposed design realizes an `in-memory' computing platform that leverages the inherent parallelism of wavelength-division-multiplexing (WDM). We show that the proposed computing platform can be used to emulate a SNN inferencing engine for image classification tasks. The proposed design not only bridges the gap between isolated computing devices and parallel large-scale implementation, but also paves the way for ultra-fast computing and localized on-chip learning.

Evaluation of Radiation Effects in RRAM-Based Neuromorphic Computing System for Inference

Neuromorphic computing systems built with resistive random access memory (RRAM) are attractive solutions for implementing deep learning on-chip. In this paper, the single event and cumulative radiation damage susceptibility of a 1-transistor-1-resistor synaptic array architecture is investigated for the inference stage of a neuromorphic system. A physics-based SPICE RRAM model is developed to simulate the analog switching behavior of HfO x -based RRAM devices. SPICE simulations using the RRAM model are performed to capture the effects of transient heavy-ion strikes and experimental results obtained on GeSe-based RRAM devices are used to model the effects of cumulative radiation dose. Error patterns are fed into the software simulation of a multilayer perceptron, a representative artificial neural network for MNIST handwritten digit recognition. Radiation effects on the inference accuracy are analyzed. The results of the analysis indicate that the RRAM-based neuromorphic computing system is highly resistant to transient single-event effects due to the low cross section. The system is also shown to be tolerant to multi-Mrad levels of total ionizing and displacement damage dose.

Synaptic Reorganization Response in the Cochlear Nucleus Following Intense Noise Exposure

The cochlear nucleus, located in the brainstem, receives its afferent auditory input exclusively from the auditory nerve fibers of the ipsilateral cochlea. Noise-induced neurodegenerative changes occurring in the auditory nerve stimulate a cascade of neuroplastic changes in the cochlear nucleus resulting in major changes in synaptic structure and function. To identify some of the key molecular mechanisms mediating this synaptic reorganization, we unilaterally exposed rats to a high-intensity noise that caused significant hearing loss and then measured the resulting changes in a synaptic plasticity gene array targeting neurogenesis and synaptic reorganization. We compared the gene expression patterns in the dorsal cochlear nucleus (DCN) and ventral cochlear nucleus (VCN) on the noise-exposed side versus the unexposed side using a PCR gene array at 2 d (early) and 28 d (late) post-exposure. We discovered a number of differentially expressed genes, particularly those related to synaptogenesis and regeneration. Significant gene expression changes occurred more frequently in the VCN than the DCN and more changes were seen at 28 d versus 2 d post-exposure. We confirmed the PCR findings by in situ hybridization for Brain-derived neurotrophic factor (Bdnf), Homer-1, as well as the glutamate NMDA receptor Grin1, all involved in neurogenesis and plasticity. These results suggest that Bdnf, Homer-1 and Grin1 play important roles in synaptic remodeling and homeostasis in the cochlear nucleus following severe noise-induced afferent degeneration.

A self-rectifying TaOy/nanoporous TaOx memristor synaptic array for learning and energy-efficient neuromorphic systems

The human brain intrinsically operates with a large number of synapses, more than 1015. Therefore, one of the most critical requirements for constructing artificial neural networks (ANNs) is to achieve extremely dense synaptic array devices, for which the crossbar architecture containing an artificial synaptic node at each cross is indispensable. However, crossbar arrays suffer from the undesired leakage of signals through neighboring cells, which is a major challenge for implementing ANNs. In this work, we show that this challenge can be overcome by using Pt/TaOy/nanoporous (NP) TaOx/Ta memristor synapses because of their self-rectifying behavior, which is capable of suppressing unwanted leakage pathways. Moreover, our synaptic device exhibits high non-linearity (up to 104), low synapse coupling (S.C, up to 4.00 × 10−5), acceptable endurance (5000 cycles at 85 °C), sweeping (1000 sweeps), retention stability and acceptable cell uniformity. We also demonstrated essential synaptic functions, such as long-term potentiation (LTP), long-term depression (LTD), and spiking-timing-dependent plasticity (STDP), and simulated the recognition accuracy depending on the S.C for MNIST handwritten digit images. Based on the average S.C (1.60 × 10−4) in the fabricated crossbar array, we confirmed that our memristive synapse was able to achieve an 89.08% recognition accuracy after only 15 training epochs.