Supply Voltage Research Articles

Carbon Nanofibrous Aerogels Derived from Electrospun Polyimide for Multifunctional Piezoresistive Sensors.

The fabrication of carbon aerogels with ultralow density, high electrical conductivity, and ultraelasticity still remains substantial challenges. This study utilizes electrospun polyimide aerogel as the source to fabricate flexible carbon nanofibrous aerogel (PI-CNA) capable of multifunctional applications. The lightweight PI-CNA based piezoresistive sensor shows a wide linear range (0-217 kPa), rapid response/recovery time, and fatigue resistance (12,000 cycles). More importantly, the superior pressure sensing enables the PI-CNA for all-range healthcare sensing, including pulse monitoring, physiological activity detection, speech recognition, and gait recognition. Moreover, the EMI SE and the A coefficient of the PI-CNA reach 45 dB and 0.62, respectively, indicating the outstanding absorption dominated EMI shielding effects due to the multiple reflections and absorption. Furthermore, PI-CNA exhibits satisfying Joule heating performance up to 120 °C with rapid response time (10-30 s) under low supply voltages (1.5-5 V) and possesses sufficient heating reliability and repeatability in long-term repeated heating/cooling cycles. The fabricated PI-CNA shows significant potential applications in wearable technologies, energy conversion, electronic skin, and artificial intelligence.

Configurable in-memory computing architecture based on dual-port SRAM

In the emerging field of in-memory computing (IMC), this study proposes a dual-port static random access memory (SRAM) IMC architecture with the distinct capability of realizing XOR encryption (XORE), thus serving as a potential solution for the Von Neumann bottleneck. Beyond providing traditional SRAM read and write operations, the proposed architecture carries out additional tasks such as multi-bit multiply and accumulate (MAC) and XOR accumulation (XORA). The architecture was simulated using a 28-nm Complementary Metal Oxide Semiconductor Process, demonstrating a minor standard deviation of 9.41 mV in bit line voltage at the SS process corner, as evidenced by Monte Carlo simulation. Energy expenditure for the MAC, XORA, and XORE, was found to be 1.65, 1.46, and 9.02 fJ/ops respectively at the TT process corner. Furthermore, the presented architecture showed considerable energy efficiency, with MAC, XORA, and XORE operations achieving energy efficiency values of 604.9, 682.7, and 110.8 TOPS/W respectively, at a supply voltage of 0.9 V at the TT process corner.

Time Domain and Area Efficient Smart Temperature Sensor Exploiting Channel Length Modulation Coefficient

This work suggests an all-digital temperature sensor with a high sampling rate that is based on a time-to-digital converter (TDC). Two on-chip voltage-controlled oscillators (VCOs) are used in the design of the sensor core, which senses temperatures between [Formula: see text]C and 200[Formula: see text]C. For digital code conversion, the outputs of the VCO are fed into two asynchronous counters. In both low- and high- resolution modes, the error following two-point calibration is observed between [Formula: see text]C and [Formula: see text]C. The sensor’s ability to function in both high- and low-resolution modes based on conversion time is an important feature. At a sampling frequency of 0.19[Formula: see text]MHz, the maximum resolution achieved is 0.18[Formula: see text]C. Additionally, the sensor has control logic built in to turn off the sensing as soon as the conversion is complete. At 90-nm process, 1.1[Formula: see text]V supply voltage and 27[Formula: see text]C, the proposed sensor occupies [Formula: see text] and consumes [Formula: see text].

First- and second-order phase transitions in electronic excitable units and neural dynamics under global inhibitory feedback

The diverse roles of inhibition in neural circuits and other dynamical networks are receiving renewed interest. Here, it is shown that increasing global inhibitory feedback leads to gradual rounding of first-order transition between dynamical phases, turning it into second-order transition. The effect is initially observed in an electronic model consisting of a bi-dimensional array of neon glow lamps, where global inhibition can be simply introduced through a resistor in series with the supply voltage. The experimental findings are confirmed using both an extended numerical model and a mean-field approximation, then replicated across different models of neural dynamics, namely, the Wilson–Cowan model and a network of leaky integrate-and-fire neurons. Across all these systems, a critical point is always found as a function of a pair of parameters controlling local excitability and global inhibition strength, and a general explanation revealing the roles of the shape of the activation function and voltage fluctuations versus the extinction time-scale is provided. It is speculated that the brain could use global inhibition as a versatile means of shifting between first- and second-order dynamics, addressing the conundrum regarding the coexistence in neural dynamics of phenomena stemming from both. Some reflections regarding the comparison with other physical systems and the possible physiological significance are offered, and a hypothetical setup for an optogenetics experiment on cultured neurons is put forward.

Design of low power high-speed full, swing 11T CNTFET adder

As the semiconductor industry continues to decrease in size, it faces many issues, such as scalability, leakage, short-channel effects, and reliability. carbon nanotubes (CNT) has become a potential new technology that can address the shortcomings of CMOS without compromising both performance and reliability. The research presents the design, simulation, and comparison of an improved full-swing 11 Transistor (11T) adder based on CNT with a CMOS implementation in the 32 nm technological node. The CNT-based adder demonstrated superior performance compared to CMOS-based equivalents in terms of power consumption and delay, along with the power-delay product (PDP). The CNTFET adder demonstrates a minimum power consumption reduction of 73 %, a minimum decrease in delay of 29 %, and a minimum reduction in the power-delay product (PDP) of 81 % when compared to the CMOS version of the adder with supply voltage ranging from 0.8 V to 1.2 V. The CNTFET adder demonstrates a minimum power consumption reduction of 64 %, a minimum decrease in delay of 19 %, and a minimum reduction in the power-delay product (PDP) of 71 % when compared to the CMOS version of the adder with temperature ranging from -25 °C to 75 °C.

A wideband and low-power mm-wave variable-gain phase shifter based on a source-switching scheme

This article presents a low-power and wideband variable-gain phase shifter (VGPS) designed and simulated in a CMOS 65 nm technology. It introduces a source-switching scheme for designing a variable gain amplifier (SSVGA) characterized by invariant linearity, impedance, and phase characteristics, showcasing improved gain and bandwidth compared to conventional VGAs. The current-reuse and staggered-tuning techniques are used to reduce power consumption and extend the bandwidth, respectively. The proposed VGPS enables gain tuning without the need for an additional gain tuning block, resulting in reduced chip area and sidelobe levels in phased array radar systems. The proposed VGPS, with a 5-bit resolution, achieves a 3-dB bandwidth of 18 GHz (53.5–71.5 GHz) and exhibits RMS gain error range from 0.23 to 0.5 dB and RMS phase error range from 0.54° to 2.65° with phase calibration based on simulation results. It achieves a peak average gain of 1.2 dB at 58.5 GHz while consuming a DC power consumption of only 5 mW with a 1.2 V power supply voltage. Moreover, it demonstrates a wide gain tuning of 20.6 dB, allowing for flexible gain adjustments.

Assessment of voltage harmonics' impact on the maximum load capacity of the power supply transformer for the LHCD system.

To study the influence of the voltage total harmonic distortion (THDV) and its spectrum on the harmonic loss factor (FHL) and the maximum allowable load capacity ratio (Imax (pu)) for the transformer of the LHCD system, we use MATLAB software to model the LHCD system and study the winding loss and maximum allowed load capacity of the LHCD system transformer when the supply voltage source is sinusoidal and non-sinusoidal, respectively. The calculation is carried out by the method of IEEE standard C57.110 and the method of considering the skin effect. The calculation results of both methods clearly show that the THDV value of the supply voltage has a significant effect on the harmonic dissipation factor (FHL) and the maximum allowable load capacity ratio (Imax (pu)) of the transformer. And the calculation method considering the skin effect increases the maximum allowable load capacity ratio of the LHCD system transformer by about 2%. The research results have important reference value for the future retrofit design of LHCD system transformers.

The Design of Low Power Op-amp for Biomedical Application

This work presents a low-power operational amplifier (op-amp) circuit design which optimized and tailored specifically for biomedical circuit application in low power environment. The proposed op-amp design incorporates the folded cascode differential amplifier technique with a low voltage supply 1.2 V, utilizing current biasing, current mirrors, and adopted low-power circuit topologies. AC and DC analysis are carried out to analyse the performance of the proposed design. Extensive simulations executed using industrial standard EDA tool have validated the circuit design, and demonstrated a gain of 70.94 dB, UGBW of 4.90 MHz, GM of 52.70 dB, PM of 82.02 degrees, PSRR of 82.77 dB, CMRR of 100.78 dB, and total power dissipation of only 28.07 mW. Low power consumption is essential for biomedical circuit applications, and the result shows a significant power reduction without compromising other performance parameters. The proposed op-amp circuit design is suitable to be implemented in low-power and high-performance biomedical devices.

A 0.49–4.34 μW LC-SAR Hybrid ADC with a 10.85-Bit ENOB and 20 KS/s Bandwidth

This paper presents a level-crossing successive-approximation-register (LC-SAR) hybrid analog-to-digital converter (ADC) that combines an LC ADC with an SAR ADC, which may be used for Internet of Things (IoT) random sparse event scenarios. The sampling frequency of a traditional LC ADC is usually proportional to the maximum instantaneous rate of change of the input signal; therefore, a higher input signal frequency inevitably leads to higher system power consumption. However, the proposed hybrid ADC uses the input level difference between the two moments before and after level-crossing detection, thereby ensuring a higher conversion precision and lower power consumption, even at higher input signal frequencies. Compared with traditional LC ADC or SAR ADC, the proposed hybrid ADC combines the ultralow-power advantage of LC ADC with the high-precision advantage of SAR ADC in converting IoT data with sparse characteristics such as ECG, EEG, and brain potential. The LC-SAR hybrid ADC is designed with a 0.18 μm CMOS process and consumes 4.34 μW at a 1.8 V supply voltage, achieving an SNDR of 67.41 dB and a bandwidth of 20 kHz. The spectrum analysis result was 10.85 ENOB when the input sinusoidal signal was 14.975 kHz. When inputted with an ECG signal, the system power consumption was as low as 0.49 μW. Furthermore, the proposed hybrid ADC obtained a good figure of merit, with FoMw and FoMs reaching 58.8 fJ/conv.steps and 164 dB, respectively. Compared to a conventional uniform sampling ADC, approximately 80% of the power savings and an 8x compression ratio can be achieved in physiological signal acquisition applications.

High-speed and large-scale intrinsically stretchable integrated circuits.

Intrinsically stretchable electronics with skin-like mechanical properties have been identified as a promising platform for emerging applications ranging from continuous physiological monitoring to real-time analysis of health conditions, to closed-loop delivery of autonomous medical treatment1-7. However, current technologies could only reach electrical performance at amorphous-silicon level (that is, charge-carrier mobility of about 1 cm2 V-1 s-1), low integration scale (for example, 54 transistors per circuit) and limited functionalities8-11. Here we report high-density, intrinsically stretchable transistors and integrated circuits with high driving ability, high operation speed and large-scale integration. They were enabled by a combination of innovations in materials, fabrication process design, device engineering and circuit design. Our intrinsically stretchable transistors exhibit an average field-effect mobility of more than 20 cm2 V-1 s-1 under 100% strain, a device density of 100,000 transistors per cm2, including interconnects and a high drive current of around 2 μA μm-1 at a supply voltage of 5 V. Notably, these achieved parameters are on par with state-of-the-art flexible transistors based on metal-oxide, carbon nanotube and polycrystalline silicon materials on plastic substrates12-14. Furthermore, we realize a large-scale integrated circuit with more than 1,000 transistors and a stage-switching frequency greater than 1 MHz, for the first time, to our knowledge, in intrinsically stretchable electronics. Moreover, we demonstrate a high-throughput braille recognition system that surpasses human skin sensing ability, enabled by an active-matrix tactile sensor array with a record-high density of 2,500 units per cm2, and a light-emitting diode display with a high refreshing speed of 60 Hz and excellent mechanical robustness. The above advancements in device performance have substantially enhanced the abilities of skin-like electronics.

The Effect of Pixel Design and Operation Conditions on Linear Output Range of 4T CMOS Image Sensors.

We analyze several factors that affect the linear output range of CMOS image sensors, including charge transfer time, reset transistor supply voltage, the capacitance of integration capacitor, the n-well doping of the pinned photodiode (PPD) and the output buffer. The test chips are fabricated with 0.18 μm CMOS image sensor (CIS) process and comprise six channels. Channels B1 and B2 are 10 μm pixels and channels B3-B6 are 20 μm pixels, with corresponding pixel arrays of 1 × 2560 and 1 × 1280 respectively. The floating diffusion (FD) capacitance varies from 10 fF to 23.3 fF, and two different designs were employed for the n-well doping in PPD. The experimental results indicate that optimizing the FD capacitance and PPD design can enhance the linear output range by 37% and 32%, respectively. For larger pixel sizes, extending the transfer gate (TG) sampling time leads to an increase of over 60% in the linear output range. Furthermore, optimizing the design of the output buffer can alleviate restrictions on the linear output range. The lower reset voltage for noise reduction does not exhibit a significant impact on the linear output range. Furthermore, these methods can enhance the linear output range without significantly amplifying the readout noise. These findings indicate that the linear output range of pixels is not only influenced by pixel design but also by operational conditions. Finally, we conducted a detailed analysis of the impact of PPD n-well doping concentration and TG sampling time on the linear output range. This provides designers with a clear understanding of how nonlinearity is introduced into pixels, offering valuable insight in the design of highly linear pixels.

Phantom sensation: Threshold and quality indicators of a tactile illusion of motion

Utilizing a randomized, blind, controlled experiment, and the ascending method of limits, we determined the minimum amplitude of motion at which individuals perceive a tactile illusion called moving phantom sensation, the perceived level of clarity and continuity of motion. Implementing tactile illusions in virtual/augmented reality, sensory substitution systems, and other human–computer interaction technologies results in interfaces with improved resolution, using two vibrating actuators only. The actuators are attached to the skin in different locations to render a moving phantom sensation. The intensity of vibrations increases in one actuator while decreases in the other according to the envelope of the voltage supply signals. This intensity variation creates the illusion of a vibrating point moving between the actuators. We gradually increased the amplitude of motion until the participant reported perceiving the illusion, for eight values of duration of the stimulus from 0.1 to 6.0 s. Participants perceived the illusion at a minimum amplitude of motion of 20%; being 100% the motion from one actuator to the other. The median level of clarity of the perceived illusion at the minimum amplitude of motion was 2 (not so clear). Finally, we found a positive correlation between duration and continuity of motion.

An SOI-based post-fabrication process for compliant MEMS devices

Fabricating compliant microelectromechanical system (MEMS) devices is challenging because they are easily damaged during fabrication. This paper presents a fabrication process based on the silicon-on-insulator (SOI) wafer for compliant MEMS devices. In the fabrication process, tethers were used to enhance the strength of the compliant devices during fabrication and finally melted with an electric current to release the device after fabrication. We discover that the power supply mode and voltage value are very critical for low-resistance tether melting. The fabrication results show that the yield rate of the compliant microgripper increased from 44% to 100%, which is a significant improvement compared with conventional processes. The successful fabrication of the microgripper proved that the proposed SOI-based post-fabrication process is feasible and can be used to fabricate different kinds of compliant devices.

Performance analysis of a vapor injection linear compressor in a dual-temperature zone refrigerator

The vapor injection linear compressor exhibits a distinctive mass flowrate distribution characteristic compared to other vapor injection compressors, making it promising for application in dual-temperature zones refrigerating systems. In this study, a novel system of dual-temperature zone refrigerators featuring two parallel evaporators is proposed, and numerical models of the vapor injection linear compressor and its system are established, and then validated by experimental results. Theoretical analysis is conducted to explore the cooling performance and capacity-modulating characteristics of the system. Compared to traditional refrigeration systems, the vapor injection of medium-pressure refrigerant enhances the cooling capacity and performance at a large piston stroke while deteriorating the freezing capacity at a small piston stroke. This system offers the flexibility of adjusting the cooling ratio by modulating supply voltage and driving frequency to meet the cooling requirements. Correspondingly, special control strategies for this kind of system for the best performance are proposed in this study. Additionally, the structural parameters significantly influence the cooling performance: a larger injection area and a smaller distance to the top death center prove to be more advantageous for overall cooling performance. This research provides valuable insights for optimizing the structural parameters and control strategies, serving as a beneficial reference for future innovative refrigeration technologies.

A Novel Hybrid MPPT Controller for PEMFC Fed High Step-Up Single Switch DC-DC Converter

At present, there are different types of Renewable Energy Resources (RESs) available in nature which are wind, tidal, fuel cell, and solar. The wind, tidal, and solar power systems give discontinuous power supply which is not suitable for the present automotive systems. Here, the Proton Exchange Membrane Fuel Stack (PEMFS) is used for supplying the power to the electrical vehicle systems. The features of fuel stack networks are very quick static response, plus low atmospheric pollution. Also, this type of power supply system consists of high flexibility and more reliability. However, the fuel stack drawback is a nonlinear power supply nature. As a result, the functioning point of the fuel stack varies from one position to another position on the V-I curve of the fuel stack. Here, the first objective of the work is the development of the Grey Wolf Optimization Technique (GWOT) involving a Fuzzy Logic Controller (FLC) for finding the Maximum Power Point (MPP) of the fuel stack. This hybrid GWOT-FLC controller stabilizes the source power under various operating temperature conditions of the fuel stack. However, the fuel stack supplies very little output voltage which is improved by introducing the Single Switch Universal Supply Voltage Boost Converter (SSUSVBC) in the second objective. The features of this proposed DC-DC converter are fewer voltage distortions of the fuel stack output voltage, high voltage conversion ratio, and low-level voltage stress on switches. The fuel stack integrated SSUSVBC is analyzed by selecting the MATLAB/Simulink window. Also, the proposed DC-DC converter is tested by utilizing the programmable DC source.

Enhancement of the Power-to-Heat Energy Conversion Process of a Thermal Energy Storage Cycle through the use of a Thermoelectric Heat Pump

The principal strategy for achieving a neutral climate entails enhancing the share of renewable energies in the energy mix, in conjunction with promoting innovation in efficient technologies. Thermal energy storage systems have the potential to efficiently handle the intermittent nature of renewable energy sources. Furthermore, these systems can effectively handle shifts in both heat and electrical demand. Thus, efficient power-to-heat technologies are needed to boost thermal energy storage. This manuscript explores the potential of utilising a thermoelectric heat pump system in conjunction with electric resistances for charging a thermal energy storage. In order to achieve elevated temperatures, the thermoelectric system integrates thermoelectric heat pump blocks in a two-stage configuration. Air has been employed as a heat transfer medium for sensible heat storage. Higher airflow rates improve the performance of thermoelectric heat pump system. Moreover, its impact on the optimal voltage supply of the thermoelectric system is observed when it is combined with an electric resistance to achieve elevated temperatures. In comparison to the basic charging process that solely relies on the electric resistance of a thermal energy storage at 120 °C, a significant 30 % increase in power-to-heat energy conversion has been achieved by including the thermoelectric heat pump system. In fact, it efficiently elevates the temperature from the initial ambient temperature of 25 °C to a remarkable 113.1 °C, achieving a coefficient of performance of 1.35 with an airflow rate of 23 m3/h. Therefore, the use of this technology to enhance a complete process of storing excess renewable energy in the form of heat for subsequent use in both heat and electricity through a combined heat and power cycle is demonstrated.

Identifying atomically thin isolated-band channels for intrinsic steep-slope transistors by high-throughput study

Developing low-power FETs holds significant importance in advancing logic circuits, especially as the feature size of MOSFETs approaches sub-10 nanometers. However, this has been restricted by the thermionic limitation of SS, which is limited to 60 mV per decade at room temperature. Herein, we proposed a strategy that utilizes 2D semiconductors with an isolated-band feature as channels to realize sub-thermionic SS in MOSFETs. Through high-throughput calculations, we established a guiding principle that combines the atomic structure and orbital interaction to identify their sub-thermionic transport potential. This guides us to screen 192 candidates from the 2D material database comprising 1608 systems. Additionally, the physical relationship between the sub-thermionic transport performances and electronic structures is further revealed, which enables us to predict 15 systems with promising device performances for low-power applications with supply voltage below 0.5 V. This work opens a new way for the low-power electronics based on 2D materials and would inspire extensive interests in the experimental exploration of intrinsic steep-slope MOSFETs.

Design, Simulation and Comparative Analysis of Two Stage Operational Amplifier Based on CNTFETs Using Indirect Feedback Frequency Compensation

In the course of this study, an efficient implementation of a high gain and low power two-stage operational amplifier using indirect feedback frequency compensation based on CNTFETs. HSPICE software was used to develop and simulate CNTFETs. The op-amps were designed using 0.9[Formula: see text]V input supply voltage. The proposed structures were formed either using CNTFETs only known as pure CNTFET-IFFC-2SOA or hybrid structures consisting a mix of both CNTFETs and conventional CMOS named as PCNTFET-NMOS-IFFC-2SOA and NCNTFET-PMOS-2SOA. The comparative investigation revealed that CNT-based structures performed significantly better than the traditional CMOS-based devices. In the instance of CNTFET-IFFC-2SOA, there was a considerable improvement in DC gain, power dissipation, phase margin, and CMRR. The DC Gain increased by 140.92%, the CMRR increased by 32.94%, and the phase margin increased by 4.9%. Furthermore, at the 32[Formula: see text]nm technology node, a GNRFET-based structure was designed and compared to conventional CMOS and pure CNTFET-based IFFC-2SOA. It was discovered that the DC gain, phase margin, and power dissipation obtained by the CNTFET-based structure were superior to both. The DC Gain of CNTFET-IFFC-2SOA was 156.79% more than that of GNRFET-IFFC-2SOA. To confirm the workability of the proposed circuits, an integrator was designed and simulated as its application. The CNTFET-based IFFC-2SOA integrators showed better integration action than the traditional CMOS-IFFC-2SOA.

A 28 GHz Highly Linear Up-Conversion Mixer for 5G Cellular Communications

In this paper, we present a highly linear direct in-phase/quadrature (I/Q) up-conversion mixer for 5G millimeter-wave applications. To enhance the linearity of the mixer, we propose a complementary derivative superposition technique with pre-distortion. The proposed up-conversion mixer consists of a quadrature generator, LO buffer amplifiers, and an I/Q up-conversion mixer core and achieves an output third-order intercept point of 15.7 dBm and an output 1 dB compression point of 2 dBm at 27.6 GHz, while it consumes 15 mW at a supply voltage of 1 V. The conversion gain is 11.4 dB and the LO leakage and image rejection ratio are −56 dBc and 61 dB, respectively, in the measurement. The proposed I/Q up-conversion mixer is suitable for 5G cellular communication systems.

Control of Vibratory Feeder Device Mechanical Frequency Using the Modification of the Sinusoidal Supply Voltage Signal

In the industrial and sales processes, dosing systems of various constructions, whose operation is based on mechanical vibrations (vibratory feeders), are very often used. These systems face many problems, such as resonant frequency, flow instability of dosed product, instability of mechanical vibration amplitude, etc., because most of them are based on controlling the frequency of the electrical signal of the supply voltage. All these factors negatively affect the durability and reliability of the vibratory feeder systems. During this research, an automatic control system for vibratory feeder was created, whose control process is based on the modification of the sinusoidal signal (partially changing the signal area). In addition, such a way of controlling the vibratory feeder is not discussed in the literature. As the research conducted in this paper has shown, while using sinusoidal signal modification it was possible to achieve a stable flow rate of bulk production (the flow rate varied from 0 to 100 g/s when the frequency of mechanical vibrations changed from 1 to 50 Hz) and a stable amplitude of mechanical oscillations was achieved and equal to 1.5 mm. The control system is based on the microcontroller PIC24FV32KA302 for which the special software was developed. The thyristor BTA16 used for voltage modification of the sinusoidal signal made it possible to ensure the reliable control of the sinusoidal voltage modification process.