Submodules Research Articles

Synchronization for an MMC Distributed Control System Considering Disturbances Introduced by Submodule Asynchrony

The modular multilevel converter (MMC) is a promising topology for HVdc applications, which typically adopts a distributed control architecture to manage considerable submodules (SMs) in the system. SM synchronization is necessary for an MMC distributed control system to cope with the local controller clock discrepancy and asynchrony due to the manufacturing tolerance. This article proposes a synchronization scheme for the MMC distributed control system taking the disturbances introduced by the SM asynchrony into account. The MMC models considering SM asynchrony reveal that the asynchrony introduces harmonics around the carrier frequency in MMC output and the circulating current. The interaction between the SM switching harmonics and arm current harmonics leads to divergence of the capacitor voltages. The MMC distributed control system cannot entirely restrain the voltage divergence and maintain the system stability owing to the control capability saturation of the balancing controller. According to the theoretical analysis, the synchronization interval is properly selected considering the harmonic contents in the MMC output, the capacitor voltage deviation, and the distributed control system stability. The theoretical models and the proposed synchronization scheme are validated experimentally on an MMC prototype.

A SiC MOSFET and Si IGBT Hybrid Modular Multilevel Converter With Specialized Modulation Scheme

The utilization of silicon carbide (SiC) MOSFET instead of silicon (Si) IGBT can significantly improve the performance of many converters. However, a modular multilevel converter (MMC) completely based on the SiC MOSFET suffers from high cost and high conduction loss at the high power levels. To solve these issues, a SiC MOSFET and an Si IGBT hybrid MMC are proposed in this letter. In the new topology, only one full-bridge submodule (SM) of each arm uses SiC MOSFETs, while the other half-bridge SMs use Si IGBTs. Meanwhile, a specialized modulation scheme is proposed to move most of the switching actions from the Si SMs to the SiC SM. As a result, the advantages of SiC MOSFET and Si IGBT are both utilized, and the total loss and cost of the MMC are reduced. Finally, the experimental result proves the feasibility of the topology and modulation scheme, and the further loss analysis verifies the superiority of the hybrid MMC over others.

A Dual-Active-Bridge With Half-Bridge Submodules DC Solid-State Transformer for DC Distribution Networks

High-frequency dc solid-state transformer (DCSST) plays an important role in DC bus connection, voltage conversion, electrical isolation, and bidirectional power transmission in dc distribution networks. In various DSSCT topologies, the dual-active-bridge (DAB) scheme becomes a typical solution for DCSST due to its various advantages. However, the DAB scheme still has drawbacks during practical applications. In this article, a DAB with half-bridge submodules (HSDAB) is proposed. By replacing the switches in front bridge arm with half-bridge submodules (SMs), the proposed HSDAB scheme maintains the advantages of conventional DAB and obtains bidirectional dc fault-handling capability, reducing the application of large dc capacitors and dc circuit breaker; therefore, the volume and construction cost of DCSST can be effectively reduced. Besides, a high-frequency-link (HFL) voltage regulation strategy for HSDAB is also proposed in this article. The HFL voltages can be adjusted to match the HFL transformer voltage ratio during the whole operating range, reducing the current stress, HFL reactive power, and power loss of DCSST. Moreover, the proposed HSDAB scheme can also be applied as a basic circuit to establish multiple modular architecture DCSST, flexibly connecting low-voltage dc, medium-voltage dc, and high-voltage dc buses in the dc distribution network. The topology, operation principle, control structure, corresponding bidirectional dc fault handling, and HFL voltage regulation strategy of the proposed HSDAB scheme are investigated. The experimental results verify the correctness and effectiveness of the analysis and proposed scheme.

Fault-Tolerant Method to Reduce Voltage Stress of Submodules in Postfault Condition for Regenerative MMC-Based Drive

In this article, we propose a fault-tolerant strategy to recover the full performance of a modular multilevel converter (MMC) under submodule (SM) fault condition for regenerative medium-voltage drive applications. The proposed method has the feature to retrieve line voltage amplitude during the postfault condition back to its nominal value. In this method, the missing capacity of the converter due to the fault condition is compensated by all remaining healthy SMs. The main advantage of the proposed method in comparison with previous works is that it imposes a lower voltage stress on switches in postfault conditions without severe circulating current. Remaining healthy SMs also operate at a similar condition, which leads to the feature of homogeneous distribution of loss and temperature in all parts of the converter. The proposed method is applicable for the regenerative MMC-based drives as well as the back-to-back configuration of MMC without adding cost or complexity to the whole system. A generalized approach is presented and its result is compared with other methods. The simulation and experimental results are provided to validate the performance and feasibility of the proposed method that can effectively enhance the fault-tolerant capability of this converter.

Arm energy balancing control in AACs: a comparative analysis

The alternate arm converter (AAC) is an emerging state-of-the-art topology for voltage-source converter (VSC) by combining two-level converter and modular multilevel converter (MMC). The AAC performs better than the MMC in terms of the ability to block DC-side faults and ride through AC-side faults. Moreover, the number of sub-modules (SMs) per arm of the AAC is reduced by about 50% compared with the MMC. The key issue with AAC is the energy deviation during the alternate operation between the upper and lower arms. Presently, several AAC balancing techniques have been proposed, but no comparative analysis has been performed to provide insight on the effect of each balancing technique on AAC performance. In this study, five proposed balancing techniques are reviewed accordingly, followed by comparing them in terms of four parameters – the presence of DC filter, balancing capability, the presence of redundant SMs and zero-current switching control. Furthermore, a simulation work has been performed to study and compare the effects of each of the five balancing techniques. Both literature and simulation-based comparative analysis are significant to help select appropriate balancing technique as well as to provide helpful insights to improve the existing balancing techniques.

Recent Advancements in Submodule Topologies and Applications of MMC

Modular multilevel converter (MMC) is a promising topology for medium- and high-power conversion systems. In recent years, it has been prominent over other power converters because of its exceptional features, including modularity and flexibility to adapt any voltage level, remarkable harmonic performance, no dc-link capacitors, transformerless operation, absence of ac-side filters, and capacitive nature of phase legs. However, there are some challenges, for instance, submodule (SM) capacitor voltage balancing, output current control, circulating current control, minimization of SM capacitor voltage ripple, dc-side faults, and efficient SM topologies that have been addressed by the research studies over time. In this article, we focus on the recent advancements in SM structures and their capability to overcome the faults, reduction in switching losses, decrease in voltage sensor count, and minimization of SM capacitor voltage ripple and provide the quick restoration of SM capacitor voltages after the removal of faults. Finally, the applications and development prospects of MMC are discussed in detail.

A Three-Phase Triple-Voltage Dual-Active-Bridge Converter for Medium Voltage DC Transformer to Reduce the Number of Submodules

In order to improve the power density of dc transformer (DCT), this article proposes a novel three-phase dual-active-bridge (DAB) dc–dc converter, which possesses triple input voltage of conventional full-bridge DAB converter without increasing the voltage stress of switches. By adopting it as the DCT submodule (SM), the number of SMs in DCT is reduced markedly and power density can be improved. Based on the analysis of operation principle, design procedure, basic control strategy and startup scheme of the proposed three-phase triple-voltage DAB (T2-DAB) converter are presented. Then, the feasibility of proposed converter is verified with simulation and a 2 kW, 600/200 V prototype. Finally, the superiority of the DCT scheme based on proposed T2-DAB converter is verified by a comparison with some existing DAB schemes.

Fault Localization Strategy for Modular Multilevel Converters in Rectifier Mode Under Submodule Switch Open-Circuit Failure

The modular multilevel converter (MMC) is a promising candidate for the high-voltage and high-power applications. Fault localization is an important issue for the reliable operation of the MMC. The localization strategies of switch open-circuit failures for the MMCs in the inverter mode have been widely reported in the existing literature. This brief proposed a complete fault localization strategy for the MMC in the rectifier mode. In this brief, the differences of the fault characteristics between the inverter mode and rectifier mode are analyzed in detail. Based on that, the switch signal is used as the criterion for the fault localization. After the faulty submodule (SM) is identified, combining the switch signal and the capacitor voltage of the faulty SM can further locate the faulty switch. The proposed strategy can simplify the localization and identify three kinds of switch failures in SMs. In addition, the validity of the proposed strategy is verified by the simulation results.

Novel flexible HVDC transmission converter station topology with DC fault blocking capability

The conventional half-bridge submodule (HBSM)-based multilevel modular converter (MMC) cannot block DC faults. To solve this problem, a novel flexible overhead-line high-voltage direct current (HVDC) transmission converter station topology is proposed in this study, which provides DC fault blocking capability. By adding blocking submodules (SMs) onto the positive and negative DC buses of a conventional HBSM converter station, a rapid fault current blocking can be achieved in the case of a DC bus short circuit. The DC fault blocking principle of the proposed topology and the rapid fault blocking capability of the blocking SM are analyzed. The quantity of required major components is also calculated. In addition, the IGBT, the system loss and the control complexity quantities are comprehensively compared with those of existing topologies. The validity of the proposed topology is demonstrated based on simulation and experimental studies.

Operation Method of MMC Capacitance Reduction Under Arm Inductor Switching Control

With the development of the MMC-HVDC, the lightweight requirements of the converter valves have become increasingly urgent. The reduction of submodule (SM) capacitance is difficult because the ripple of capacitor voltage cannot be too large, which is one of the key factors that affect the weight and the volume of the MMC. On the basis of the fundamental frequency and double fundamental frequency components are the critical factors for voltage ripples, this paper proposes an arm inductor switching control (AISC) strategy to reduce the voltage ripples of SM capacitor by controlling the inductance value of the bridge arm. The proposed strategy and the existing circulating current suppression controller (CCSC) are researched in terms of mathematical principles. A two terminal DC transmission model is built in PSCAD/EMTDC simulation environment, then the capacitor voltage fluctuation curves of non-capacitance-reducing control, CCSC, and proposed strategy with the same parameters are simulated. Afterwards, an experiment prototype is built to verify the simulation results. Simulation and experimental results are presented to demonstrate the effectiveness of the proposed strategy.

Comparative Analysis of an MV Neutral Point Clamped AC-CHB Converter With DC Fault Ride-Through Capability

The ac-side cascaded H-bridge converter with a two-level (2L) main bridge has previously been proposed as a fault-tolerant converter for high-voltage dc. This paper explores the benefits of replacing the 2L bridge with a neutral point clamped (NPC) three-level bridge for medium voltage dc applications and defines the optimum operating conditions for this case. By modifying the topology to include an NPC main bridge, the peak stack voltage during normal operation is decreased considerably, which results in a 58% reduction in the required number of submodules (SM), thereby significantly increasing efficiency. However, this sacrifices the fault ride-through capability as the stacks are no longer able to support the ac voltage and thus two new SM topologies are proposed. The proposed topologies function as single full-bridges with two capacitors in parallel during normal operation. Under fault conditions, the SMs divide into two series-connected full-bridges to enable dc fault ride-through. Reverse-blocking integrated gate-commutated thyristors or ultra-fast mechanical switches are used to bypass the insulated gate bipolar transistors that are unused in normal operation and therefore the topology maintains a high efficiency. Simulation results are shown, and the proposed topologies are compared with the more conventional designs in terms of efficiency, energy storage requirement, and device count.

Arm-Sensorless Sub-Module Voltage Estimation and Balancing of Modular Multilevel Converters

Modular multilevel converters (MMCs) have established their position as the choice of next-generation high voltage converters. These converters, however, require a bulk number of sensors in each phase for sub-modules (SMs) voltage balancing. A limited number of studies are found in the literature where the number of sensors is reduced by incorporating observers to estimate the SM voltages. Nonetheless, most of these methods require accurate measurements of the arm voltage. Thus, the dependence on sensors is not completely eliminated. In this paper, a Kalman-filter-based estimation of SM voltages is presented, which does not require any voltage sensor to measure the arm voltage. Therefore, this method considerably simplifies the implementation of MMCs. Extensive simulations and experimental test cases are conducted to validate the performance of the proposed SM voltage estimation method. The performance assessments verify the accuracy and robustness of the proposed method for various test scenarios performed over a wide range of sampling frequencies.

Circulating Harmonic Currents Suppression of Level-Increased NLM Based Modular Multilevel Converter With Deadbeat Control

This article first analyzes the effect of the level-increased nearest level modulation (NLM) to the circulating current of the modular multilevel converter (MMC). The total inserted submodule (SM) number in one phase-leg of the MMC is variable using the level-increased NLM, which can significantly increase the peak-to-peak value of the circulating harmonic currents. Then, a circulating harmonic currents suppression method is proposed by applying deadbeat control for the MMC with level-increased NLM. Compared with the existing direct circulating current control approaches for the MMC, the proposed method presents specific extension and adjustment principle of the total inserted SM number. Therefore, the proposed method can improve the dynamic control performance and handle large circulating harmonic currents at steady state. And it can well coordinate the modulation and circulating harmonic currents suppression stages to avoid disturbing the ac-side output voltage while regulating the circulating current. The effectiveness of the proposed method is evaluated by a single-phase industrial-level simulated MMC system and a laboratory experimental platform.

Submodule capacitance requirement reduction with capacitor voltage ripple suppression in MMC

In modular multilevel converter (MMC)-based high-voltage direct current transmission system, hundreds of submodules (SMs) with large SM capacitance in each arm result in expensive cost and bulky volume. In full-bridge submodules (FBSMs)-based MMC (FB-MMC), a novel capacitor voltage ripple suppression method based on three available variables manipulation is proposed to reduce SM capacitance requirement. In the interaction of these available variables, the dominant fundamental-frequency and second-order harmonic fluctuations of SM capacitor voltage can be eliminated under different power factors. Under the proposed method, three-to-five times frequency fluctuation components will be reduced as much as possible. By establishing capacitor voltage fluctuation model, the concrete mathematical expressions of the three desired available variables under different power factors can be derived, which are easily implemented to suppress capacitor voltage ripple. Compared with normal operation, SM capacitor voltage ripple can be reduced by 80% with the proposed method when the power factor of 0.9–1 is considered. In other words, SM capacitance requirement can be reduced by 80% under the same constraint of capacitor voltage ripple. Therefore, the cost and volume of SM capacitors can be significantly reduced. Simulation results confirm the feasibility and validity of the proposed method.

Lifetime Analysis of Metallized Polypropylene Capacitors in Modular Multilevel Converter Based on Finite Element Method

Metallized polypropylene capacitors (MPPCs) are widely used in the modular multilevel converter (MMC) for high-voltage direct-current transmission systems because of their lower power losses and self-healing capability. The performance of MPPCs in MMC deteriorates with time due to the increase in the equivalent series resistance and a decrease in the capacitance. Therefore, the reliability analysis of MPPC is critical. This article proposes a finite element method (FEM) to analyze the reliability of MPPC by considering corrosion failure. First, the equivalent electric model and actual thermal model of the MPPC are established to calculate power losses and temperature distribution of the MPPC. Second, the corrosion failure of the MPPC is analyzed and simulated by the FEM model, and the lifetime model of MPPC is established by the aging model of polypropylene film and verified by the traditional lifetime model of corrosion failure and the floating aging tests. Finally, the voltage of each submodule (SM) is extracted in the MMC model, and the lifetime of MPPCs in each SM is analyzed by combining the FEM model and the lifetime model. The results show that in the MMC, the SMs in each arm near the dc line or the middle part have a lower lifetime of MPPCs.

Online Capacitance Estimation of Submodule Capacitors for Modular Multilevel Converter With Nearest Level Modulation

This letter proposes an online capacitance estimation method for the modular multilevel converter. In the prevalent methods, the inherent second-order circulating current or the injected low-frequency current/voltage component is utilized to calculate the submodule (SM) capacitance. In this letter, the relationship between the voltage variation of an SM capacitor in one fundamental period and the driving signals switching angle under the nearest level modulation scheme is revealed. The voltage variation of each SM capacitor is a direct component and has no relationship with the second-order harmonic current and voltage ripples. Accordingly, an online capacitance estimation method for HVdc applications is proposed by simply monitoring the SM capacitor voltage variations at fundamental frequency. In the proposed scheme, neither the current/voltage injection nor the inherent circulating current is required, which reduces the estimation complexity. The recursive least squares algorithm is also adopted to guarantee the accuracy of the estimation method. Effectiveness of the proposed online capacitor estimation method is verified by the experimental results.

Cost and reliability optimization of modular multilevel converter with hybrid submodule for offshore DC wind turbine

The hybrid modular multilevel converter (HMMC) consisting of half- and full-bridge submodules (SMs), with DC fault ride-through capability, have become a promising candidate for offshore wind energy conversion system, especially all-DC output wind turbines. The topology of HMMC needs to be optimized for lower cost and higher reliability with active redundancy. This paper presents an optimization method for HMMC topology with cost and reliability objectives. The reliability is defined to be not only reliable under normal operation, but also able to ride through DC fault even with faulted SMs, which is different from the former model. Firstly, reliability and cost models with power loss, considering active redundancy configuration, are derived. Then, cost and reliability, with different numbers of original and redundant SMs, are quantified by taking a case study of 10-MW and 10-kV HMMC for offshore DC wind turbines. Finally, a multi-objective optimization approach that regards maximum reliability and minimum cost is proposed, and the optimal solution from Pareto-optimal set is selected according to fuzzy membership function, which determines the optimal topology for HMMC. The results show that reliability can be improve with redundant full-bridge SMs (FBSMs) but weakened with excessive half-bridge SMs (HBSMs). Furthermore, the incremental cost with a redundant FBSM is approximately 3 times that of HBSM. The optimal topology, 10 original SMs per arm (5 HBSMs and 5 FBSMs) with 1 redundant HBSM and 4 FBSMs, is validated by comparing with the results of former reliability model and single-objective optimization.

Circulating Current Suppression Control in Surrogate Network of MMC- HVDC System

Modular multilevel converter consists of hundreds of submodules (SMs) like half bridge and full bridge converters etc. These hundreds of SMs and electrical nodes poses challenges while computing electromagnetic transients (EMTs). This problem becomes more complex while computed in real-time. To overcome this, an equivalent topology to model MMC arm/valve called surrogate network is utilized. But, the major ambiguity integrated with surrogate network model is SM capacitor voltage balancing. This leads to variation in voltage among the three phases which are parallel and produces circulating current between the three phases. A control circuitry is proposed in this paper to suppress/minimize circulating currents between the phases. Apart from circulating current suppression, the ‘ac’ output voltage is also enhanced at the converter with this proposed controller. Simulation is carried out in RSCAD software using RTDS simulator.

Real Time Simulation of Wind Farm Connected MMC-HVDC System

Real time simulators play a major role in R&D of Offshore wind farm connected modular multilevel converter (MMC)-HVDC system. These simulators are used for testing the actual prototype of controllers or protection equipment required for the system under study. Modular multilevel converter comprises of number of sub modules (SMs) like Half/ full bridge cells. While computing time domain Electromagnetic transients (EMTs) with the system having large number of SMs pose a great challenge. This computational burden will be more when simulated in real time. To overcome this, several authors proposed equivalent mathematical model of MMC. This paper proposes the real time simulation start-up of offshore wind farm connected modular multilevel converter (MMC)-HVDC system. This paper also describes about how the above said systems is simulated in OPAL-RT based Hypersim software.

An Improved Fault-Tolerant Control Scheme for Cascaded H-Bridge STATCOM With Higher Attainable Balanced Line-to-Line Voltages

Fault-tolerant operation ability is of great importance for stable operation of cascaded H-bridge (CHB) converters, under open-circuit (OC) or short-circuit (SC) switch failures in submodule (SM). In this article, an improved fault-tolerant control strategy is proposed for CHB-based static synchronous compensator (STATCOM) under SM faults. First of all, compared with the conventional fault-tolerant method of directly bypassing the faulty SMs, the proposed fault-tolerant method takes advantage of the healthy switches of the faulty SMs, where they are still able to generate either positive or negative voltage level. As a result, more output voltage levels can be generated, and it raises the attainable balanced line-to-line voltage, especially when different fault types exist at the same time. Then, based on the specific condition of OC fault or SC fault, when the output voltage reference of the faulty phase reaches its limit, the references of the other two healthy phases are redistributed to generate the desired line-to-line voltage. With the reconfiguration of modulation waves, the attainable balanced line-to-line voltage can be further improved. In addition, the proposed fault-tolerant method possesses the ability of cluster voltage balancing, which is an important issue for the STATCOM application. Simulation and experimental results validate the effectiveness of the proposed fault-tolerant method.