Abstract
The modular multilevel converter (MMC) is a promising topology for HVdc applications, which typically adopts a distributed control architecture to manage considerable submodules (SMs) in the system. SM synchronization is necessary for an MMC distributed control system to cope with the local controller clock discrepancy and asynchrony due to the manufacturing tolerance. This article proposes a synchronization scheme for the MMC distributed control system taking the disturbances introduced by the SM asynchrony into account. The MMC models considering SM asynchrony reveal that the asynchrony introduces harmonics around the carrier frequency in MMC output and the circulating current. The interaction between the SM switching harmonics and arm current harmonics leads to divergence of the capacitor voltages. The MMC distributed control system cannot entirely restrain the voltage divergence and maintain the system stability owing to the control capability saturation of the balancing controller. According to the theoretical analysis, the synchronization interval is properly selected considering the harmonic contents in the MMC output, the capacitor voltage deviation, and the distributed control system stability. The theoretical models and the proposed synchronization scheme are validated experimentally on an MMC prototype.
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