Standard Circuit Research Articles

Two-channel combination methods for count-loss correction in radiation measurements at high rates and with pulsed sources

Pile-up effects due to the overlap of signals within the system dead-time (τ) influence the counting capability of radiation detection devices, necessitating the use of correction algorithms to compensate for the count-losses at high radiation rates. Count-rate linearity is especially critical for clinical applications like X-ray imaging or beam monitoring in particle therapy. In particular, in proton therapy the number of delivered particles must be measured online during the treatment session with a maximum error of 1 % up to an average input beam flux of about 1010cm−2s−1. For a segmented detector used to identify and count the single beam particles, assuming a channel area of 1 mm2 and a dead-time τ=2ns, a maximum counting inefficiency of 1 % is required up to τ.fin=0.2 for each detector channel, where fin represents the input rate. Moreover, the beam is often delivered in bunches with higher instantaneous particle rates, and the saturation model of the detector and electronic chain could not be easily determined. Similar considerations are applicable for pixelated detectors used for photon counting.Two methods are proposed to mitigate counting inefficiencies with radiation sources of variable time-structures. Both methods are based on the collection of logic signals provided by two independent detector channels exposed to the same radiation field after discriminating the detector analog outputs with a fixed threshold, assuming that the duration of the discriminator output signal corresponds to the system dead-time. The correction algorithms employ the measurements of the time durations, the number of signals from the two channels and of their AND/OR combinations. The methods provide count-loss corrections without the need to know the dead-time model.The performances of the proposed algorithms are evaluated by using simulations of ideal boxcar signals of fixed duration τ, distributed randomly in time to emulate the dead-time behavior of the system. Both methods provide an effective count-loss correction with a maximum deviation of 1% for different input rates up to τ.fin=1, assuming a uniform random time distribution of input events for both paralyzable and non-paralyzable systems. The simulations of pulsed radiation fluxes provide the same results as a function of the instantaneous input rates.These results are similar to those obtainable by the standard live-time correction algorithm. However, the latter algorithm can only be applied to continuous particle fluxes, while the proposed algorithms work also for pulsed beams, without any hypothesis on the bunch duration or frequency. The robustness of the algorithms with respect to the resolution of the time measurement is studied and the potential limitations in more realistic systems are discussed.The algorithms can be easily implemented in standard logical circuits with multiple input signals provided by segmented detectors. Even if the methods are intended for real-time correction in beam particle counting, they could be applied in a wider range of applications of radiation measurements.

The Classification of Clifford Gates over Qubits

We examine the following problem: given a collection of Clifford gates, describe the set of unitaries generated by circuits composed of those gates. Specifically, we allow the standard circuit operations of composition and tensor product, as well as ancillary workspace qubits as long as they start and end in states uncorrelated with the input, which rule out common "magic state injection" techniques that make Clifford circuits universal. We show that there are exactly 57 classes of Clifford unitaries and present a full classification characterizing the gate sets which generate them. This is the first attempt at a quantum extension of the classification of reversible classical gates introduced by Aaronson et al., another part of an ambitious program to classify all quantum gate sets. The classification uses, at its center, a reinterpretation of the tableau representation of Clifford gates to give circuit decompositions, from which elementary generators can easily be extracted. The 57 different classes are generated in this way, 30 of which arise from the single-qubit subgroups of the Clifford group. At a high level, the remaining classes are arranged according to the bases they preserve. For instance, the CNOT gate preserves the X and Z bases because it maps X-basis elements to X-basis elements and Z-basis elements to Z-basis elements. The remaining classes are characterized by more subtle tableau invariants; for instance, the T_4 and phase gate generate a proper subclass of Z-preserving gates.

Single Diode Solar Cells-Improved Model and Exact Current-Voltage Analytical Solution Based on Lambert's W Function.

There are three standard equivalent circuit models of solar cells in the literature—single-diode, double-diode, and triple-diode models. In this paper, first, a modified version of the single diode model, called the Improved Single Diode Model (ISDM), is presented. This modification is realized by adding resistance in series with the diode to enable better power loss dissipation representation. Second, the mathematical expression for the current–voltage relation of this circuit is derived in terms of Lambert’s W function and solved by using the special trans function theory. Third, a novel hybrid algorithm for solar cell parameters estimation is proposed. The proposed algorithm, called SA-MRFO, is used for the parameter estimation of the standard single diode and improved single diode models. The proposed model’s accuracy and the proposed algorithm’s efficiency are tested on a standard RTC France solar cell and SOLAREX module MSX 60. Furthermore, the experimental verification of the proposed circuit and the proposed solar cell parameter estimation algorithm on a solar laboratory module is also realized. Based on all the results obtained, it is shown that the proposed circuit significantly improves current–voltage solar cell representation in comparison with the standard single diode model and many results in the literature on the double diode and triple diode models. Additionally, it is shown that the proposed algorithm is effective and outperforms many literature algorithms in terms of accuracy and convergence speed.

Design and practice of simple first-order all-pass filters using commercially available IC and their applications

First-order all-pass filter circuits, both non-inverting and inverting, could be the focus of this article, which could include the design and implementation of first-order all-pass filter circuits. Using a standard integrated circuit (IC): AD830, as well as a single resistor and a single capacitor, the proposed first-order all-pass filters could well be built. The AD830 is an integrated circuit (IC) manufactured by Analog Devices Corporation that is available for purchase. The pole frequency and phase response of the proposed all-pass filters could well be directly modified by attuning the resistor in the circuit. Aside from that, the output voltage has a low impedance, making it appropriate for use in voltage-mode circuits. In addition, the proposed first-order all-pass filter is used to design the multiphase sinusoidal oscillator, which serves as an example of an application wherein the oscillation condition can be adjusted without impacting the frequency. The gain and phase responses of the proposed all-pass filters, as well as their phase response adjustment, time-domain response, and total harmonic distortion of signals, are all shown via computer simulation using the PSPICE software, as well as their experimental results. For the proposed circuits, a statistical analysis is coupled with a Monte Carlo simulation to estimate the performance of the circuits. In accordance with the results of this study, a theoretical design suitable for developing a worksheet for teaching and learning in electrical and electronic engineering laboratories has already been developed

Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing.

To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a time-varying pseudorandom disturbance algorithm based on the automatic test pattern generation technology in chip testing is proposed. The algorithm combines the pseudorandom pattern generation algorithm with the deterministic pattern generation D algorithm. The existing pseudorandom number generation method usually requires random seeds to generate a series of pseudorandom numbers. In this algorithm, the system timer is used as the random seed to design a pseudorandom pattern generation method of time-varying seed to improve the randomness of pseudorandom pattern generation. In addition, in combination with the D algorithm, this work proposes a new switching logic between two algorithms by counting invalid pattern proportions. When the algorithm is applied to track a circuit netlist, the fault coverage can reach near 100%. However, the large-scale circuit fault coverage cannot easily reach 100%. The test results for the standard circuits of different sizes show that at the same time, compared with the independent pattern generation methods, the proposed algorithm can improve fault coverage by more than 50% and 30% and significantly improve the pattern generation efficiency. Therefore, it can be used perfectly in the subsequent construction of high-speed railway equipment test platforms.

Transfer Characteristics Analysis of Single Electron Transistor

Single Electron Transistor is often referred to as a nanometer scale because it can be made very small and can detect the movement of individual electrons. However, the SET has a high input impedance, low voltage gain, and is sensitive to random background charges. The Transfer characteristics features of a SET are calculated by analyzing the different resistance of the tunnels and the tunneling capacitance. Tunneling method is considering a stochastic process, and the state master equation is solving to calculate the free energy change. There are some unusual variations that set the limit for parallel circuit parameters for proper operation. The SET can maintain its scalability and control the movement of individual electrons. In this paper, we have provided a comparative and simulated study of standard CMOS device, SET and hybrid circuits such as a switched capacitor filter.

Graph-|Q⟩⟨C|, a Graph-Based Quantum/Classical Algorithm for Efficient Electronic Structure on Hybrid Quantum/Classical Hardware Systems: Improved Quantum Circuit Depth Performance.

We present a procedure to reduce the depth of quantum circuits and improve the accuracy of results in computing post-Hartree-Fock electronic structure energies in large molecular systems. The method is based on molecular fragmentation where a molecular system is divided into overlapping fragments through a graph-theoretic procedure. This allows us to create a set of projection operators that decompose the unitary evolution of the full system into separate sets of processes, some of which can be treated on quantum hardware and others on classical hardware. Thus, we develop a procedure for an electronic structure that can be asynchronously spawned onto a potentially large ensemble of classical and quantum hardware systems. We demonstrate this method by computing Unitary Coupled Cluster Singles and Doubles (UCCSD) energies for a set of [H2]n clusters, with n ranging from 4 to 128. We implement our methodology using quantum circuits, and when these quantum circuits are processed on a quantum simulator, we obtain energies in agreement with the UCCSD energies in the milli-hartree energy range. We also show that our circuit decomposition approach yields up to 9 orders of magnitude reduction in the number of CNOT gates and quantum circuit depth for the large-sized clusters when compared to a standard quantum circuit implementation available on IBM's Quantum Information Science kit, known as Qiskit.

State-of-the-Art Light to Digital Converter Circuits Applicable in Non-Invasive Health Monitoring Devices to Combat COVID-19 and Other Respiratory Illnesses: A Review.

In the past few years, a tremendous advancement in the outcome of biomedical circuits and systems has been reported. Unfortunately, at the time of the sudden outbreak of COVID-19, the electronic engineering researchers felt dearth on their side to combat the pandemic, as no such immediate cutting-edge solutions were ready to recognize the virus with some standard and smart electronic devices. Likely, in this paper, a detailed comparative and comprehensive study on circuit architectures of the biomedical devices is presented. Mostly, this study relates the industry standard circuit schemes applicable in non-invasive health monitoring to combat respiratory illnesses. The trending circuit architectural schemes casted-off to tapeout non-invasive health-care devices available in the past literature are meticulously and broadly discussed in this study. Further, the comprehensive comparison of the state of art of the device performance in terms of supply voltage, chip area, sensitivity, dynamic range, etc. is also shown in this paper. The inclusive design processes of the health monitoring devices from Lab to Industry is thoroughly discussed for the readers. The authors think, that this critical review summarising all the trending and most cited health-care devices in a single paper will alternately help the industrialists to adapt and modify the circuit architectures of the health monitoring devices more precisely and straightforwardly. Finally, the demand for health monitoring devices particularly responsible to detect respiratory illnesses, measuring blood pressure and heart-rate is growing widely in the market after the the incident of COVID-19 and other respiratory diseases.

A Novel Technique for Temporary Right Ventricular Support Using the Existing Cardiopulmonary Bypass Circuit During LVAD Implantation

<h3>Purpose</h3> Right heart failure following implantation of left ventricular assist devices (LVADs) occurs in 9-42% of patients. A variety of predictive models allow for selection of patients at high-risk for early RV failure. We sought to develop a technique to provide temporary right heart support using a centrally cannulated cardiopulmonary bypass (CPB) circuit during the LVAD implantation procedure. <h3>Methods</h3> Patients at high-risk for RV failure during LVAD implantation were supported by a modified CPB circuit. The objective was to separate from CPB without the need for a percutaneous or durable right ventricular assist device (RVAD). A standard CPB circuit was altered to include three bridges with the ability to exclude the venous reservoir, oxygenator, and arterial filter (Figure 1). Prior to weaning from CPB, a cannula was placed into the main pulmonary artery and connected to the arterial limb. This configuration enabled the circuit to easily transition between standard CPB, a RVAD, or both. Following wean from CPB and reversal of coagulopathy, the RVAD configuration allowed for delivery of blood while supporting the RV. <h3>Results</h3> From 2019 to 2021 four patients were identified at a single institution. Pre-operative mean clinical values included central venous pressure (CVP) of 16mmHg ± 3.9, pulmonary capillary wedge pressure (PCWP) of 25.3mmHg ± 2.8, tricuspid annular plane systolic excursion (TAPSE) of 1.2cm ± 0.28, right ventricular stroke work index (RVSWI) of 315 ± 41.2, and CVP/PCWP 0.63 ± 0.11. All patients were successfully weaned from CPB to LVAD support at the time of surgery. <h3>Conclusion</h3> We present a novel method of CPB weaning during LVAD implantation that allows for RV support. This configuration is easy to implement using a standard CPB circuit and serves as an immediate bridge for patients at high-risk for early RV failure. Furthermore, this technique avoids the RV strain that occurs with volume resuscitation while weaning from CPB and correcting coagulopathy.

Design and Tuning of Extracted-Pole Filters With Non-Resonant Nodes by Circuit Model Extraction

This article proposes an analytical circuit model extraction technique for extracted-pole filters with nonresonant nodes (NRNs). The circuit model is described by a generalized coupling matrix incorporating both resonant nodes and NRNs. It is shown that, in most cases, Y-parameter polynomials of extracted-pole filters with NRNs take the same form as those of coupled-resonator filters. Thus, the model-based vector fitting technique can be applied to obtain legitimate rational function approximation to measured or simulated S-parameter data, and then, a circuit model in the correct form can be synthesized accordingly. This article discusses different possible arrangements of extracted-pole sections to develop a general solution to the circuit model extraction problem. It also defines a standard circuit form to rule out multiple solutions in the circuit model extraction problem for guiding the computer-aided design and tuning process. A combline filter design and a waveguide filter tuning example are presented to demonstrate the application of the circuit model extraction technique. These examples show that simple mapping relationships exist between extracted circuit parameters and physical elements. Thus, accurate dimensioning of extracted-pole filters can be accomplished without electromagnetic optimization in the design phase. Filter fine-tuning can be done by inexperienced operators or an automatic tuning machine with the circuit model extraction technique.

Investigation of a nonlinear piezoelectric energy harvester with advanced electric circuits with the finite element method

In this contribution, a system simulation method based on the finite element method (FEM) is applied to simulate a strongly coupled bimorph piezoelectric vibration-based energy harvester (PVEH) with various nonlinear, non-ideal and active circuits: The standard circuit, the synchronized switch harvesting on inductor circuit and the synchronized electric charge extraction circuit are considered. Furthermore, nonlinear elastic behavior of the piezoelectric material is taken into account and harmonic base excitations of different magnitudes at a fixed frequency are applied. The holistic FEM-based system simulation approach solves the complete set of piezoelectric equations together with the equation of the electric circuit such that all electromechanical coupling phenomena are taken into account. This fully coupled numerical analysis enables the detailed evaluation of the influences of the electric circuits on the vibrational behavior and the harvested energy of the PVEH with respect to the magnitude of base excitation. Results from literature on the efficiency of electric circuits are confirmed and interactions between mechanical and electrical nonlinearities of PVEHs are revealed.Article highlightsSystem simulations of a mechanically and electrically nonlinear piezoelectric energy harvester are performed using only one software tool.The infuence of electric circuits on the vibration behavior and the effciency of an energy harvester are investigated in detail.Interactions between mechanical and electrical nonlinearities of an energy harvester are revealed.

Self-Adaptive Pendulum-Ball Switches for Piezoelectric Synchronous-Extraction Circuits.

Electronic synchronous switches are usually used to enhance the performance of piezoelectric energy-extraction circuits, but the electronic components leading to additional power consumption are not desired for energy extraction. In view of the advantage of mechanical switches without power consumption, this article proposed a synchronous-switch circuit which can adapt to the amplitude of a cantilever-beam-vibration generator with less energy loss. This mechanical switch consists of two pendulum balls and two buffer springs. This switch mechanism can automatically adapt to the cantilever-displacement amplitude, control the closing and opening of switches with the decrease in phase advance angle, and increase in energy-extraction efficiency. Different from previous adaptive mechanical switches, this unique pendulum-ball mechanism can not only reduce the weight and volume of the generator to improve the energy density, but can also simply adjust the pendulum length to achieve better harvesting performance. It is verified experimentally that the adaptive mechanical switch can close and open automatically under different cantilever amplitudes and excitation frequencies; the results show that the optimal power of the proposed circuit can reach 4.2 times that of the standard circuit. In order to further optimize the adaptive mechanical switch, the parameters of the swing-ball mechanism affecting harvesting performance is analyzed.

Modified Bain's Circuit as an Alternate to Non-invasive Ventilation in COVID 19.

IntroductionCOVID-19 is a pandemic that severely affects the lungs. Symptomatically affected individuals often become severely hypoxic, requiring non-invasive ventilation. The scarcity of resources in resource-compromised countries like India led to the adoption of novel strategies like using Bain’s circuit for assisting spontaneous ventilation. This study compares the outcome when a standard circuit is replaced with a shortened Bain’s circuit.Aims and objectivesTo compare shortened Bain’s circuit and bilevel positive airway pressure (BiPAP) in spontaneously ventilated COVID 19 patients with regards to effects on hemodynamic stability and efficacy of ventilation using blood gas analysis.MethodologyTwenty-four COVID patients aged between 35-70 years, requiring non-invasive ventilation but not tolerating BiPAP or not improving on BiPAP were enrolled in the study. Baseline heart rate and arterial blood gases (ABG) were recorded. Patients were then ventilated using shortened Bain’s circuit. Heart rate and ABG were then recorded two hours after ventilation.ResultsHemodynamic and blood gas parameters were comparable between the two groups at baseline and on BiPAP. Group A showed better hemodynamic and blood gas profiles compared to group B, but the difference was not statistically significant because of small sample size.ConclusionShortened Bain’s circuit may be a viable alternative to non-invasive ventilation in spontaneously breathing hypoxic patients with efficacy comparable to a standard Bain’s circuit and reduced chances of carbon dioxide retention. Studies with a larger sample size are needed to further validate the conclusion.

Electromagnetic Side-Channel Hardware Trojan Detection Based on Transfer Learning

Hardware Trojan detection method has been given particular attentions by hardware security researchers since the failure of Syrian radars in 2007. Electromagnetic side-channel analysis is a promising method which is widely used in practice due to its advantage of efficiency, non-touch and high accuracy. In this brief, we propose a novel method using electromagnetic side-channel signal for hardware Trojan detection by transfer learning. Firstly, time-frequency information of electromagnetic signal is extracted by continuous wavelet transform to take full advantage of useful information in time domain and frequency domain. Then, time-frequency information is fed to transfer learning network to get the classification result. In order to further improve the result, we use transfer learning to further extract the key features in time-frequency information. Finally, the key features are classified by the support vector machine to improve the accuracy. The experiment is conducted on a stand FPGA board and advanced encryption standard circuit is used as the benchmark circuit. Experimental results show that our methods can improve the result efficiently.

Multiplet supercurrent in Josephson tunneling circuits

The multi-terminal Josephson effect allows DC supercurrent to flow at finite commensurate voltages. Existing proposals to realize this effect rely on nonlocal Andreev processes in superconductor-normal-superconductor junctions. However, this approach requires precise control over microscopic states and is obscured by dissipative current. We show that standard tunnel Josephson circuits also support multiplet supercurrent mediated only by local tunneling processes. Furthermore, we observe that the supercurrents persist even in the high charging energy regime in which only sequential Cooper transfers are allowed. Finally, we demonstrate that the multiplet supercurrent in these circuits has a quantum geometric component that is distinguishable from the well-known adiabatic contribution.

Dynamic Online Grid Impedance Estimation and Its Effects on DC Capacitor Lifetime in Variable Frequency Drive

Grid impedance plays a significant role in the performance and design considerations of nonlinear devices like Variable Frequency Drive (VFD). VFD operates across domestic, industrial, and residential applications under different grid configurations and capacities including renewables. IEEE 519 standard recommends grid short circuit ratio and thereby grid impedance as an index for the individual and overall current harmonic performance of the connected utilities. This research investigation details a comprehensive approach for an online dynamic grid impedance estimation and may also give an insight into the hardware implementation within a VFD to achieve optimum performance and reliability during installation. A VFD of 250 kW is used for real-time measurements and simulation with varying grid configurations to determine grid impedance and lifetime of the DC capacitors. A fuzzy model is developed based on the established knowledge base for the estimation of the grid impedance of a generic grid. The fuzzy model is also developed to estimate the lifetime of the DC capacitor.

Design and Analysis of a Photon Counting System Using Covered Single-Photon Avalanche Photodiode

A photon counting system using covered single-photon avalanche diode (SPAD) based on a standard integrated circuit (IC) process ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> ) is designed and analyzed in this work. The SPAD is formed using the medium voltage (MV) doping layers of the process. To reduce the dark count rate (DCR) in the SPAD, a shaded SPAD with the same structure is fabricated on the same chip which is covered by a metal layer and only providing DCR for the DCR correction. This DCR provided by the shaded SPAD can also be used for the real time on chip monitoring of some other parameters, such as temperature, breakdown voltage, and afterpulsing probability. Experimental results show that the SPAD developed is able to detect the visible light from 450 to 850 nm with a 35% peak photon detection probability (PDP) achieved at around 550 nm with a bias voltage of 16 V (excess voltage of 3 V). A timing jitter of 176 ps is measured with an excess voltage of 3 V. The DCR in the SPAD tested is about 1.38 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 1 V and 14.62 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with the excess bias voltage of 3 V without the DCR correction. Results also show that a reduction of more than 85% in the DCR (background noise) can be achieved when the DCR correction is applied resulting in a DCR of 1.68 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 3 V. By monitoring the DCR of the shaded SPAD, the breakdown voltage and temperature of other on chip SPAD can be measured. The potential usefulness of the afterpulsing probability monitoring using the shaded SPAD and the crosstalk probability (CTP) between SPADs on the chip are analyzed. In addition, the effects of process variations on the SPAD performance are investigated by testing ten chips with the same SPADs fabricated, and a potential method is proposed for alleviate the process variations in the SPAD arrays.

ЧАСТОТНИЙ АНАЛІЗ СИГНАЛІВ ПРИ ДІАГНОСТУВАННІ ЦИФРОВИХ ТЕЗ ЕНЕРГОДИНАМІЧНИМ МЕТОДОМ

The article analyzes the type of energy-dynamic pulses in the space-time and frequency-spectral domains to improve the diagnostic process of digital standard replacement elementswith large integrated circuits and microprocessor-based large integrated circuits in their design.Creation of new and improvement of existing systems used to determine the technical condition of digital devices in complex conditions requires the development of new methods of diagnosis. This is due to the high complexity of radio-electronic equipment and the shortage of decision time when carrying out technical state control.In the scientific and technical literature on the development and operation of radio electronic equipment, the main attention is paid to the study of the possibility of minimizing the average recovery time and cost of means of diagnostics of the radio electronic equipment object.The main factor holding back the development of modern technical diagnosis systems is the lack of a methodological apparatus capable of significantly more effective use of developed diagnostic models to identify faulty logical elements. Application of the proposed scientific approaches to the processing of diagnostic information will allow: to determine in advance the elements whose characteristics are approaching critical; to determine the technical condition of radio electronic equipment in real time; to monitor the serviceability of elements of radio electronic equipment.It will also allow for more accurate processing of diagnostic parameter values, forecasting failure times of radio electronic components with a given reliability.This, in its turn, will lead to decrease of detection time of sudden failures of radio-electronic facilities and considerably reduce time spent on restoration of digital standard replacement elements of radio-electronic equipment, requirements to which are constantly growing in conditions of repulsion of the russian aggression by the Armed Forces of Ukraine.

Short Circuit Analysis on AHTS Ship Due To Use of Closed Circuit Electrical System

Dynamic Positioning (DP) enables a ship to automatically maintain a vessel’s position and heading by using its own propellers and thrusters. The position can be kept optimally when the ship leans on the harbour with the assistance of the anchoring and mooring process. Under particular circumstances, when the ship is in the middle of the sea, both of the processes can’t be done optimally. To ensure the ships absolute position, the ship must have zero six degrees of motion: heave, sway, surge, roll, pitch and yaw, in which the vessel must be in absolute idle despite the wave effect. The DP is used to articulate wave force and against it by a work of mechanism and sensor in which prevents the ship’s standpoint deviates. The computer will proceed with the information, articulate a levelised thruster work, and avoid any degrees of motion from becoming non-zero. Ship equipped with this DP system generally uses split bus configuration in the electricity system, by allowing one load supplied by one independent generator to improve its reliability. However, this configuration was deficient with the efficient aspect and high emissions caused by the power supply. With the application of closed bus configuration electricity system, there is a high potential of excess current influx, which causes short circuit current. The analysis of how much short circuit current happened on the electricity system of AHTS ship is to revolve the short circuit current, and thus resulting in electrical system failure. Based on the analysis that has been done, the configuration electricity system with 1 generator supply power thruster and two diesel generator, also the load that used is two bow thruster and 60% shipload having short circuit based of the standard short circuit for low voltage electricity.

Isolated Flying Capacitor Multilevel Converters

This paper presents the topology known as the isolated flying capacitor multilevel flyback converter (FCMFC). The topology uses isolated flying capacitors (FC) for high-gain, DC-DC power conversion while maintaining primary-secondary isolation and improving the efficiency and capability of a standard flyback transformer circuit. Three converters have been developed and tested, one flyback as a control, a 3 level FCMFC, and a 4 level FCMFC to prove the gain and efficiency benefits of this new topology. The FCMFC prototypes achieve higher gain and efficiencies relative to a flyback design utilizing the same off-the-shelf transformer. The stress of the input and output switches is reduced because of the fractioning of the output voltage across multiple output stages, allowing future iterations to utilize lower-rated components. The operating parameters are 5V to 40V boosting for a 10W load at 250kHz. Utilizing the same semiconductor components, the flyback converter control prototype achieves 78&#x0025; efficiency while the proposed FCMFC converters reach 85&#x0025; and 82&#x0025; efficiency, even with the added isolated power, gate drive, and bootstrap circuitry. The FCMFCs have a multiplying effect on the gain of the traditional flyback which also increases near the 90&#x0025; duty cycle flyback threshold. Additional testing was done at light load and at 100kHz, 250kHz, 452kHz, and 500kHz.