Spin Transfer Torque Magnetic Random Access Memory Research Articles

Computing in Memory With Spin-Transfer Torque Magnetic RAM

In-memory computing is a promising approach to addressing the processor-memory data transfer bottleneck in computing systems. We propose spin-transfer torque compute-in-memory (STT-CiM), a design for in-memory computing with spin-transfer torque magnetic RAM (STT-MRAM). The unique properties of spintronic memory allow multiple wordlines within an array to be simultaneously enabled, opening up the possibility of directly sensing functions of the values stored in multiple rows using a single access. We propose modifications to STT-MRAM peripheral circuits that leverage this principle to perform logic, arithmetic, and complex vector operations. We address the challenge of reliable in-memory computing under process variations by extending error-correction code schemes to detect and correct errors that occur during CiM operations. We also address the question of how STT-CiM should be integrated within a general-purpose computing system. To this end, we propose architectural enhancements to processor instruction sets and on-chip buses that enable STT-CiM to be utilized as a scratchpad memory. Finally, we present data mapping techniques to increase the effectiveness of STT-CiM. We evaluate STT-CiM using a device-to-architecture modeling framework, and integrate cycle-accurate models of STT-CiM with a commercial processor and on-chip bus (Nios II and Avalon from Intel). Our system-level evaluation shows that STT-CiM provides the system-level performance improvements of 3.93 times on average (up to 10.4 times), and concurrently reduces memory system energy by 3.83 times on average (up to 12.4 times).

Modeling and Analysis of Magnetic Field Induced Coupling on Embedded STT-MRAM Arrays

Spin transfer torque magnetic random access memory (STT-MRAM) is an emerging memory technology which exhibits nonvolatility, high density, high endurance, and nano-second read and write times. These characteristics make STT-MRAM suitable for last-level cache and other embedded applications. The STT-MRAM bit-cell consists of a magnetic tunnel junction (MTJ) which is composed of two ferromagnetic layers (free and fixed layers) and one insulating layer in between. As STT-MRAM arrays become denser to meet cost and requirements of high performance computing, the distance between adjacent MTJ bits reduces. This aggravates the magnetic coupling from free and fixed layer of one MTJ bit to its neighbors. Even though magnetic coupling is expected to become stronger as MTJ scales down, its impacts on static and dynamic properties on MTJ is relatively unexplored. In this paper, we present a model of the magnetic field coupling in high-density MTJ arrays for three different types of MTJ stacks and evaluate the effect of magnetic field induced coupling on static and dynamic properties. Lastly, we show how process induced variations in MTJ characteristics affect the magnitude of magnetic coupling and their effect on the electrical characteristics of the STT-RAM arrays.

Micromagnetic Analysis of Statistical Switching in Perpendicular Magnetic Tunnel Junctions With Double Reference Layers

The recent technological realization of perpendicular magnetic tunnel junctions (MTJs) with two reference layers has opened a new route for scaling the overall size of spin-transfer torque magnetic random-access memory. This is because, for an antiparallel configuration of the magnetization of the reference layers, the two spin-transfer torques add constructively, giving rise to more efficient switching processes of the free layer magnetization as compared to a single MTJ. We use full micromagnetic simulations to study the magnetization switching of a double MTJ. The probability distribution function (PDF) of the switching time is the same for both switching processes (parallel to antiparallel and vice versa), and the PDF approaches a Gaussian shape for switching time smaller than 1 ns. The dynamical performance (achieved for switching time below 1 ns) of double MTJs with circular shape and diameter ranging from 30 to 14 nm is comparable. Compared to full micromagnetic data, computations of the PDF within the macrospin approximation show an overestimation of the skewness for MTJ with circular shape and diameter of 30 and 20 nm, whereas they are very close for 14 nm diameter, as expected. The proper micromagnetic model and a PDF comparison can drive the design of hybrid magnetic-CMOS systems.

Mitigating BTI-Induced Degradation in STT-MRAM Sensing Schemes

Spin-transfer torque magnetic RAM (STT-MRAM), which uses a magnetic tunnel junction to store binary data, is a promising memory technology. With many benefits, such as low leakage power, high density, high endurance, and nonvolatility, it has been explored as an SRAM replacement for cache design or a DRAM replacement for main memory. Meanwhile, along with the continuous shrinking of CMOS process technology, the bias temperature instability (BTI) effect has become a major reliability issue. Prior work has investigated the influence of the BTI effect on the SRAM sense amplifier, but no investigation has been done for the STT-MRAM sense amplifier. Therefore, this paper investigates the BTI effect on STT-MRAM sense amplifiers. We propose a majority-based technique and an alternative sensing technique to reduce circuit degradation. To further improve sensing delay, we propose using forward body bias (FBB) on an access transistor with a positive voltage. Extensive simulation results are done to show the effectiveness of the proposed techniques. The sensing delay for reading zeros and ones can be reduced by 10.61% and 4.35%, respectively, on average, with the majority-based technique. The sensing delay for reading zeros and ones can be reduced by 4.42% and 1.83%, respectively, on average, using the alternative sensing technique. The sensing delay for reading zeros and ones can be reduced by 15.37% and 6.25%, respectively, on average, by using both techniques simultaneously. When using the majority-based and alternative sensing techniques with the FBB technique, the sensing delay for reading zeros and ones can be improved by 29.93% and 57.67%, respectively, on average. We also analyze the BTI-induced degradation of a high-performance sense amplifier and a low power sense amplifier with the proposed techniques. The simulation results show that our proposed technique and simulation flow can be easily extended to other sense amplifiers.

Perpendicular magnetic anisotropy in Mn2VIn (001) films: An ab initio study

First principles study of the magnetic anisotropy of Mn2VIn (001) films show perpendicular magnetic anisotropy (PMA), which increases as a function of the thickness of the film. Density functional theory (DFT) as implemented in the Vienna Ab initio simulation package (VASP) is employed here to perform a comprehensive theoretical investigation of the structural, electronic and magnetic properties of the Mn2VIn(001) films of varying thickness. Our calculations were performed on fully relaxed structures, with five to seventeen mono layers (ML). The degree of spin polarization is higher in the (001) Mn2VIn thin films as compared to the bulk in contrast to what is usually the case and as in Mn2VAl, which is isoelectronic to Mn2VIn as well as inCo2VIn (001) films studied for comparison. Tetragonal distortions are found in all the systems after relaxation. The distortion in the Mn2VIn system persists even for the 17ML thin film, resulting in PMA in the Mn2VIn system. This significant finding has potential to contribute to spin transfer torque (STT) and magnetic random access memory MRAM applications, as materials with PMA derived from volume magnetocrystalline anisotropy are being proposed as ideal magnetic electrodes.

Effect of Geometrical Modulation on pMTJ Magnetization Reversal

Spin-transfer torque-magnetic random access memory (STT-MRAM) is one of the most prominent spintronic devices for replacing conventional electronic memory devices due to its extraordinary performance as it delivers fast operational speed, non-volatility, and a high-memory density. At advanced technology nodes, manufacturing process would invariably lead to bit on bit variation of STT-MRAM cell at wafer level. Here, we show that in a perpendicularly magnetized magnetic tunnel junction (MTJ), the in-plane demagnetizing tensor greatly influences the magnetization switching process of the free layer (FL). The geometrical asymmetricity was introduced to induce a varying in-plane demagnetizing field. This impacts the stability of the MTJ and requires a larger anisotropy to sustain an out-of-plane magnetization state. Interestingly, a faster switching of the FL comprising the MTJ is observed. This resultant rapid switching is ascribed to the nucleation of a reversal embryo at the defect.

Novel Magnetic Tunneling Junction Memory Cell With Negative Capacitance-Amplified Voltage-Controlled Magnetic Anisotropy Effect

The high current density required by magnetic tunneling junction (MTJ) switching driven by the spin transfer torque (STT) effect leads to large power consumption and severe reliability issues, hindering the timetable for STT magnetic random access memory to mass market. By utilizing the voltage-controlled magnetic anisotropy (VCMA) effect, the MTJ can be switched by the voltage effect and is postulated to achieve ultralow power (fJ). However, the VCMA coefficient measured in experiments cannot meet the requirement for MTJ with dimensions below 100 nm. And an external in-plane magnetic field usually is demanded for precessional VCMA switching. Here, in this paper, a novel approach for the amplification of the VCMA effect, which borrows ideas from negative capacitance, is proposed. The feasibility of the proposal is proved by physical simulation and in-depth analysis. Since the amplified VCMA effect, the external magnetic field can be eliminated. A three-terminal novel MTJ memory cell is designed with which both low power and high speed can be achieved.

Cascaded Channel Model, Analysis, and Hybrid Decoding for Spin-Torque Transfer Magnetic Random Access Memory

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising non-volatile memory technology widely considered to replace dynamic random access memory (DRAM). However, there still exist critical technical challenges to be tackled. For example, process variation and thermal fluctuation may lead to both write errors and read errors, severely affecting the reliability of the memory array. In this paper, we first propose a novel cascaded channel model for STT-MRAM that facilitates fast error rate simulations and more importantly the theoretical design and analysis of memory sensing and channel coding schemes. We analyze the raw bit error rate and probabilities of dominant error events, and derive the maximum likelihood decision criterion and the log-likelihood ratio of the cascaded channel. Based on these works, we further propose a two-stage hybrid decoding algorithm for extended Hamming codes for STT-MRAM. Simulation results demonstrate the effectiveness of the proposed hybrid decoding algorithm for improving the reliability of STT-MRAM in the presence of both write errors and read errors and supporting its potential applications, such as replacing DRAM.

Control of Interlayer Exchange Coupling and Its Impact on Spin–Torque Switching of Hybrid Free Layers With Perpendicular Magnetic Anisotropy

To ensure data retention in high-density spin-transfer-torque magnetic random access memory (STT-MRAM), a [Co/Ni]-CoFeB hybrid free layer (HFL) with a high energy barrier was proposed for small-dimension magnetic tunnel junctions. Its behavior on device level, however, needs further research. In particular, the impact of the interlayer that provides magnetic coupling between the [Co/Ni] multilayers and the CoFeB on the spin-torque switching is not known. In this paper, both macrospin modeling and micromagnetic simulations are used to study the influence of interlayer exchange coupling (IEC) on the switching behavior of the HFL for different device sizes. Both methods provide the optimal value for the coupling constant ( $J_{{\mathrm{ ex}},o}$ ) and switching current ( $J_{{\mathrm{ sw}},o}$ ), as well as their size dependence, to realize HFL switching with the lowest energy consumption. In addition to the simulations, control of the IEC in the HFL by introducing a TaCoFeB interlayer and a Co termination layer on the [Co/Ni] part is shown, and a broad $J_{{\mathrm{ ex}},o}$ range is achieved without compromising the magnetotransport properties of the stacks. Both simulations and experimental work show that the HFL design with adequate interlayer engineering can be a viable route for high-density STT-MRAM devices and other spintronic applications.

Recent Developments in Spin Transfer Torque MRAM

Spin transfer torque (STT) switching‐based magnetic random access memory (MRAM) is gaining significant industrial and academic attention due to its potential application as a non‐volatile memory device in computing devices, smartphones, and so on. STT‐MRAM devices with in‐plane magnetization configuration have been marketed as niche products. Devices with out‐of‐plane magnetization are being considered for embedded memory as the first step. Aggressive goals include replacing dynamic random access memory (DRAM) with STT‐MRAM. This review article introduces the basics of STT‐MRAM and describes the recent progress in overcoming certain challenges such as reduction of power consumption and increase of storage density, which will make it a strong competitor for DRAM.

Extending multi‐level STT‐MRAM cell lifetime by minimising two‐step and hard state transitions in hot bits

Shifting market trends towards mobile, Internet of things, and data-centric applications create opportunities for emerging low-power non-volatile memories. The attractive features of spin-torque-transfer magnetic-RAM (STT-MRAM) make it a promising candidate for future on-chip cache memory. Two-bit multiple-level cell (MLC) STT-MRAMs suffer from higher write energy, performance overhead, and lower cell endurance when compared with single-level counterpart. These unwanted effects are mainly due to write operations known as two-step (TT) and hard transitions (HT). Here, the authors offer a solution to tackle write energy problem in MLC STT-MRAM by minimising the number of TT and HT transitions. By analysing real applications, it was observed that specific locations within a cache block undergo much more TT and HT transitions resulting in hot locations when compared with other ones (cold locations). These hot locations are more detrimental to the lifetime and reliability of MRAM device. In this work, the authors propose a simple and intuitive dynamic encoding scheme that eliminates all TT and HT at hot locations, hence reducing energy consumption and improving MLC STT-MRAM lifetime. Results on PARSEC benchmarks demonstrate the effectiveness and scalability of the proposed approach to potentially prolong MLC STT-MRAM lifetime.

Fully Programmable Redundancy Circuits for STT-MRAM

We propose fully programmable redundancy schemes for spin-transfer-torque magnetic random access memories (STT-MRAMs). To store redundancy information, these schemes use magnetic tunnel junctions (MTJs), which are core memory elements of STT-MRAMs. This can greatly simplify the fabrication process of STT-MRAMs. Furthermore, it also allows reprogramming of the redundancy information after packaging or even during normal use by end-users without requiring any special high-voltage setup. We propose two redundancy schemes. First, we propose an address comparator, which uses MTJs and is a direct replacement of a conventional address comparator. Second, we propose a scheme in which the redundancy circuits share the storage cells and read–write peripheral circuits with the normal data array structure.

Double MgO Based Perpendicular Magnetic-Tunnel-Junction Spin-Valve without Upper Synthetic-Anti-Ferromagnetic Multi-Layers

Recently, the semiconductor memory device has faced the difficulties of scaling down, low power consumption and high retention time. In particular, dynamic random access memory (DRAM) has been struggling with scaling limit because of reducing capacitor area. In addition, alternative memories have been studied intensively to replace DRAM. Among them, perpendicular spin transfer torque magnetic random access memory (STT-MRAM) is considered as a strong candidate because of the small scaling down, low power consumption, high read and write speed and non-volatility. STT-MRAM has the structure of 1 transistor and 1 resistance (1T-1R) called magnetic tunnel junction (MTJ). Resistance difference between parallel and antiparallel states in MTJ indicates memory sensing margin. The large difference of tunneling magneto-resistance (TMR) is required for a good memory operation. To obtain the high TMR ratio, not only perfect switching of the free layer but also hard pinning of the pinned layer is required. It is known that pinning the pinned layer is due to the exchange coupling induced by a synthetic anti-ferro-magnetic (SyAF) layer based on Ruderman Kittel Kasuya Yosida (RKKY) interaction. In our study, therefore, we investigated how to optimize the SyAF layer structure for the proper exchange coupling. MgO tunnel barrier should be b.c.c (100) crystallinity because it acts as an electrons filter which determined whether spin direction between free and pinned layers is aligned parallel or not. In particular, we propose double MgO based perpendicular magnetic-tunnel-junction spin-valve without upper synthetic-anti-ferromagnetic Multi-layers in order to obtain high TMR ratio. In addition, we investigated the different characteristics of the p-MTJ spin-valve with and without upper SyAF multi-layers. For the experiment, two structures, double MgO based p-MTJ spin-valve with and without upper SyAF multi-layers, were fabricated on a 12-inch-diameter wafer deposited with SiO2/W/TiN films in a 12-inch multi-chamber sputtering system under a high vacuum of less than 1ⅹ10-8 torr (without breaking the vacuum; see Figs. 1a and b). The thicknesses of the tungsten (W) were varied ranging from 0.18 to 0.48 nm. All samples were subject to ex-situ annealing at 350oC for 30 min under a perpendicular magnetic field of 3 Tesla. The dependence of the TMR ratio on the thickness of W bridge layer was estimated by using current-in-plane tunneling (CIPT) at room temperature as shown in Fig.1c. It shows that a TMR ratio of p-MTJ spin-valve with upper SyAF multi-layers slightly increases at the bridge layer thickness, t w up to around 0.3 nm. Then it abruptly decreases when the thickness was increased from 0.36 to 0.5 nm. On the other hand, the TMR ratio of p-MTJ spin-valve without upper SyAF multi-layer increases at the t w up to around 0.24 m. Then, the TMR ratio abruptly decreases when the thickness was increased from 0.36 to 0.4 nm. And maximum TMR ratio of p-MTJ spin-valve with upper SyAF multi-layers is 156 % while, that of p-MTJ spin-valve without upper SyAF multi-layers is 180 %. Obviously, the TMR ratio of p-MTJ spin-valve without upper SyAF multi-layers is higher 24 % than p-MTJ spin-valve wih upper SyAF multi-layers. In our presentation, we report the different characteristics of the p-MTJ spin-valve with and without upper SyAF multi-layers by examining the static magnetization behavior, MgO crystallinity, and I-V characteristic curve. In addition, we present how these properties influence the TMR ratio and mechanism of p-MTJ spin-valve. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Figure 1

3D Cross-Point Spin Transfer Torque Magnetic Random Access Memory

We explore a 3D cross-point spin transfer torque magnetic random access memory (STT-MRAM) array based on the integration of a perpendicular magnetic tunneling junction (pMTJ) with a matching two-terminal selector. The integrated two-terminal device provides a unique opportunity for a high density, low cost stackable storage class memory that can achieve a fast operation speed, long data retention, low bit error rate (BER) and high endurance. 55[Formula: see text]nm size pillar shaped pMTJ and selector devices have been fabricated and characterized. The selector is compatible with pMTJ whether it is in the high or low resistance state. The pMTJ can be RESET and SET after the selector turns on. We model the dynamic switching of the coupled pMTJ and selector devices. Our model shows the importance of the optimal matching of pMTJ magnetic properties with selector resistive properties to achieve high performance.

Perpendicular magnetic anisotropy at transition metal/oxide interfaces and applications

Spin electronics is a rapidly expanding field stimulated by a strong synergy between breakthrough basic research discoveries and industrial applications in the fields of magnetic recording, magnetic field sensors, nonvolatile memories [magnetic random access memories (MRAM) and especially spin-transfer-torque MRAM (STT-MRAM)]. In addition to the discovery of several physical phenomena (giant magnetoresistance, tunnel magnetoresistance, spin-transfer torque, spin-orbit torque, spin Hall effect, spin Seebeck effect, etc.), outstanding progress has been made on the growth and nanopatterning of magnetic multilayered films and nanostructures in which these phenomena are observed. Magnetic anisotropy is usually observed in materials that have large spin-orbit interactions. However, in 2002 perpendicular magnetic anisotropy (PMA) was discovered to exist at magnetic metal/oxide interfaces [for instance Co(Fe)/alumina]. Surprisingly, this PMA is observed in systems where spin-orbit interactions are quite weak, but its amplitude is remarkably large—comparable to that measured at Co/Pt interfaces, a reference for large interfacial anisotropy (anisotropy ∼1.4 erg/cm2 = 1.4 mJ/m2). Actually, this PMA was found to be very common at magnetic metal/oxide interfaces since it has been observed with a large variety of amorphous or crystalline oxides, including AlOx, MgO, TaOx, HfOx, etc. This PMA is thought to be the result of electronic hybridization between the oxygen and the magnetic transition metal orbit across the interface, a hypothesis supported by ab initio calculations. Interest in this phenomenon was sparked in 2010 when it was demonstrated that the PMA at magnetic transition metal/oxide interfaces could be used to build out-of-plane magnetized magnetic tunnel junctions for STT-MRAM cells. In these systems, the PMA at the CoFeB/MgO interface can be used to simultaneously obtain good memory retention, thanks to the large PMA amplitude, and a low write current, thanks to a relatively weak Gilbert damping. These two requirements for memories tend to be difficult to reconcile since they rely on the same spin-orbit coupling. PMA-based approaches have now become ubiquitous in the designs for perpendicular STT-MRAM, and major microelectronics companies are actively working on their development with the first goal of addressing embedded FLASH and static random access memory-type of applications. Scalability of STT-MRAM devices based on this interfacial PMA is expected to soon exceed the 20-nm nodes. Several very active new fields of research also rely on interfacial PMA at magnetic metal/oxide interfaces, including spin-orbit torques associated with Rashba or spin Hall effects, record high speed domain wall propagation in buffer/magnetic metal/oxide-based magnetic wires, and voltage-based control of anisotropy. This review deals with PMA at magnetic metal/oxide interfaces from its discovery, by examining the diversity of systems in which it has been observed and the physicochemical methods through which the key roles played by the electronic hybridization at the metal/oxide interface were elucidated. The physical origins of the phenomenon are also covered and how these are supported by ab initio calculations is dealt with. Finally, some examples of applications of this interfacial PMA in STT-MRAM are listed along with the various emerging research topics taking advantage of this PMA.

Energy optimization for multi-level cell non-volatile memory using state remapping

Non-volatile Memory (NVM) is emerging as a promising technology to build future main memory or cache. Multi-level cell (MLC) NVM that stores multiple bits in a single cell has been developed in recent years. Different NVM technology has its own writing schemes to store multiple bits, and the amount of write energy varies across different states. For MLC Phase-Change Memory (PCM), the energy consumption of writing intermediate states, ‘01’ and ‘10’, is bigger than that of writing states ‘00’ and ‘11’. For MLC Spin-Transfer Torque Magnetic RAM (STT-MRAM), the energy consumption of flipping the left bit of a 2-bit cell is greater than that of flipping the right bit. To reduce the MLC NVM write energy consumption, we propose an encoding scheme to reduce the amount of intermediate states’ write for MLC PCM and another encoding scheme to decrease the number of the left bit flips for MLC STT-MRAM. The main idea of both schemes is state remapping. We find two minimum write frequency states and remap them to state ‘01’ and ‘10’ respectively for MLC PCM. In addition, for MLC STT-MRAM, we seeks the remapping decision that can minimize the number of the left bit flips and reduces the write of states ‘01’ and ‘10’. The experimental results show that the encoding scheme for MLC PCM saves 5.25% energy on average and the encoding scheme for MLC STT-MRAM saves 12.17% energy on average.

Modeling and Exploration of the Voltage-Controlled Magnetic Anisotropy Effect for the Next-Generation Low-Power and High-Speed MRAM Applications

Spin transfer torque magnetic random access memory (STT-MRAM) has been widely regarded as a potential nonvolatile memory candidate in the next-generation computer architectures. Nevertheless, the write energy consumption and delay are two significant concerns for STT-MRAM, blocking its applications for working memories. Recently, magnetic tunnel junction (MTJ) based on voltage-controlled magnetic anisotropy (VCMA) effect shows tremendous superiority in terms of dynamic write energy and delay over the STT-based one, attracting much attention for advanced low-power and high-speed MRAM designs. In this paper, we evaluate the prospects and challenges of the VCMA-MTJ devices for advanced MRAM applications. First, the magnetization dynamics of the free layer of VCMA-MTJ devices are studied by solving a modified Landau-Lifshitz-Gilbert equation. Afterward, a VCMA-MTJ electrical model is built by integrating the VCMA effect, Slonczewski STT model, Brinkman resistance model, and tunnel magnetoresistance model. Finally, three MTJ switching strategies, including precessional VCMA, STT-assisted precessional VCMA and STT-assisted thermally-activated VCMA, are studied for MRAM applications. Our results show that the STT-assisted precessional VCMA strategy is the most potential one for high-speed and low-power VCMA-MRAM design. This paper provides models, strategies, and guidelines for VCMA-MRAM design and application.

Variation-Tolerant Sensing Circuit for Ultralow-Voltage Operation of Spin-Torque Transfer Magnetic RAM

Although promising as a future memory solution, the spin-torque transfer magnetic RAM has critical drawbacks due to the small operation margin in low supply voltage and large area of the sensing circuit. To overcome these disadvantages, we propose a novel sensing circuit that utilizes the data-dependent body-bias scheme with a single reference cell. Through Monte Carlo simulations using 45-nm process technology model parameters, the proposed circuit is verified to be highly robust to the variations in threshold voltage and cell resistance at ultralow supply voltages without sensing speed degradation. The proposed circuit has a read access pass yield of 96.5% for 16-Mb memory at $\mathbf{V}_{\mathbf{DD}} = 0.7 \mathbf{V}$ when the standard deviation of cell resistance is 10%. In addition, the area overhead is also reduced by 79% compared to the conventional sensing circuit.

Nanoscale Spin-Transfer Torque MRAM Etching Using Various Gases

As the volatile dynamic random access memory (DRAM) device faces a physical limitation, new memory devices are actively investigated to solve this problem. Among them, spin transfer torque magnetic random access memory (STT-MRAM) has received a lot of attention because of its very high speed of device, endurance, low power consumption of device, and high density memory cell in addition to the non-volatility of information. Especially, the MTJ memory elements which consist of CoxFeyBz/MgO/CoxFeyBz multilayer structure are the critical building blocks for high density magnetic random access memory with high tunneling magnetoresistance(TMR). However, the dry etching of MTJ stack with sub 70 nm is a challenging step in the fabrication of STT-MRAM. The etching of nanoscale MTJ induces oxidation in magnetic layer, pattern degradation and damage or sidewall redeposition at patterned MTJ sidewall especially. In this study, for successful etching of MTJ and MTJ related materials, RIB (reactive ion beam) etching using NF3, CH3OH, and CO/NH3 gas mixture and ICP etching using Ar, He, CO/NH3 and so on were conducted. Etch characteristics of magnetic tunnel junction (MTJ) stacks masked with W were investigated precisely using field emission scanning electron microscopy (FE-SEM) and TEM (Transmission electron microscopy). Simulation of MTJ material and hardmask material was conducted with SRIM simulation to observe tendency with etch process of blank unit thin film samples. In addition, the magnetic hysteresis curves were analyzed by a vibrating sample magnetometer (VSM). The results showed that, among the various gas combinations, the use of He gas improved etch selectivity of MTJ materials over W and also improved the etch profile of MTJ features. Also the He etch gas could be beneficial in reducing damage. The detailed etch mechanism and results on the etching of MTJ materials will be presented.

Origin of the Tetragonal Ground State of Heusler Compounds

Spin-transfer-torque magnetic random-access memory (STT-MRAM) is one of the leading emerging technologies for nonvolatile memory. Key to its development is identifying magnetic materials with sufficient perpendicular magnetic anisotropy (PMA). The authors describe the general mechanism of tetragonal distortion in Heusler compounds, a class of promising materials for STT-MRAM, with over 2000 members. This study offers guidance for finding tetragonal Heusler alloys with high PMA.