Small Voltage Difference Research Articles

Analysis of Different Third-Generation Solar Cells Using the Discrete Electrical Model d1MxP

The performance of photovoltaic solar cells is usually analyzed using continuous models, for instance, 1M5P. I-V and P-V curves are fitted by a mathematical expression from the electrical model. In the case of 1M5P, characteristics are fitted using five parameters that are obtained using a small number of I-V points from a wider set of data, keeping the curve shape given by the mathematical expression from the model. A novel model was recently proposed to overcome this issue. The d1MxP model is based on the discretization of the electrical behavior of the diodes in models such as 1M5P. The d1MxP methodology is equivalent to an analytical incremental calculation and since it connects the given points, the model error should be lower than the one obtained using models as 1M5P. It is based on the connection of adjacent points (with small voltage differences) instead of having the entire voltage range represented by some parameters (as the continuous models do, for instance, 1M5P). In this work, the d1MxP model is applied to perovskite solar cells and paint-type dye-sensitized solar cells. The aim is to analyze the behavior of the discrete model in different third-generation solar cells since their performance cannot be well characterized by the 1M5P model. The accuracy on the maximum power point is relevant, resulting in perovskite solar cells, an improvement of up to 2.61% and, in paint-type dye-sensitized solar cells, an increase of up to 5.03%.

An Early Soft Internal Short-Circuit Fault Diagnosis Method for Lithium-Ion Battery Packs in Electric Vehicles

The early detection of soft internal short-circuit faults in lithium-ion battery packs is critical to ensuring the safe and reliable operation of electric vehicles. This article proposes a fault diagnosis method that can achieve the detection and assessment of soft internal short-circuit faults for lithium-ion battery packs. Specifically, based on the incremental capacity curve, fault features are extracted from the data, making them easier to identify than small voltage differences. Then, the local outlier factor method is proposed to detect the early soft internal short-circuit fault by calculating the local outlier factor value of each cell within the battery pack. Furthermore, soft short-circuit simulations of a series-connected battery pack under different conditions and various short-circuit resistance values are conducted to generate an internal short-circuit fault data set. Finally, the validity of the proposed fault diagnosis method is verified using simulation and real-world vehicle data. The results show that the proposed method can effectively identify the short-circuit fault of the battery at the early stage, accurately locate the faulty cells in the battery pack, and describe the severity of the fault.

Tailored Heterojunction Active Sites for Oxygen Electrocatalyst Promotion in Zinc-Air Batteries.

Rechargeable zinc-air batteries (ZABs) are promising energy storage systems due to their low-cost and safety. However, the working principle of ZABs is based on oxygen evolution reaction (OER) and oxygen reduction reaction (ORR), which display sluggish kinetic and low stability. Herein, this work proposes a novel method to design a heterogeneous CoP/CoO electrocatalyst on mesopore nanobox carbon/carbon nanotube (CoP/CoO@MNC-CNT) that enriched active sites and synergistic effect. Moreover, the well-defined heterointerfaces could lower the energy barrier for intermediate species adsorption and promote OER and ORR electrochemical performances. The CoP/CoO@MNC-CNT electrocatalyst presents a high half-wave potential of 0.838V for ORR and a small overpotential of 270mV for OER. The ZABs-based CoP/CoO@MNC-CNT air-cathode shows an open-circuit voltage of 1.409V, the long-term cycle life of 500h with a small voltage difference change of 7.7%. Additionally, the flexible ZABs exhibit highly mechanical stability, demonstrating their application potential in wearable electronic devices.

Design and simulation of low dropout voltage regulator using 180nm technology

Low Dropout (LDO) Voltage Regulators are the linear regulators which drives upon a very small differential voltage. The main components of the Low dropout voltage regulators are Error amplifier, Pass device, voltage reference source and Voltage divider network. The low dropout voltage regulator uses a variable input to give a steady, constantly controlled, low-noise DC output voltage. This is a linear voltage regulator that includes a small voltage drop among the input as well as the output that works even when the output voltage is extremely close to the input voltage. The Error amplifier circuit which is one of the components in Low dropout voltage regulator is designed in the standard 180nm CMOS technology, with supply voltage of 1.6V, the gain of the error amplifier is 74db, Band-gap reference circuit is implemented to produce stable reference voltage which is independent of temperature variations. The bandgap reference voltage circuit gives the output voltage of 1.2V. The low dropout voltage regulator produces constant output voltage of 1.8V for the input voltage range 2.1V to 3.5V and it provides constant output voltage for load variations.

Failure Analysis in Photovoltaic Power Systems Using an Artificial Neural Network

As a result of the rapid expansion of photovoltaic systems, raising efficiency and managing ‎maintenance became the PV systems' main factors. After that comes the cost and the time of ‎repair immediately. This research provides an artificial neural network (ANN) to classify the ‎system's type of failure. Three types of failure have been studied: line-to-line fault with a ‎small voltage difference, a line-to-line fault with a large voltage difference, and ground fault. ‎In addition to the fourth normal operation case, no failure is applied. The ANN employs five ‎input data: power, voltage, current, temperature, and solar radiation. The output is a number ‎from (0 to 3), each number denotes a specific type of failure: number '0' denotes the normal ‎operation, number '1' denotes a line to line fault with a small voltage difference, number '2' ‎denotes a ground fault, and number '3' denotes a line to line fault with a large voltage ‎difference. Samples of collected data are used to train the ANN, with MATLAB Software ‎Package, to model and simulate the system. Then, the proposed ANN is tested. Its ability to ‎detect and classify the type of failure in the system is validated at a satisfactory success rate. ‎The research's focus was on the discovery of a failure in the PV system, Not only the ‎existence of a failure but also the discovery of the type of failure that occurred; this helps in ‎speeding up the solution of the problem, speeding maintenance, and reducing the loss of ‎power.‎

DC/DC Converter for Bipolar LVdc System With Integrated Voltage Balance Capability

Bipolar LVdc distribution is a promising solution for better integration of renewables and enhancement of system efficiency and reliability, but it also faces the challenge of pole voltage imbalance. By simple modifications of the bidirectional CLLC dc/dc converter, this article presents a dc/dc converter with integrated pole voltage balance capability. The converter presents less number of semiconductors, smaller overall footprint, and lower power loss compared to the employment of additional pole voltage balancers. Operating principle of this dc/dc converter and its inherent pole voltage balancing capability are explained, while further control scheme is also developed to compensate the small pole voltage difference caused by the dead time effect. Simulation results with 150 kW/±375 V bipolar output demonstrate the effectiveness of the converter, and the experimental results from a 500 W/±50 V downscaled prototype further prove the proposed concept.

Pt/CoFe2O4-C hollow ball as efficient bifunctional electrocatalyst for Zn-air batteries

Development of efficient electrocatalysts for Zn-air batteries is vital for energy storage and conversion. The activities of oxygen reduction reaction (ORR) and oxygen evolution reaction (OER) are essential for the Zn-air battery (ZAB) application. Here, we synthesized the hollow ball spinel structural of Pt/CoFe2O4-C, which exhibited high ORR performance, close to commercial Pt/C. Simultaneously, the OER performance of Pt/CoFe2O4-C was slight better than that of the commercial IrO2. Thus, the prepared (wt:0.1) Pt/CoFe2O4-C was applied in the homemade ZABs, whose open circuit voltage was as1.483 V, approaching the performance of the mixture of the commercial Pt/C and IrO2 (1.508 V). Moreover, the discharge/charge voltage gap for the sample was as low as 1.288 V at 50 mA cm−2, outperforming the mixture of Pt/C and IrO2 (1.51 V). Remarkably, the small voltage difference of Pt/CoFe2O4-C was shown as 0.401 V after 12 h Zn-air battery charge/discharge testing under 30 mA cm−2.

Spike-timing-dependent plasticity model for low-frequency pulse waveform

The authors are studying pulse-type hardware neural networks (P-HNN) for generating the driving waveform of the robot. The P-HNN generates a driving waveform by the oscillatory pulse waveform. Oscillating frequency depends on the time constant of the oscillator. In the case of implementing into the integrated circuit (IC), a large time constant cannot construct to the limited space. This paper is discussing the generation of low-frequency pulse waveform without using a large time constant. Two cell body models pre-synaptic neuron (Pre) and post-synaptic neuron (Post) generate the high-frequency pulse (637 kHz). A slight time difference of both pulse waveform converts to the small voltage difference of spike-timing-dependent plasticity (STDP) model. The small voltage difference indicates the coupling coefficient of Pre and Post. The value of the coupling coefficient changing slowly, thus, the output neuron (Out) generates the burst-like waveform which can use as a low-frequency pulse waveform (37 Hz).

A Fast Equalizer with Adaptive Balancing Current Control

In this paper, a fast equalizer for series-connected battery packs with adaptive balancing current control is proposed. As the duty cycle of the power switch in conventional equalizers is kept constant during the equalization process, smaller voltage difference between cells will decrease balancing current and consequently result in extended balancing time, especially in the later phase of equalization. To deal with this problem and take the battery nonlinearity and circuit parameter non-ideality into consideration, an adaptive balancing current control based on a fuzzy logic inference is proposed. The presented approach can adjust the duty ratio adaptively, according to voltages of individual cells and pack, to keep the balancing current nearly constant: Therefore, the balancing time can be shortened and the balancing efficiency can be improved. Finally, experimental results of three compared methods will be given and discussed to validate the feasibility, effectiveness, and performance improvement of the studied method.

Fault detection in PV systems

A practical fault detection approach for PV systems intended for online implementation is developed. The fault detection model here is built using artificial neural network. initially the photovoltaic system is simulated using MATLAB software and output power is collected for various combinations of irradiance and temperature. Data is first collected for normal operating condition and then four types of faults are simulated and data are collected for faulty conditions. Four faults are considered here and they are: Line to Line faults with a small voltage difference, Line to line faults with a large voltage difference, degradation fault and open-circuit fault. This data is then used to train the neural network and to develop the fault detection model. The fault detection model takes irradiance, temperature and power as the input and accurately gives the type of fault in the PV system as the output. This system is a generalized one as any PV module datasheet can be used to simulate the Photovoltaic system and also this fault detection system can be implemented online with the use of data acquisition system.

In-plane electric fields and the ν=52 fractional quantum Hall effect in a disk geometry

The $\nu=\frac{5}{2}$ fractional quantum Hall effect is of experimental and theoretical interest due to the possible non-Abelian statistics of the excitations in the electron liquid. A small voltage difference across a sample applied in experiments to probe the system is often ignored in theoretical studies due to the Galilean invariance in the thermodynamic limit. No experimental sample, however, is Galilean invariant. In this work, we explore the effects of the probe electric fields in a disk geometry with finite thickness. We find that weak probe fields enhance the Moore-Read Pfaffian state but sufficiently strong electric fields destroy the incompressible state. In a disk geometry, the behavior of the system depends on the polarity of the applied radial field, which can potentially be observed in experiments using in a Corbino disk configuration. Our simulation also shows that the application of such a field enhances the coherence length of quasiholes propagating through the edge channels

MEMS electrostatic influence machines

This paper analyses the possibility of MEMS electrostatic influence machines using electromechanical switches like the historical predecessors did two centuries ago. We find that a generator design relying entirely on standard silicon-on-insulator(SOI) micromachining is conceivable and analyze its performance by simulations. The concept appears preferable over comparable diode circuits due to its higher maximum energy, faster charging and low precharging voltage. A full electromechanical lumped-model including parasitic capacitances of the switches is built to capture the dynamic of the generator. Simulation results show that the output voltage can be exponentially bootstrapped from a very low precharging voltage so that otherwise inadequately small voltage differences or charge imbalances can be made useful.

Energy Consumption in Batch-Mode Capacitive Deionization

Capacitive deionization (CDI) is a water desalination technique in which salt ions are removed from brackish water by flowing through a spacer channel with porous electrodes on each side. Upon applying a small voltage difference between the two electrodes, cations move to and are accumulated in electrostatic double layers inside the negatively charged cathode and the anions are removed by the positively charged anode. Therefore, one of the advanced merits of CDI is the low driven energy by compared to other desalination technologies. Inspired this, we have performed the calculation on energy consumption of activated carbon based CDI in different operation conditions. The results show that the energy consumptions are significantly related to cell voltage as well as solution concentration. Furthermore, the round trip efficiency as a vital indication in terms of energy consumption have been introduced and discussed as well.

Design Analysis of Low Drop-Out Voltage Regulator with Current Buffer Compensation

A Voltage Regulator which can drive on very small differential voltage is projected called Low Drop-Out Voltage Regulator (LDO). It consist of TransConductance Amplifier as an Error Amplifier (EA) in accordance with it a current buffer compensation scheme. This Error Amplifier (EA) provides boost in the gain, enhanced the closed-loop bandwidth of the Low Drop-Out Voltage Regulator. While the current buffer compensation scheme using a current feedback amplifier, offers low output impendence, due to the huge gate capacitance of the pass transistor of the LDO regulator to high frequency. Also in Error Amplifier a Power Noise Cancellation Mechanism is formed which reduces the size of the Pass transistor. Due to this reduced and compact area of the proposed LDO regulator leads to an area efficient chip which finds its applications for wide range of portable electronics. Topographies of proposed LDO are experimentally tested on Cadence in a standard of 45nm technology. This proposal exploits a cascode current amplifier where a high threshold pMOS operated in the sub-threshold region, is responsible to lift the gain and produce the anticipated output voltage. The outcomes show that this circuit functions properly while there is reduction in power consumption by 43.64% and improvement in regulated Voltage output by 52%.

Separation of nanoparticles by a nano-orifice based DC-dielectrophoresis method in a pressure-driven flow.

A novel DC-dielectrophoresis (DEP) method employing a pressure-driven flow for the continuous separation of micro/nano-particles is presented in this paper. To generate the DEP force, a small voltage difference is applied to produce a non-uniformity of the electric field across a microchannel via a larger orifice of several hundred microns on one side of the channel wall and a smaller orifice of several hundred nanometers on the opposite channel wall. The particles experience a DEP force when they move with the flow through the vicinity of the small orifice, where the strongest electrical field gradient exists. Experiments were conducted to demonstrate the separation of 1 μm and 3 μm polystyrene particles by size by adjusting the applied electrical potentials. In order to separate smaller nanoparticles, the electrical conductivity of the suspending solution is adjusted so that the polystyrene nanoparticles of a given size experience positive DEP while the polystyrene nanoparticles of another size experience negative DEP. Using this method, the separation of 51 nm and 140 nm nanoparticles and the separation of 140 nm and 500 nm nanoparticles were demonstrated. In comparison with the microfluidic DC-DEP methods reported in the literature which utilize hurdles or obstacles to induce the non-uniformity of an electric field, a pair of asymmetrical orifices on the channel side walls is used in this method to generate a strong electrical field gradient and has advantages such as capability of separating nanoparticles, and locally applied lower electrical voltages to minimize the Joule heating effect.

A Low-Power Edge Detection Technique for Sensor Wake-Up Applications

A novel low-power edge detection circuit is presented in this work. Upon the arrival of signal falling edge, the proposed design establishes a small voltage difference between the gate and source terminals of a MOS transistor which slightly increases the MOS transistor leakage current. A current integration-based approach is used to robustly sense the current change and subsequently detect the signal falling edge. The design is suitable for ultra-low-power sensor wake-up circuits. Design guidelines for achieving optimal detection sensitivity as well as the implementation of calibration circuits for coping with process variations and mismatches are discussed in the paper. Simulation results are presented to demonstrate the performance of the proposed circuit.

빠른 전하 균일화를 위한 새로운 구조의 셀 밸런싱 회로

This study proposes an improved cell balancing circuit for fast equalization among lithium-ion (Li-ion) batteries. A simple voltage sensorless charge balancing circuit has been proposed in the past. This cell balancing circuit automatically transfers energy from high-to low-voltage battery cells. However, the circuit requires a switch with low on-resistance because the balancing speed is limited by the on-resistance of the switch. Balancing speed decreases as the voltage difference among the battery cells decrease. In this study, the balancing speed of the cell balancing circuit is enhanced by using the auxiliary circuit, which boosts the balancing current. The charging current is determined by the nominal battery cell voltage and thus, the balancing speed is almost constant despite the very small voltage differences among the batteries. Simulation results are provided to verify the validity of the proposed cell balancing circuit.

Reading DRAM cells using two properly designed cascaded inverters

During the reading of one-transistor one-capacitor dynamic random-access memory (1T–1C DRAM) cells, the need arises to amplify a small voltage difference (in the order of 30 to 100 mV) by a suitable sense amplifier. The net result is that the higher voltage will rise to VDD while the lower one will decrease to 0 V. Simulation results for the 0.13 μm CMOS technology reveals that approximately 40 % of the read access time is associated with the sense-amplifier operation in addition to the area required by each sense amplifier for each column in the memory array due to the need to raise or lower the relatively large bitline parasitic capacitance. Also, this process consumes relatively large amount of power. In this paper, a novel readout technique for reading DRAM cells using two cascaded inverters is proposed. Simulation using the 0.13 μm CMOS technology with VDD=1.2 V reveals that 37 % of the read access time using the conventional sense-amplifier reading scheme is saved for stored “1” which has a longer access time compared to stored “0”.

High Speed Comparators for Analog-To-Digital Converter

High speed devices such as ADC, operational amplifier are of great importance and for this high speed application, a major thrust is given towards low power methodologies. Minimization in power consumption in these device can be achieved by smaller feature size processes. Dynamic comparator are being used in today's A/D converters extensively because of their speed , lesser power dissipation , zero static power consumption and full-swing digital level output voltage in shorter time duration. Back to back inverter in these dynamic comparator provides positive feedback mechanism which convert a smaller voltage difference in full scale digital level output. A pre-amplifier based comparator can amplify a small input voltage difference to a large enough voltage to overcome the latch offset voltage and reduce the kickback noise. However the pre- amplifier based comparator suffer large static power consumption as well as reduced intrinsic gain with the reduction of the drain to source resistance due to continuous technology scaling. Keyword: Comparators ,High speed Analog-to-digital converter ,Regenerative comparator.

Fabrication of porous platelike LiFePO4/C cathode materials via hydrothermal process

The porous platelike LiFePO 4 /C particles were synthesized through an in situ hydrothermal process. Citric acid or glucose was added as carbon source to conduct carbon coating and ascorbic acid served as reducing agent. The material synthesized with citric acid shows the particle size of 2–3 μm with a refined carbon coating layer and delivers a discharge capability of 152.7 mAh g − 1 at 0.1 C while the material prepared with glucose demonstrates an average size of about 2 μm with a thin carbon coating layer and exhibits a discharge capacity of 153.4 mAh g − 1 at 0.1 C. The latter has a smaller voltage difference between the charge and discharge plateaus. Both materials have negligible capability fading at 0.1 C after 50 cycles, possessing excellent cycle stability. The sample shows the monodispersed platelike structure with porous texture. The particle size is about 2 μm; the average thickness is about 300 nm. Such a porous structure facilitates the penetration of electrolyte, providing more interface areas between the electrode material and the electrolyte. And the sufficient porosity shortens the diffusion distance of lithium ions, resulting in an improved electrochemical performance. ► The porous platelike LiFePO 4 /C particles were prepared via a hydrothermal method. ► Citric acid/glucose served as carbon source and ascorbic acid as reducing agent. ► The citric acid produced a compact carbon coating layer. ► The glucose produced a loosened carbon coating layer. ► The sample prepared with glucose has better electrochemical performance.