Small-signal Equivalent Model Research Articles

Investigation of Device- and Circuit-Level Reliability of Inverse-Mode Silicon-Germanium Heterojunction Bipolar Transistors.

The reliability of inverse-mode silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) under dc stress and its potential impact on the performance of basic analog amplifiers are investigated. In order to properly reflect the stress effects in various circuit applications, the degradations under three different configurations (active bias, diode connection, and off state) were experimentally characterized with the stress voltages applied up to 3000 s for each case. Based on the changes in the Gummel response, the degradations in device parameters such as current gain (β), transconductance (gm), and base-to-emitter resistance (rπ) were extracted and compared with the forward-mode counterpart. In addition, with the use of a small-signal equivalent model of a SiGe HBT, simple single-stage analog amplifiers were simulated as representative examples and their circuit-level performance metrics including gain and bandwidth were studied to estimate degradation characteristics with accumulated stress. It was found that transimpedance gain decreases and operation bandwidth increases to different levels due to device degradation, whereas a voltage amplifier exhibited much less changes.

Cascade sliding mode control implementation in photovoltaic power supply for camping-car applications

A cascade proportional integral sliding mode control for a two-stage interleaved boost converter (2IBC) serving as a reliable supplementary power source for camping-car applications is reported. Unlike the active fault-tolerant control approaches used for interleaved boost converters, which require controller reconfiguration, the proposed control scheme is passive fault-tolerant and does not require reconfiguration in the event of a faulty stage. The 2IBC model is analyzed together with the most important parasitic parameters, then, the averaged state-space model is derived to implement the control scheme. The appropriate linear cascade control is determined by using the small-signal equivalent model and improving the robustness and dynamic performance, thereby a proportional integrator controller is replaced by a sliding mode controller. The prototype system uses a signal processor and a low-power solar panel. The control code is generated by a PSIM software and loaded to the via a code composer tool. The experimental results validate the control design and demonstrate the efficiency of the proposed control scheme. In addition, the proposed controller ensures the continuity of service in the event of a faulty stage by verifying the reliability of the power supply.

Performance Improvement by SiO₂ Hardmask in 100-nm InP-Based HEMTs for TMIC Applications

Benzocyclobutene (BCB) has been widely used as passivation and interlayer dielectric for sub-millimeter-wave applications and terahertz monolithic microwave integrated circuits (TMICs). In this work, the influence of BCB passivation on 100-nm InP-based high-electron-mobility transistors (HEMTs) was investigated. A set of 100-nm HEMTs with different gate recess structures were fabricated and compared. A SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> hard mask was adopted in the gate recess, which contributed to an improved device performance after BCB passivation. DC and RF performances were characterized before and after BCB passivation. The results show that BCB passivation in the recess region degraded InP HEMTs’ performance, and a better performance was achieved by the SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> hard mask. For traditional devices, of which the gate recess was exposed to silicon nitride (SiN <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\textit{x}}\text{)}$</tex-math> </inline-formula> and BCB passivation layers, both dc and RF performances were deteriorated drastically even though the thickness of SiN <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\textit{x}}$</tex-math> </inline-formula> passivation layer was increased from 20 to 50 nm. However, the SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> hard mask preserved the device performances to a great degree, with only degradation by increased parasitic capacitances according to the small-signal equivalent model. In addition, the threshold voltage shift after BCB passivation was suppressed by the SiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> hard mask. Thus, a device structure suitable for BCB passivated TMIC applications is proposed and validated.

Linear Active Disturbance Rejection Control of New Double Full-Bridge ZVZCS Converter for Beam Supply

In view of the unstable output voltage of the new double full bridge ZVZCS converter of beam power supply when it is disturbed by external disturbance or internal parameter change in practical application, combined with the characteristics of the beam power supply system model, this paper proposes a beam power supply control strategy based on linear active disturbance rejection control (LADRC). Firstly, the working principle of the new double full bridge ZVZCS converter of beam power supply is analyzed, and considering the parasitic parameters and effective duty cycle of circuit components, the small signal equivalent model under two working modes is established. Secondly, combined with the system model and linear active disturbance rejection control theory, a double closed-loop controller is designed, which takes the second-order LADRC as the outer voltage loop and PI control as the inner current loop. Finally, the simulation and experimental results show that the designed controller has stronger robustness, anti-interference and better dynamic response speed than the traditional double closed-loop PI controller in load switching and dual-mode switching, and has a good development prospect.

A Hybrid Power Sharing Control to Enhance the Small Signal Stability in DC Microgrids

Low-frequency power oscillations pose serious problems to the operation of Distributed Generations (DGs) equipped with droop control. This paper presents a new hybrid power-sharing control for damping low-frequency power and current oscillations in DC microgrids. The proposed control consists of a decentralized droop control together with a centralized average current sharing control. A small-signal equivalent model is analytically derived for the proposed hybrid control and is incorporated into the DC microgrid model. The parameters of the PI controllers involved in the average current sharing control units are tuned individually to achieve a satisfactory performance in a stand-alone operation of DGs with a local load. The contributions of control signals contained in the hybrid control signal to the damping characteristic are analyzed. The dynamic response of the DC microgrid under a variety of disturbance scenarios is investigated. The power-sharing accuracy of the proposed control is also examined under the investigated scenarios. The method performance is also investigated for the oscillations caused by constant-power loads. Sensitivity analyses are conducted to evaluate the impact of the loading level and line parameters on the damping ratio associated with the dominant low-frequency modes. The effectiveness of the control method is examined in case of losing a number of communication links. The impact of the delay in the communication links on the method performance is also examined. The simulations are conducted on a multi-source DC microgrid, and the results are verified in the OPAL-RT real-time simulator.

A reliable parameter extraction method for the augmented GaN high electron mobility transistor small‐signal model

An improved GaN high electron mobility transistor (HEMT) small-signal equivalent model is proposed. To model the effects of extrinsic parameters that vary with the bias voltage, RL and Lds are added to the model. Moreover, substrate-related parameters (Rsub and Csub) are used to model the substrate effect. In order to avoid damaging the gate under high forward gate pressure conditions, an accurate parasitic parameter extraction method is proposed, which improves the reliability and validity of the parameter extraction. The S-parameters of the proposed model are in good agreement with the measured S-parameters in the range of 0.5–20.5 GHz.

Effect of fringing field capacitances in RF and small signal parameters of surrounding gate MOSFET

A small signal equivalent model of surrounding gate MOSFET incorporating fringing capacitances has been proposed and detailed in this paper. Detail modeling of the fringing (outer and inner both) capacitances of surrounding gate MOSFETs are considered here. Considering fringing capacitance, also the gate to drain/source and effective gate capacitances have been calculated for the proposed model. Low frequency Y-parameters (admittance parameters) of the SRG MOSFET are derived from the proposed model and expressed using real/imaginary function for different biasing condition. RF/analog performance parameters like Gate input capacitance (CGG), transport time delay (τ), input resistance (Rin), trans-conductance (gm), channel conductance (gds) etc have been evaluated. Figure of Merit (FOM) parameters like cut off frequency, gmRo, maximum oscillation frequency etc of the proposed model has been evaluated to study the effect of parasitic capacitances on the RF performances in depth. Extensive simulations using Silvaco ATLAS have been done to verify the proposed models. Matching of the simulated results with the model data demonstrate the correctness of the proposed model. It has been observed that the fringing capacitances can deteriorate the ac characteristics of the nano dimensional surrounding/cylindrical gate MOSFET.

RF Performance Evaluation of Nanoscale FDSOI MOS transistors

Objectives: In this work, the performance of single-gate and double-gate FD-SOI MOSFETs has been investigated in order to find out its utility RF applications. Methods/statistical analysis: The small-signal equivalent model is utilized to obtain the Y parameter of the devices and from which the minimum noise Figure and S parameter of the devices are derived and provides its applicability in the design of RFICs. The analysis is carried out using the Silvaco 2D ATLAS tool. Findings: The simplified small-signal equivalent models for both the devices are developed to analyze its high-frequency response more accurately, and to extract other important high-frequency (RF) parameters. Application/improvements: The derived S parameters are used to evaluate its high-frequency (RF) losses. In the SG FD-SOI MOSFET, the Insertion loss is 2.47 dB, the Transmission loss is 2.48 dB and the Reflection loss is 1.02 dB lower in comparison to DG FD-SOI MOSFET while its Return loss is 0.05 dB higher in comparison to that of DG FD-SOI MOSFET.Keywords: FD-SOI MOSFET, RFICs, Leakage Current, Power Dissipation, RF Frequency

Small signal equivalent model of synchronous generator-based grid-connected microgrid using improved Heffron-Phillips model

When there are enormous number of systems, such as microgrids (MGs), in power systems, the study faces two challenges: nonlinearity and multiplicity. Therefore, in this paper, a new linear equivalent model (LEM) is proposed for synchronous generator (SG)-based MGs to reduce computation burden and complexity. The proposed LEM is based on a third-order linear model of SG. However, it includes equivalent models of vital controllers of SG-based MG; excitation and turbine-governor (EXS and GOV) systems. The ultimate aim of this study is to estimate parameters of LEM such that it behaves as a nonlinear detailed model (NDM). Measurements at point of common coupling (PCC) and genetic algorithm are used to reach this goal. The identified LEM is investigated at different operating points and the results are compared with NDM outputs to show accuracy of the proposed solution.

Power Decoupling Method Based on the Diagonal Compensating Matrix for VSG-Controlled Parallel Inverters in the Microgrid

The thought of the virtual synchronous generator (VSG) for controlling the grid-connected inverters and providing virtual inertia to the microgrid is emerging as a wide extension of the droop control, power coupling that always exists in the low-voltage microgrid, which may deteriorate the dynamic response and the stability of the system. In this paper, the principle of VSG control is introduced first. As an important issue of VSG control, the mechanism of the power coupling in the low-voltage microgrid is analyzed and the small-signal equivalent model of the power transmission loop is established. Subsequently, a power decoupling method based on the diagonal compensating matrix for VSG is proposed, which can realize the power decoupling with no impact on the original control channel. Meanwhile, the feasibility analysis of the decoupling method and the improved approach for reactive power sharing are also discussed. Simulation results verify the effectiveness of the decoupling strategy for VSGs.

A readout integrated circuit based on DBI-CTIA and cyclic ADC for MEMS-array-based focal plane**Project supported by by National Natural Science Foundation of China (No. 61271130), the Beijing Municipal Science and Tech Project (No. D13110100290000), the Tsinghua University Initiative Scientific Research Program (No. 20131089225), and the Shenzhen Science and Technology Development Fund (No. CXZZ20130322170740736).

A readout integrated circuit (ROIC) for a MEMS (microelectromechanical system)-array-based focal plane (MAFP) intended for imaging applications is presented. The ROIC incorporates current sources for diode detectors, scanners, timing sequence controllers, differential buffered injection-capacitive trans-impedance amplifier (DBI-CTIA) and 10-bit cyclic ADCs, and is integrated with MAFP using 3-D integration technology. A small-signal equivalent model is built to include thermal detectors into circuit simulations. The biasing current is optimized in terms of signal-to-noise ratio and power consumption. Layout design is tailored to fulfill the requirements of 3-D integration and to adapt to the size of MAFP elements, with not all but only the 2 bottom metal layers to complete nearly all the interconnections in DBI-CTIA and ADC in a 40 μm wide column. Experimental chips are designed and fabricated in a 0.35 μm CMOS mixed signal process, and verified in a code density test of which the results indicate a (0.29/−0.31) LSB differential nonlinearity (DNL) and a (0.61/−0.45) LSB integral nonlinearity (INL). Spectrum analysis shows that the effective number of bits (ENOB) is 9.09. The ROIC consumes 248 mW of power at most if not to cut off quiescent current paths when not needed.

Study of process induced variability of germanium-pTFET in analog and RF domain

Germanium (Ge) tunnel field effect transistor (TFET) is considered to be an excellent solution to resolve the low on-currents issue of Silicon-based TFETs. Whereas, process variability in any low technology node devices (sub-100nm) is a crucial subject of matter which affects the device reliability and dependability in advanced SoC applications. In this brief, we have investigated the two main process induced variability a) the thickness of the germanium body b) the thickness of gate oxide in Ge-pTFET using Sentaurus TCAD device simulation. The analysis is performed in complete analog domain along with the study of intrinsic RF performance parameters using small signal equivalent model with non-quasi static effect of the device under consideration. The process induced variability is estimated on the figure of merits (FOMs) such as drain current (Ids), transconductance (gm), output resistance (Ro), intrinsic gain (gmRo), unity-gain cutoff frequency (fT), transit frequency of maximum available power gain (fMAX), transport delay (τm), intrinsic resistance (Rgd) and intrinsic capacitances (Cgs, Cgd).

Performance Enhancement of Microwave GaN HEMTs Without an AlN-Exclusion Layer Using an Optimized AlGaN/GaN Interface Growth Process

The impact of the sharpness of the AlGaN/GaN interface in high-electron mobility transistors (HEMTs) is investigated. Two structures, one with an optimized AlGaN/GaN interface and another with an unoptimized, were grown using hot-wall metal-organic chemical vapor deposition. The structure with optimized sharpness of the interface shows electron mobility of 1760 cm2/V $\cdot $ s as compared with 1660 cm2/V $\cdot $ s for the nonoptimized interface. Gated Hall measurements indicate that the sharper interface maintains higher mobility when the electrons are close to the interface compared with the nonoptimized structure, indicating less scattering due to alloy disorder and interface roughness. HEMTs were processed and evaluated. The higher mobility manifests as lower parasitic resistance yielding a better dc and high-frequency performance. A small-signal equivalent model is extracted. The results indicate a lower electron penetration into the buffer in the optimized sample. Pulsed- IV measurements imply that the sharper interface provides less dispersive effects at large drain biases. We speculate that the mobility enhancement seen AlGaN/AlN/GaN structures compared with the AlGaN/GaN case is not only related to the larger conduction band offset but also due to a more well-defined interface minimizing scattering due to alloy disorder and interface roughness.

Modeling and Control System Design of Marine Controlled-Source Electromagnetic Detection Transmitter

Marine electromagnetic transmitter transmits large power variable frequency electromagnetic wave to the seabed so as to obtain the submarine structure and mineral resources. The mathematical model of controlled source circuit needs to be established to realize closed loop control for increasing control precision and output transient performance of the electromagnetic wave. The operation process of controlled circuit is analyzed in continuous current mode, two equivalent switching states of controlled source circuit are obtained through the analysis of the different states of the switch in a switching period. A small signal equivalent model of the system is established using small ripple approximation. For high output voltage fluctuation problem in single loop control, double loop control strategy of voltage loop and current loop is designed. The simulation and experimental results show that, the system has the advantages of fast transient response speed and good regulation performance.

Two-dimensional bipolar junction transistors

Recent development in fabrication technology of planar two-dimensional (2D) materials has introduced the possibility of numerous novel applications. Our recent analysis has revealed that by definition of p-n junctions through appropriate patterned doping of 2D semiconductors, ideal exponential I–V characteristics may be expected. However, the theory of 2D junctions turns out to be very different to that of standard bulk junctions. Based on this theory of 2D diodes, we construct for the first time a model to describe 2D bipolar junction transistors (2D-BJTs). We derive the small-signal equivalent model, and estimate the performance of a 2D-BJT device based on graphone as the example material. A current gain of about 138 and maximum threshold frequency of 77 GHz, together with a power-delay product of only 4 fJ per 1 μm lateral width is expected at an operating voltage of 5 V. In addition, we derive the necessary formulae and a new approximate solution for the continuity equation in the 2D configuration, which have been verified against numerical solutions.

The Design of a 1~13 GHz GaAs Travelling Wave Amplifier

A 4-stage travelling wave amplifier with 10dB ± 1.2 dB gain and 12 GHz bandwidth is presented in the paper. The parameters of the small signal equivalent model about the GaAs PHEMT are extracted to evaluate the characterization of the device, which is also used to design the amplifier. The amplifier has a minimum noise figure lower than 4.8 dB in the frequency range, and the S11 and S22 are below-10 dB and-7 dB, which demonstrate a good performance. The P1dB and IIP3 are 7.3 dBm and 24 dBm, respectively, and the saturation output power is above 20 dBm at 13 GHz.

Taylor-Series-Expression-Based Equivalent Circuit Models of LED for Analysis of LED Driver System

This paper presents the Taylor series expression based light-emitting-diode (LED) model for the analysis of the LED driver system. In order to precisely describe the nonlinear V -I curve of LEDs, Taylor series can be utilized to express the Shockley equation of LEDs for the derivations of the dc and small-signal equivalent models. Based on the proposed LED models, the LED array with M paralleled strings of N LEDs in series can be constructed. Furthermore, the equivalent resistances of the N × M LED array can be derived. Finally, one LED array with eight paralleled strings of 15 LEDs in series is constructed to verify the equivalent small-signal resistance with the measured results.

The parameter extraction including field-plate effect of 0.25 µm 12 V LDMOSFETs

This paper presents the parameter extraction including the field-plate effect of a 0.25 µm 12 V lateral diffused metal-oxide-semiconductor field effect transistor (LDMOSFET). As LDMOSFET is capable of sustaining high-voltage signals between source and drain, it is appropriately used for power and radio frequency (RF) IC applications. For RF applications, a complete parameter extraction including the parasitic components of the devices used is necessary for accurately predicting the performance of the circuits. In this study, we propose a method to extract the parameters of the small-signal equivalent model containing the field-plate capacitance (Cfp) of a LDMOSFET. The simulated results of this LDMOSFET RF small-signal model agree well with the measured results from 0.5 to 3 GHz. The extracted parameters show that the Cfp forms an additional signal path which degrades the effective drain-side resistance and should be considered in RF applications.

Point defect determination by eliminating frequency dispersion in C– V measurement for AlGaN/GaN heterostructure

In this paper, an improved small-signal equivalent model is introduced to eliminate frequency dispersion phenomenon in capacitance–voltage ( C– V) measurement, and a new mathematic method is proposed to calculate the amount of bulk defect existing in the GaN buffer layer. Compared with photoluminescence (PL) and high resolution X-ray diffraction (HRXRD) data, it is identified that the main component of the bulk defect concentration is made up of the point defect concentration, rather than the edge dislocation concentration. All these results prove the accuracy of the improved C– V model and feasibility of the mathematic model.

Motivating Two-Port Network Analysis through Elementary and Advanced Examples

We seek to motivate the use of two-port network circuit analysis techniques by proposing two examples: one is elementary, the other is advanced. In particular, we start by deriving the transmission matrices for small-signal equivalent models of the BJT and MOS transistors. We then proceed to the first example where we explain the function of a Gyrator in a very clear way aided by Spice simulations. In the second more advanced example, we show how to systematically analyse the classical Cascode amplifier in a general way that is independent of whether it is realized using a BJT or a MOS transistor. The two examples highlight the strength and generality of the not-so-popular two-port network analysis which is usually introduced to undergraduate students much later than other circuit analysis techniques. This delay results in a preference for using mesh and nodal techniques to model and analyse electronic circuits.