Small Circuit Research Articles

A 16 nJ/Classification FPGA-Based Wired-Logic DNN Accelerator Using Fixed-Weight Non-Linear Neural Net

A reconfigurable field-programmable gate array (FPGA)-based wired-logic deep neural network (DNN) accelerator is presented. High energy efficiency of 16 nJ/classification (Modified National Institute of Standards and Technology: MNIST) is achieved due to the wired-logic architecture. Each neuron in the neural network consists of combinational circuits only, and all the neurons are implemented on an FPGA. Intermediate data are never stored in memory or registers and are transmitted to the output stage by passing through only neuron cells. The latency and power required for memory access can be minimized, enabling low power and high throughput operation. A critical technical issue is reducing hardware resources because all neurons need to be implemented on an FPGA, where hardware resources are limited. Two core technologies have been developed to minimize the required hardware resources: (1) A neural network with a small number of neurons in which weight values of all synapses are fixed to a common value, and (2) a small neuron cell circuit consisting of an adder and look-up table containing an activation function. By fixing all weight values to a certain common value, processing can be simplified from multiply-accumulate operations to just additions, and the hardware resources required for each neuron are minimized. An experiment with the MNIST dataset using a 28-nm FPGA confirmed power consumption of 0.16 W and latency per inference of 100 ns (16nJ/classification). With the same recognition accuracy, the power efficiency is 45.6 times higher than that of the conventional state-of-the-art binarized DNN accelerator with a digital ASIC.

Modified Small Signal Circuit of AlGaN/GaN MOS-HEMTs Using Rational Functions

Conventional lumped small signal circuit (SSC) models of AlGaN/GaN metal oxide semiconductor high electron mobility transistors (MOS-HEMTs) are derived from the low frequency portion of the experimentally measured Y-parameters. Consequently, these models cannot faithfully capture the high frequency behavior of the device. In this work, modified SSC models of AlGaN/GaN MOS-HEMTs are developed by fitting the entire broadband measured Y-parameters of the device with rational functions. These rational functions are then physically realized using additional passive circuit elements added to the conventional SSC model. The accuracy of the proposed SSC models can be improved by increasing the order of the rational functions. The proposed models are demonstrably more accurate than the conventional SSC models in estimating the higher order poles and zeroes present in the experimentally measured Y-parameters of AlGaN/GaN MOS-HEMTs.

Short Circuit Recognition for Metal Electrorefining Using an Improved Faster R-CNN With Synthetic Infrared Images.

This paper is concerned with the problem of short circuit detection in infrared image for metal electrorefining with an improved Faster Region-based Convolutional Neural Network (Faster R-CNN). To address the problem of insufficient label data, a framework for automatically generating labeled infrared images is proposed. After discussing factors that affect sample diversity, background, object shape, and gray scale distribution are established as three key variables for synthesis. Raw infrared images without fault are used as backgrounds. By simulating the other two key variables on the background, different classes of objects are synthesized. To improve the detection rate of small scale targets, an attention module is introduced in the network to fuse the semantic segment results of U-Net and the synthetic dataset. In this way, the Faster R-CNN can obtain rich representation ability about small scale object on the infrared images. Strategies of parameter tuning and transfer learning are also applied to improve the detection precision. The detection system trains on only synthetic dataset and tests on actual images. Extensive experiments on different infrared datasets demonstrate the effectiveness of the synthetic methods. The synthetically trained network obtains a mAP of 0.826, and the recall rate of small latent short circuit is superior to that of Faster R-CNN and U-Net, effectively avoiding short-circuit missed detection.

From the Neuroscience of Individual Variability to Climate Change.

Years of basic neuroscience on the modulation of the small circuits found in the crustacean stomatogastric ganglion have led us to study the effects of temperature on the motor patterns produced by the stomatogastric ganglion. While the impetus for this work was the study of individual variability in the parameters determining intrinsic and synaptic conductances, we are confronting substantial fluctuations in the stability of the networks to extreme temperature; these may correlate with changes in ocean temperature. Interestingly, when studied under control conditions, these wild-caught animals appear to be unchanged, but it is only when challenged by extreme temperatures that we reveal the consequences of warming oceans.

Toward Learning in Neuromorphic Circuits Based on Quantum Phase Slip Junctions.

We explore the use of superconducting quantum phase slip junctions (QPSJs), an electromagnetic dual to Josephson Junctions (JJs), in neuromorphic circuits. These small circuits could serve as the building blocks of neuromorphic circuits for machine learning applications because they exhibit desirable properties such as inherent ultra-low energy per operation, high speed, dense integration, negligible loss, and natural spiking responses. In addition, they have a relatively straight-forward micro/nano fabrication, which shows promise for implementation of an enormous number of lossless interconnections that are required to realize complex neuromorphic systems. We simulate QPSJ-only, as well as hybrid QPSJ + JJ circuits for application in neuromorphic circuits including artificial synapses and neurons, as well as fan-in and fan-out circuits. We also design and simulate learning circuits, where a simplified spike timing dependent plasticity rule is realized to provide potential learning mechanisms. We also take an alternative approach, which shows potential to overcome some of the expected challenges of QPSJ-based neuromorphic circuits, via QPSJ-based charge islands coupled together to generate non-linear charge dynamics that result in a large number of programmable weights or non-volatile memory states. Notably, we show that these weights are a function of the timing and frequency of the input spiking signals and can be programmed using a small number of DC voltage bias signals, therefore exhibiting spike-timing and rate dependent plasticity, which are mechanisms to realize learning in neuromorphic circuits.

Roadmap for Electrical Impedance Spectroscopy for Sensing: A Tutorial

Electrical impedance spectroscopy has been used extensively for sensing and biosensing due to the multiple electrical properties that can be interrogated through varying the frequency of the electrical excitation. In this paper, we review the basic concepts and key issues for applying impedance spectroscopy in sensing and biosensing, with emphasis on the development of precise, low-cost and portable instruments. An impedance spectroscopy system can be divided into three parts: the signal processing unit, the sensing unit and the data analysis unit. Herein, we focus on the signal processing unit, responsible for generating the excitation signal and performing the impedance readout. Special attention is given to small and low-cost signal processing circuits, which are essential for portability and point-of-care diagnosis. We also elaborate upon the various methods to fabricate the sensing units, including the choice of nanomaterials and biomolecules in controlled molecular architectures. From an instrumentation perspective, we discuss possible sources of interference in the measurement protocols. When impedance spectroscopy measurements are performed with arrays of sensing units, as with electronic tongues, large amounts of data are generated. This has motivated an increasing use of statistical and computational methods for data analysis. We present some of these methods, with examples of information visualization and machine learning techniques, which have been employed in analyzing impedance spectroscopy data in recent years.

A comparative study on the accuracy of small-signal equivalent circuit modeling for large gate periphery GaN HEMT with different source to drain length and gate width

In this paper, extrinsic and intrinsic parameters were extracted from the experimental S-parameters using 16- and 22-element small signal equivalent circuit model for large gate periphery GaN HEMT with different source to drain length and gate width over 500 MHz to 26 GHz range. The extraction using 22-element model shows good consistency to measured S-parameters and the maximum gain, stability factor, delta factor and K-factor with less percentage error than 16-element model. As the source to drain length is increasing, the accuracy of parameter extraction is enhanced for 22-element model. Specially for stability factor and K-factor the percentage error was reduced drastically (10.42%–4.74% and 8.13%–0.83% respectively). For increased number of fingers, the 22-element model shows more accuracy. Also, TCAD (Technology Computer-Aided Design) device simulations were done and transfer characteristic were calibrated with measured data. The simulated s-parameters were then calibrated with the experimental extrinsic parameters.

Understanding and compensating for noise on IBM quantum computers

Quantum algorithms offer efficient solutions to computational problems that are expensive to solve classically. Publicly available quantum computers, such as those provided by IBM, can now be used to run small quantum circuits that execute quantum algorithms. However, these quantum computers are highly prone to noise. Here, we introduce important concepts of quantum circuit noise and connectivity that must be addressed to obtain reliable results on quantum computers. We utilize several examples to show how noise scales with circuit depth. We present Simon's algorithm, a quantum algorithm for solving a computational problem of the same name, explain how to implement it in IBM's Qiskit platform, and compare the results of running it both on a noiseless simulator and on physical hardware subject to noise. We discuss the impact of Qiskit's transpiler, which adapts ideal quantum circuits for physical hardware with limited connectivity between qubits. We show that even circuits of only a few qubits can have their success rate significantly reduced by quantum noise unless specific measures are taken to minimize its impact.

An inductorless piezoelectric energy harvesting interface circuit using gyrator induced voltage flip technique

PurposeThe purpose of this research paper is to explore the possibility to enhance the power transfer from piezoelectric energy harvester (PEH) source to the load. As the proposed gyrator-induced voltage flip technique (GIVFT) does not require bulky components such as physical inductors, it is easily realizable in small integrated circuits (IC) package thereby offering performance benefits, reducing area overhead and providing cost benefits for constrained self-powered autonomous Internet-of-Things (IoT) applications.Design/methodology/approachThis paper presents an inductorless interface circuit for PEH. The proposed technique is called GIVFT and is demonstrated using active elements. The authors use gyrator to induce voltage flip at the output side of PEH to enhance the charge extraction from PEH. The proposed technique uses the current-voltage (I-V) relationship of gyrator to get appropriate phasor response necessary to induce the voltage flip at the output of PEH to gain power transfer enhancement at the load.FindingsThe experimental results show the efficacy of the GIVFT realization for enhanced power extraction. The authors have compared their proposed design with popular earlier reported interface circuits. Experimentally measured performance improvement is 1.86×higher than the baseline comparison of full-wave bridge rectifier circuit. The authors demonstrated a voltage flip using GIVFT to gain power transfer improvement in piezoelectric energy harvesting.Originality/valueTo the best of the authors’ knowledge, pertaining to the field of PEH, this is the first reported GIVFT based on the I-V relationship of the gyrator. The proposed approach could be useful for constrained self-powered autonomous IoT applications, and it could be of importance in guiding the design of new interface circuits for PEH.

Influence of conduction shape factor in subterranean cooling for a thermoelectric energy harvesting system at asphalt pavement: An experimental investigation

ABSTRACT This research study’s primary motivation is to study the practicality and feasibility of energy harvesting or energy scavenging using ambient energy such as heat absorbed by asphalt pavement to provide electrical power for small electronic circuits or devices, making them self-sufficient. Therefore, this project investigates the thermal distribution evaluation of multiple diameters of the aluminum rod as a cooling element and examines the optimum designs for the surface heat absorption method using the aluminum plate in the road thermoelectric energy harvesting system (RTEHs). The RTEHs experimental setup consisted of an asphalt-filled wooden base box, “sandwiched” thermoelectric module, top aluminum plate, and bottom aluminum rod, which is partially submerged in the asphalt and soil. Using constructed RTEHs setup and several thermocouples, a series of experiments on multiple diameters of an aluminum rod as a cooling element and few aluminum plate designs were conducted to obtain the best configurations that yield maximum temperature difference between cooling and heating sides in asphalt based RTEHs. Based on the testing results, RTEHs with a mounted triple of Rod C, which has the biggest diameter of 31.75 mm (1.25 inch) and combined with 100 mm × 200 mm of a top plate, proved to be the best performing configuration by producing the highest temperature difference (DT) of 15.19°C. Since the triple rod configuration has a higher value of shape factor, this indicates a better heat transfer performance by conduction. These proved the theory of conduction shape factor for multiple geometries. Based on the results, having a bigger top plate as a heating element promotes a higher heat transfer rate and takes in more heat energy, thus producing the largest DT for the system, which confirmed Stephen-Boltzmann’s law on radiation heat transfer.

Deterministic multi-mode gates on a scalable photonic quantum computing platform

Quantum computing can be realized with numerous different hardware platforms and computational protocols. A highly promising approach to foster scalability is to apply a photonic platform combined with a measurement-induced quantum information processing protocol where gate operations are realized through optical measurements on a multipartite entangled quantum state -- a so-called cluster state. Heretofore, a few quantum gates on non-universal or non-scalable cluster states have been, but a full set of gates for universal scalable quantum computing has not been realized. We propose and demonstrate the deterministic implementation of a multi-mode set of measurement-induced quantum gates in a large two-dimensional (2D) optical cluster state using phase-controlled continuous variable quadrature measurements. Each gate is simply programmed into the phases of the high-efficiency quadrature measurements which execute the transformations by teleportation through the cluster state. Using these programmable gates, we demonstrate a small quantum circuit consisting of 10 single-mode gates and 2 two-mode gates on a three-mode input state. On this platform, fault-tolerant universal quantum computing is possible if the cluster state entanglement is improved and a supply of Gottesman-Kitaev-Preskill qubits is available. Moreover, it operates at the telecom wavelength and is therefore network connectable without quantum transducers.

Exponentiation conversion circuit capable of changing the power exponent to any value

We proposed an exponentiation conversion circuit which can change its power exponent to any value to compensate the nonlinearity of electronic devices. The proposed circuit is a small scale circuit utilizing the exponential characteristic in the subthreshold operation of MOSFET. In the proposed circuit, the new exponential conversion circuit converts signal multiplied logarithmically transformed input signal by the power exponent value, thereby obtaining the exponential power raised power function characteristic. The proposed circuit is suitable to integrate on a microcomputer chip used for IoT. The performance of the circuit was evaluated by a prototype IC made by 0.6 μm CMOS process. In measured results, the exponential conversion characteristics as set were obtained, the exponent value was set to 0.50, 1.00 and 2.00. By using the cascode exponential conversion circuit, the signal dynamic range was expanded by 5.2 dB when the exponent value was set to 2.00.

Device Authentication and Data Encryption for IoT Network by Using Improved Lightweight SAFER Encryption With S-Boxes

To send data over the network, devices need to authenticate themselves within the network. After authentication, the device will be able to send the data in-network. After authentication, secure communication of devices is an important task that is done with an encryption method. IoT network devices have a very small circuit with low resources and low computation power. By considering low power, less memory, low computation, and all the aspect of IoT devices, an encryption technique is needed that is suitable for this type of device. As IoT networks are heterogeneous, each device has different hardware properties, and all the devices are not on one scale. To make IoT networks secure, this paper starts with the secure authentication mechanism to verify the device that wants to be a part of the network. After that, an encryption algorithm is presented that will make the communication secure. This encryption algorithm is designed by considering all the important aspects of IoT devices (low computation, low memory, and cost).

Design and Simulation of a Small Power Two-Bit MC Circuit via Full Adder Logic

In Very Large-Scale Integration (VLSI) systems, a magnitude comparator (MC) is a component of Arithmetic Logic Unit (ALU) used to make binary decisions. Recent technologies demand the use of power-efficient methodologies as well as techniques that require a lesser number of transistors. In this paper, a magnitude comparator is developed using full adder design logic. Full adders are basic components of the ALU which is the logical and arithmetical unit of the microprocessors and Digital Signal Processing (DSP). This design consumes less power and area when compared to other logic styles in the literature. The proposed comparator has been designed using DSCH 3.5 and simulations are done on Microwind 3.5 via 0.12 μ technologies. This comparator shows a power consumption of 31.746μW using 36 transistors. The proposed design exhibits a full adder logic-based comparator with less power consumption and transistor count as compared to those in recent literature.

Electrophysiological Characteristics of Intra-Atrial Reentrant Tachycardia in Adult Congenital Heart Disease: Implications for Catheter Ablation.

BackgroundUltra‐high‐density mapping enables detailed mechanistic analysis of atrial reentrant tachycardia but has yet to be used to assess circuit conduction velocity (CV) patterns in adults with congenital heart disease.Methods and ResultsCircuit pathways and central isthmus CVs were calculated from consecutive ultra‐high‐density isochronal maps at 2 tertiary centers over a 3‐year period. Circuits using anatomic versus surgical obstacles were considered separately and pathway length <50th percentile identified small circuits. CV analysis was used to derive a novel index for prediction of postablation conduction block. A total of 136 supraventricular tachycardias were studied (60% intra‐atrial reentrant, 14% multiple loop). Circuits with anatomic versus surgical obstacles featured longer pathway length (119 mm; interquartile range [IQR], 80–150 versus 78 mm; IQR, 63–95; P<0.001), faster central isthmus CV (0.1 m/s; IQR, 0.06–0.25 versus 0.07 m/s; IQR, 0.05–0.10; P=0.016), faster non‐isthmus CV (0.52 m/s; IQR, 0.33–0.71 versus 0.38 m/s; IQR, 0.27–0.46; P=0.009), and fewer slow isochrones (4; IQR, 2.3–6.8 versus 6; IQR 5–7; P=0.008). Both central isthmus (R 2=0.45; P<0.001) and non‐isthmus CV (R 2=0.71; P<0.001) correlated with pathway length, whereas central isthmus CV <0.15 m/s was ubiquitous for small circuits. Non‐isthmus CV in tachycardia correlated with CV during block validation (R 2=0.94; P<0.001) and a validation map to tachycardia conduction time ratio >85% predicted isthmus block in all cases. Over >1 year of follow‐up, arrhythmia‐free survival was better for homogeneous CV patterns (90% versus 57%; P=0.04).ConclusionsUltra‐high‐density mapping‐guided CV analysis distinguishes atrial reentrant patterns in adults with congenital heart disease with surgical obstacles producing slower and smaller circuits. Very slow central isthmus CV may be essential for atrial tachycardia maintenance in small circuits, and non‐isthmus conduction time in tachycardia appears to be useful for rapid assessment of postablation conduction block.

Heterogeneous integration of InP HEMTs on quartz wafer using BCB bonding technology

Heterogeneous integrated InP high electron mobility transistors (HEMTs) on quartz wafers are fabricated successfully by using a reverse-grown InP epitaxial structure and benzocyclobutene (BCB) bonding technology. The channel of the new device is In0.7Ga0.3As, and the gate length is 100 nm. A maximum extrinsic transconductance g m,max of 855.5 mS/mm and a maximum drain current of 536.5 mA/mm are obtained. The current gain cutoff frequency is as high as 262 GHz and the maximum oscillation frequency reaches 288 GHz. In addition, a small signal equivalent circuit model of heterogeneous integration of InP HEMTs on quartz wafer is built to characterize device performance.

Regulating the high-voltage and high-impedance characteristics of triboelectric nanogenerator toward practical self-powered sensors

In recent years, triboelectric nanogenerator (TENG), as a sensor with promising future, is expected to be widely used in many fields. However, the output of TENG has the characteristics of high voltage (> 10–100 V) and high impedance (in MΩ–GΩ), which hinder the TENG’s applications in sensor with considering the operation voltage of conventional electronic components. In this work, two front-end voltage signal processing circuit schemes are proposed, which can convert the high-impedance and high-voltage signal output from TENG into a low-voltage and low-impedance signal. First, we analyzed the circuit model by measuring the output voltage of the TENG sensor and explained the influence of the input impedance of the measuring device on the measurement accuracy. Then, we proposed two kinds of linear voltage signal processing methods which have been demonstrated the feasibility for a contact-separation mode TENG and a rotating type TENG. Finally, we applied the designed front-end signal processing circuit to a portable measurement system, which can measure the voltage signal up to 100 V output from a sliding mode TENG for local display or transmission to receiving terminal wirelessly. These two front-end voltage signal processing circuit solutions have the advantages of structure simplicities and cost-efficiency, and they can be used in combination with common electronic systems. The method can help with various practical TENG-based sensor applications and also provides an economical and simple solution for TENG voltage measurement. Two front-end voltage signal processing circuit schemes and linear voltage signal processing methods are proposed, which can convert the high-impedance and high-voltage signal output from TENG into a low-voltage and low-impedance signal. These two front-end voltage signal processing circuit solutions have the advantages of structure simplicities and cost-efficiency, and they can be used in combination with common electronic systems. The method can help with various practical TENG-based sensor applications and also provides an economical and simple solution for TENG voltage measurement. • Two regulating methods catering to the characteristics of high voltage and high impedance of TENG sensors were proposed. • A high-accuracy small signal circuit towards TENG was designed to replace specialized expensive measuring instruments. • An economical and exquisite solution for signal measurement is conducive to the practical application of TENG sensor.

Small Circuits and Dual Weak PHP in the Universal Theory of p-time Algorithms

We prove, under a computational complexity hypothesis, that it is consistent with the true universal theory of p-time algorithms that a specific p-time function extending bits to bits violates the dual weak pigeonhole principle: Every string equals the value of the function for some . The function is the truth-table function assigning to a circuit the table of the function it computes and the hypothesis is that every language in P has circuits of a fixed polynomial size .

Untethered rotational system with a stacked dielectric elastomer actuator

An untethered system can realize wide-area activities of soft robots. Herein we develop an untethered DEA wheel (UD-wheel) with a dielectric elastomer actuator (DEA). DEA is a soft actuator driven by electrostatic force. This UD-wheel is a new rotating device that integrates an untethered system and stacked DEAs. The untethered system consists of a small battery and a small high-voltage circuit. All the components are assembled seamlessly. Because the circuit can control four DEAs, the active time that the circuit continues to control the DEAs with a small battery is estimated. The estimated time matches the experimental result. We evaluated the output torque and back-drivability achieved by stacked DEAs installed in a UD-wheel. We also built a theoretical model for an in-depth evaluation. The stacking DEAs method provides a better back-drivability than the reducer method. This study suggests that our untethered rotational system may provide novel functions in soft robotics.

A compact Gysel power divider with ultra‐wide rejection band and high fractional bandwidth

In this paper, one kind of miniaturized Gysel power divider (GPD) with ninth harmonic suppression is proposed. In this structure to weaken unwanted harmonics, radial and new trapezoidal-shaped resonators are placed instead of the quarter-wavelength transmission lines of the conventional GPD. Moreover, these resonators create eight transmission zeros and occupy small circuit sizes. For designing the proposed GPD, appropriate electrical lengths of transmission lines are selected. This GPD has high −15 dB fractional bandwidth, 71%, good isolation, > 15 dB, and compact sizes, 0.07 λg×0.22 λg. The operating frequency of the designed power divider is 2.1 GHz that can be used in many WCDMA applications.