Single Event Upset Rate Research Articles

Estimation of Muon-Induced SEU Rates for 65-nm Bulk and UTBB-SOI SRAMs

Negative and positive muon-induced single-event upset (SEU) rates were estimated for 65-nm bulk and ultrathin body and thin buried oxide silicon-on-insulator (UTBB-SOI) static random access memories (SRAMs). The SEU cross sections for muon incidence on the two SRAMs were experimentally characterized and compared. The experimental results showed that the negative muon SEU cross sections for the bulk SRAM are significantly larger than those for the UTBB-SOI. Estimation of muon SEU rates at ground level was performed using the experimental results and the Monte Carlo simulation with the Particle and Heavy Ion Transport code System (PHITS). The estimated muon SEU rates were compared with the measured neutron SEU rates. The contribution of muons was found to be considerably smaller than that of neutrons. Attenuation effect of muons and neutrons in a five-story building was also investigated by particle transport simulation with PHITS. The muon SEU rate on the first floor was estimated to be at most 10% of the neutron SEU rate on the same floor.

Characterization and Mitigation of Single-Event Transients in Xilinx 45-nm SRAM-Based FPGA

This paper presents a new approach for analyzing the effect of single-event transient (SET) in SRAM-based field-programmable gate array (FPGA) devices, which are widely used in the space environment. New SET characterizing and mitigation techniques, including continuous monitoring and controlling of the test, are proposed to ensure proper operation of the device under test. This is vital for verifying the proper functioning of the design and performing online reconfiguration if required, since the effect of a single-event upset (SEU) on the device configuration bits may disrupt the SET detection and mitigation design. While many studies focus on SEU, latch-up, and cumulative radiation [total ionizing dose (TID)] effects on SRAM-based FPGAs, only a few published works refer to the SET effect. Moreover, in contrast to previous SET studies, this paper presents a quantitative assessment for SET probability under the real radiation environment and provides cross-sectional analysis for both SET and SEU effects at low linear energy transfers (LETs) (up to 0.925 MeV $\cdot$ cm2/mg). The SET experiments have been carried out at UCL Cyclotron (Belgium) accelerator using heavy ions and under alpha source irradiation. Experimental results indicate that SET examinations on SRAM-based FPGAs should be performed only at low LETs due to the high SEU rate compared to the SET rate. Several kinds of filters have been implemented and proposed for SET mitigation demonstrating a significant reduction of the SET transient effects. The proposed methodology may provide a basic model for future research studies on SET radiation effects on SRAM-based FPGAs, and assisting in selecting an immune FPGA-based platform for satellites applications.

Comparison of ionization track structure models for electronic devices of different sizes

The effect of the ionization track structure of the heavy ion deposited charge by direct ionization on the energy deposition calculation for single event upset (SEU) rate prediction is investigated using Geant4 based on Monte Carlo transport code. The limitations of using linear energy transfer (LET) as the single parameter to determine the energy deposited in the sensitive volume (SV) are analyzed. Track effects are becoming of great importance with technology downscaling. Three track structure models are summarized, and the applicability of track structure models for high energy ions (>8.0 MeV/amu) and low energy ions (<0.3 MeV/amu) with the same LET to devices of different sizes is discussed. It is revealed that the selection of an appropriate track structure model requires a comprehensive consideration of electronic device size and ion energy.

Predicting system failure rates of SRAM-based FPGA on-board processors in space radiation environments

Static random-access memory-based field-programmable gate arrays are increasingly being used for on-board processors in space missions. However, they are very susceptible to single event upsets that can generate on-board processor system malfunction or system failures in space radiation environments. This paper presents an on-board processor system adopting Triple Modular Redundancy with the concept of mitigation windows and external scrubber, and then suggests a mathematical model that predicts the on-board processor system failure rate by only using the information of system configuration resources. Our mathematical derivation can estimate on-board processor system reliability as a function of the single event upset rate, the number of mitigation windows, and on-board processor shield thickness. In addition, a guideline of the on-board processor system design is provided for achieving good single event upset mitigation capability and system reliability.

Dependence of single event upsets sensitivity of low energy proton on test factors in 65 nm SRAM**Project supported by the Major Program of the National Natural Science Foundation of China (Grant Nos. 11690040 and 11690043).

In order to accurately predict the single event upsets (SEU) rate of on-orbit proton, the influence of the proton energy distribution, incident angle, supply voltage, and test pattern on the height, width, and position of SEU peak of low energy protons (LEP) in 65 nm static random access memory (SRAM) are quantitatively evaluated and analyzed based on LEP testing data and Monte Carlo simulation. The results show that different initial proton energies used to degrade the beam energy will bring about the difference in the energy distribution of average proton energy at the surface and sensitive region of the device under test (DUT), which further leads to significant differences including the height of SEU peak and the threshold energy of SEU. Using the lowest initial proton energy is extremely important for SEU testing with low energy protons. The proton energy corresponding to the SEU peak shifts to higher average proton energies with the increase of the tilt angle, and the SEU peaks also increase significantly. The reduction of supply voltage lowers the critical charge of SEU, leading to the increase of LEP SEU cross section. For standard 6-transitor SRAM with bit-interleaving technology, SEU peak does not show clear dependence on three test patterns of logical checkerboard 55H, all “1”, and all “0”. It should be noted that all the SEUs in 65 nm SRAM are single cell upset in LEP testing due to proton’s low linear energy transfer (LET) value.

On-Orbit Single Event Effect of the Digital Signal Processor of the Alpha Magnetic Spectrometer and Discrepancy Analysis for the Rate Prediction

Three hundred commercial off-the-shelf ADSP-2187L chips on AMS-02 have been operating without major problems on the International Space Station since launch. The conversion rates from the single event upset (SEU) to single event function interrupt varied with the operation methods. The correlation between the on-orbit SEU and radiation environments during the 24th solar cycle was studied. The on-orbit SEU rate was much lower than expected. Possible reasons for the higher predicted SEU rate were discussed and thought to be the different circuit operations of the ground test method and the on-orbit one in the sensitive linear energy transfer range.

An Empirical Model for Predicting SE Cross Section for Combinational Logic Circuits in Advanced Technologies

At the gigahertz range of frequencies, contribution of combinational logic upsets has increased significantly to the overall single-event (SE) upset rate (SER) of sequential circuits. Most approaches for modeling and/or predicting logic SER are either pure simulation based or pure experiment based. Simulation-based approaches need a lot of computing power. Experiment-based approaches require fabrication of actual circuits. This paper presents an empirical method that uses experimental data from simple test structures for estimating SE vulnerability of any combinational logic circuit. Estimated logic SEU cross section matches well with the measured logic SEU cross section. Estimated logic SEU cross section results obtained with the proposed method are within $2\times $ average error when compared to the experimentally measured logic SEU cross section. This method only needs to be calibrated once for use at a given technology node.

Evaluation of digital micromirror devices for use in space-based multiobject spectrometer application

The astronomical community continues to be interested in suitable programmable slit masks for use in multi-object spectrometers (MOSs) on space missions. There have been ground-based MOS utilizing digital micromirror devices (DMDs) and they have proven to be highly accurate and reliable instruments. This paper summarizes the results of a continuing study to investigate the performance of DMDs under conditions associated with space deployment. This includes the response of DMDs to radiation, to the vibration and mechanical shock loads associated with launch, and the operability of DMD under cryogenic temperatures. The optical contrast ratio and a study of the long-term reflectance of a bare device have also been investigated. The results of the radiation testing demonstrate that DMDs in orbit would experience negligible heavy-ion induced single event upset (SEU) rate burden, we predict SEU rate of 5.6 micromirrors per 24 hours. Vibration and mechanical shock testing was performed according to the NASA General Environmental Verification Standard (GEVS), no mirrors failed in the devices tested. The results of low temperature testing suggest that DMDs are not affected by the thermal load and operate smoothly at temperatures at least as low as 78 K. The reflectivity of a bare DMD did not measurably change even after being exposed to ambient conditions over a period of 13 months. The measured contrast ratio (on state vs off state of the DMD micromirrors) was greater than 6000/:1 when illuminated with an f/4 optical beam. Overall, DMDs are extremely robust and promise to provide a reliable alternative to micro shutter arrays (MSA) to be used in space as remotely programmable slit masks for MOS design.

Single Event Upset rate determination for 65 nm SRAM bit-cell in LEO radiation environments

The degradation of SRAM bit-cells designed in a 65nm bulk CMOS technology in a Sun-Synchronous Low Earth Orbit (LEO) ionizing radiation environment is analyzed. We propose an inflight SEU rate estimation approach based on a modeled heavy ion cross section as opposed to the standard experimental characterization. Effects of irradiation with estimated LET spectrum in SRAM bit cell, i.e. the location of sensitive regions, its tendency to cause upset, magnitude and duration of transient current as well as voltage pulses were determined. It was found with SEU map that 65nm SRAM bit-cell can flip even if high LET particle strikes in close proximity of bit-cell outside the SRAM bit-cell area. The SEU sensitive parameters required to predict SEU rate of on-board target device, i.e., 65nm SRAM were calculated with typical aluminum spot shielding using fully physical mechanism simulation. In order to characterize the robustness of scaled CMOS devices, state of the art simulation tools such as Visual TCAD/Genius, GSEAT/Visual Particle, runSEU, were utilized whereas LEO radiation environment assessment, upset rate prediction was accomplished with the help of OMERE-TRAD software.

A simple analytical model of single-event upsets in bulk CMOS

During the last decade, multiple new methods of single event upset (SEU) rate prediction for aerospace systems have been proposed. Despite different models and approaches being employed in these methods, they all share relatively high usage complexity and require information about a device that is not always available to an end user.This work presents an alternative approach to estimating SEU cross-section as a function of linear energy transfer (LET) that can be further developed into a method of SEU rate prediction. The goal is to propose a simple, yet physics-based, approach with just two parameters that can be used even in situations when only a process node of the device is known. The developed approach is based on geometrical interpretation of SEU cross-section and an analytical solution to the diffusion problem obtained for a simplified IC topology model. A good fit of the model to the experimental data encompassing 7 generations of SRAMs is demonstrated.

Low Energy Proton SEUs in 32-nm SOI SRAMs at Low Vdd

Near-threshold computing and scaling are combined to operate SRAMs in regions where they are close to being unstable. One consequence of this is an increase in single event upsets (SEUs), due to the minimal charge stored on nodes during reduced voltage operation. In this paper, both modeling and measurements [with heavy ions, MeV and low energy protons (LEPs)] are reported for a 32-nm silicon on insulator SRAM, over a range of 0.4-1.05 V. The results show that the SEU rate increases by 3X at low-supply voltages, where very LEPs are able to upset these devices. This can be a reliability concern when running SRAMs at near-threshold voltages in LEP space environments.

New Data and Modelling for Single Event Effects in the Stratospheric Radiation Environment

The upper atmosphere is a transition region between the neutron-dominated aviation environment and satellite environment where primary protons and ions dominate. We report high altitude balloon measurements and model results characterising this radiation environment for single event effects (SEE) in avionics. Our data, from the RaySure solid-state radiation monitor, reveal markedly different altitude profiles for low linear energy transfer (LET) and high LET energy depositions. We use models to show that the difference is caused by the influence of primary cosmic ray particles, which induce counts in RaySure via both direct and indirect ionization. Using the new Model of Atmospheric Ionizing Radiation Effects (MAIRE), we use particle fluxes and LET spectra to calculate single event upset (SEU) rates as a function of altitude from ground level to the edge of space at 100 km altitude. The results have implications for a variety of applications including high altitude space tourism flights, UAVs and missions to the Martian surface.

Heavy Ion Characterization of Temporal-, Dual- and Triple Redundant Flip-Flops Across a Wide Supply Voltage Range in a 65 nm Bulk CMOS Process

In this paper, we investigate the single event upset (SEU) response of five D flip-flops (DFFs) employing temporal redundancy, dual redundancy, and triple modular redundancy (TMR), across a wide supply voltage range. The DFFs were designed and fabricated in a low-power commercial 65 nm bulk CMOS process and were tested using heavy ions with linear energy transfer (LET) between $\mathrm {5.1~MeV-cm^{2}/mg}$ and $\mathrm {99.1~MeV-cm^{2}/mg}$ . Results show an increasing SEU vulnerability with decreasing supply voltage, for most of the DFFs. Nevertheless, radiation tolerant topologies exhibit $14\times $ to $1328\times $ better SEU tolerance than a standard non-radiation tolerant DFF, depending on supply voltage and LET. The general observation is that at normal incidence, while taking the entire LET spectrum into account, the dual interlocked storage cell (DICE) DFF has the best SEU tolerance at supply voltages of 1 V and 0.5 V. At a supply voltage of 0.25 V, a temporal redundant DFF shows the best SEU tolerance, while the TMR DFF shows the best SEU tolerance at a supply voltage of 0.18 V. At supply voltages of 0.5 V and below, increasing the angle of incidence to 45 degrees can increase the SEU rate of the implemented DICE DFF by up to a factor of $22\times $ , making it one of the most SEU sensitive DFFs. Furthermore, utilizing high drive strength components in temporally redundant DFFs can reduce the SEU sensitivity by a factor of $3\times $ to $112\times $ , compared to when standard drive strength components are used.

Single event upset rate modeling for ultra-deep submicron complementary metal-oxide-semiconductor devices

Based on the integral method of single event upset (SEU) rate and an improved charge collection model for ultra-deep submicron complementary metal-oxide-semiconductor (CMOS) devices, three methods of SEU rate calculation are verified and compared. The results show that the integral method and the figure of merit (FOM) methods are basically consistent at the ultra-deep submicron level. By proving the validity of the carrier collection model considering charge sharing, the applicability of two FOM methods is verified, and the trends of single-bit and multiple-bit upset rates for ultra-deep submicron CMOS are analyzed.

Single event upsets sensitivity of low energy proton in nanometer static random access memory

Low-energy protons are able to generate enough energy through direct ionization to cause a high single event upset cross section as the feature size of semiconductor devices shrinks. It poses a large challenge on the present proton single event modeling test technique and the space upset rate prediction method. Experimental study of proton single event effect in three different feature sizes of static random access memory (SRAM) (i.e. 65 nm, 90 nm, and 250 nm) is carried out based on domestic low-energy proton accelerators and also the foreign middle-high proton accelerators. Complete cross section curves of proton single event upset from low energy to high energy are acquired. Test results show that single event upset cross section below 1 MeV proton is up to three orders of magnitude higher than the saturation cross section of high-energy proton in nanometer SRAM. However, single event upset is not observed for protons below 3 MeV in 250 nm SRAM, and no single event multiple-cell upsets occur for protons below 1 MeV in 90 nm and 65 nm SRAM. The accurate geometrical structure model of composite sensitive volume is constructed through the combination of test data with device information, and calibrated further by single event test data of low-LET heavy ion and high-energy proton. Simulation results based on the model and Monte-Carlo calculation can reveal the root cause of low-proton single event upset cross section peak. Proton single event upsets are only caused through direct ionization of protons below 1 MeV. When low-energy protons pass through the multiple metallization and passivation layers of the device, the energy spectrum is broadened near the Bragg peak of the proton direct ionization, and the energy is deposited concentratedly into the sensitive volume through direct ionization. When the proton energy is too high or too low, the energy can not be deposited effectively into the sensitive volume through direct ionization. The energy spectrum straggling of low-energy protons due to the use of degrader has a large influence on the height and width of the single event upset cross section peak. Moreover, the contribution of low protons to the space proton single event upset rate is predicted for GEO orbit environment in the worst day environment. It shows that the direct ionization from low energy dominates the proton single event upset rate in the space in 65 nm SRAM. With the development of device technology, the critical charge of single event upset will be further reduced; and to the single event upset from low proton direct ionization more attention must be paid in the study and evaluation of single event effect.

Energy and angular dependence of single event upsets in ESA SEU Monitor

The new generation ESA SEU Monitor is first applied to beam verification of Beijing HI-13 Tandem accelerator according to the popularization need of Europe Space Agency and at the desire of contrast of domestic acceleraor with international accelerator. Heavy ion single event cross section of ESA SEU Monitor obtained at HI-13 is compared with those from European facilities. Beam homogeneity is also analyzed based on the SEU physical bitmap. The accuracy of heavy ion beam monitoring technique at HI-13 accelerator is verified. Through combining the heavy ion testing result with the data from the other test sites, it can be observed that the differences between SEU cross sections with different heavy ion energies of the same LET value can reach 1-3 orders of magnitude in the sub-threshold zone of single event upset cross section curve below the direct ionization LET threshold. The geometrical structure, critical charge and collection efficiency of sensitive volume are constructed on the basis of testing data and process information. The physical mechanism of energy effect on single event upsets in ESA SEU Monitor is revealed through using the Monte-Carlo calculation. Nuclear reactions between incident heavy ions and material atoms can account for single event upsets below the direct ionization LET threshold. The differences in nuclear reaction type and cross section between the diferent energy heavy ions and material atoms are the root cause of the difference among heavy ion SEU cross sections with different energies at the same LET value. On the other hand, SEU bitmap nonuniformity among different blocks in memory array and different orientation dices in ESA SEU Monitor is first reported when the heavy ion is incident at a tilting angle at the low LET value. The analysis of device layout and calculation verification can account for this phenomenon. The material of interlayer dielectric with the tilting ion passing through is different when heavy ion reaches the sensitive volume of memory blocks with different data. This leads to the difference between efficient LET values inside the sensitive volume for different data blocks. Eventually the sensitivity difference in single event upset among blocks with different data occures. The applications of ESA SEU Monitor in beam calibrating, tuning of domestic accelerator and single event effect test can be broadened further. Prediction method of space single event upset rate including heavy ion energy dependence and special angular dependence based on full-physical simulation should be developed in the future.

The Contribution of Low-Energy Protons to the Total On-Orbit SEU Rate

Low- and high-energy proton experimental data and error rate predictions are presented for many bulk Si and SOI circuits from the 20-90 nm technology nodes to quantify how much low-energy protons (LEPs) can contribute to the total on-orbit single-event upset (SEU) rate. Every effort was made to predict LEP error rates that are conservatively high; even secondary protons generated in the spacecraft shielding have been included in the analysis. Across all the environments and circuits investigated, and when operating within 10% of the nominal operating voltage, LEPs were found to increase the total SEU rate to up to 4.3 times as high as it would have been in the absence of LEPs. Therefore, the best approach to account for LEP effects may be to calculate the total error rate from high-energy protons and heavy ions, and then multiply it by a safety margin of 5. If that error rate can be tolerated then our findings suggest that it is justified to waive LEP tests in certain situations. Trends were observed in the LEP angular responses of the circuits tested. Grazing angles were the worst case for the SOI circuits, whereas the worst-case angle was at or near normal incidence for the bulk circuits.

SEPEM: A tool for statistical modeling the solar energetic particle environment

Solar energetic particle (SEP) events are a serious radiation hazard for spacecraft as well as a severe health risk to humans traveling in space. Indeed, accurate modeling of the SEP environment constitutes a priority requirement for astrophysics and solar system missions and for human exploration in space. The European Space Agency's Solar Energetic Particle Environment Modelling (SEPEM) application server is a World Wide Web interface to a complete set of cross-calibrated data ranging from 1973 to 2013 as well as new SEP engineering models and tools. Both statistical and physical modeling techniques have been included, in order to cover the environment not only at 1 AU but also in the inner heliosphere ranging from 0.2 AU to 1.6 AU using a newly developed physics-based shock-and-particle model to simulate particle flux profiles of gradual SEP events. With SEPEM, SEP peak flux and integrated fluence statistics can be studied, as well as durations of high SEP flux periods. Furthermore, effects tools are also included to allow calculation of single event upset rate and radiation doses for a variety of engineering scenarios.

Radiation hardness evaluations of 65 nm fully depleted silicon on insulator and bulk processes by measuring single event transient pulse widths and single event upset rates

We measure single event transient (SET) pulse widths on inverter chains and single event upset (SEU) rates on flip-flops (FFs) fabricated in 65 nm fully depleted silicon on insulator (FD-SOI) and bulk processes. The layout designs of test chips are strictly identical between their processes besides buried oxide (BOX) layers. Experimental results show that neutron-induced SEU and SET rates in the FD-SOI process are 230× and 450× lower than those in the bulk process, respectively.

Analysis of radiation induced effects in high-density commercial memories on-board Alsat-1: The impact of extreme solar particle events

This paper presents a long-term study on radiation effects in non-hardened high density memory devices operating within the main on-board computer system of the Algerian microsatellite Alsat-1 in Low Earth Orbit (LEO). A statistical analysis of single-event upset (SEU) activity is presented for commercial SRAM devices, and their response to extreme solar events shows SEU rate significant increases correlated with high-energy protons (E>100MeV). Ground based neutron monitor data are used to illustrate the long-term correlation between galactic cosmic rays and Alsat-1 upsets. The short-term effects of energetic solar particles are illustrated with space environment data from GOES-11. The Alsat-1 observed SEU rates are compared to the predicted rates based on ground test data and environment models. The prediction results are in good agreement with in-flight data.