Room-temperature single-electron effects are observed in 20 nm × 20 nm point-contact transistors fabricated in nanocrystalline silicon thin films. The films are deposited using low-temperature plasma enhanced chemical vapour deposition and contain grains typically 4-8 nm in size. Low-temperature oxidation and high-temperature annealing is used to oxidise selectively the grain boundaries. Single-electron effects occur in crystalline silicon grains isolated by tunnel barriers at the grain boundaries. The thermal processing improves the grain-boundary tunnel barrier and increases the maximum temperature for single-electron effects. Similar effects are also observed in devices fabricated in low-pressure chemical vapour deposited polysilicon films.