SiN Passivation Research Articles

Energy relaxation of hot electrons by LO phonon emission in AlGaN/AlN/GaN heterostructure with in situ Si3N4 passivation

In this study, energy relaxation mechanisms of electrons in AlGaN/AlN/GaN High Electron Mobility Transistor (HEMT) structures with and without in situ Si3N4 passivation were investigated. Although the physical parameters of the samples were all different, the electron-temperature dependent power loss values were found to be identical. The study also sought to fit the current theoretical power loss in the LO-phonon regime to the experimental power-loss per carrier results. The calculated power loss offered a reasonably fit to the experimental data in the electron temperature range between 75 and 250 K.

Impact of a drain field plate on the breakdown characteristics of AlInN/GaN MOSHEMT

In this paper, a novel AlInN/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT) employing the drain field plate technique is proposed and the effect of a drain field plate on the breakdown voltage (BV) is investigated. A reduction of the peak electric field is required to achieve AlInN/GaN MOSHEMTs with a high BV. The proposed AlInN/GaN MOSHEMT with both gate and drain field plates simultaneously reduces the electric field concentration at the gate and the drain edge by decreasing the potential gradient along the channel for the 2 dimensional electron gas (2DEG). The reduction in the peak electric field at the drain edge of the proposed device leads to a 57% increase in BV compared with the BV for an AlInN/GaN MOSHEMT with a gate field plate only. A significantly higher BV can be achieved by optimizing the gate-to-drain distance (Lgd), the length of the drain field plate (Ldfp) and the thickness of the SiN passivation layer thickness (TSiN). A detailed breakdown analysis of the device was carried out using Silvaco Technology Computer Aided Design (TCAD). The detailed numerical simulations were done by using the non-local energy balance (EB) transport model, which was calibrated with the previously published experimental results. The results showed a great potential for applications of the drain-field-plated AlInN/GaN MOSHEMT to deliver high currents and high powers in microwave technologies.

AlGaN/GaN high electron mobility transistor with Al2O3+BCB passivation

In this paper, A12O3 ultrathin film used as the surface passivation layer for AlGaN/GaN high electron mobility transistor (HEMT) is deposited by thermal atomic layer deposition (ALD), thereby avoiding plasma-induced damage and erosion to the surface. A comparison is made between the surface passivation in this paper and the conventional plasma enhanced chemical vapor deposition (PECVD) SiN passivation. A remarkable reduction of the gate leakage current and a significant increase in small signal radio frequency (RF) performance are achieved after applying Al2O3+BCB passivation. For the Al2O3+BCB passivated device with a 0.7 μm gate, the value of fmax reaches up to 100 GHz, but it decreases to 40 GHz for SiN HEMT. The fmax/ft ratio (≥ 4) is also improved after Al2O3+BCB passivation. The capacitance–voltage (C–V) measurement demonstrates that Al2O3+BCB HEMT shows quite less density of trap states (on the order of magnitude of 1010 cm−2) than that obtained at commonly studied SiN HEMT.

Temperature Dependence of the Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors on Si Substrate

The temperature dependence of current collapse (CC) in AlGaN/GaN high-electron mobility transistors on silicon substrate is studied in this paper. Devices without and with Si3N4 passivation are used to investigate the behavior of surface- and buffer-induced CC, respectively. It is found that the degree of surface-induced CC in unpassivated devices has a weak temperature dependence, which is induced by the cancelling out between enhanced carrier injection based on surface hopping and enhanced emission when the temperature is increased. On the other hand, the degree of buffer-induced CC in the Si3N4 passivated devices is reduced at higher temperature since the energy of hot electrons is reduced due to the phonon scattering and the trapping of hot electrons in the buffer is mitigated. Temperature-dependent transient measurement is also carried out to investigate the recovery process for these two type of CC. Two types of trap levels are identified in the unpassivated and Si3N4 passivated devices, respectively. The trap level $E1$ with an activation energy of 0.08 eV is supposed to be related to the surface trapping, while $E2$ with an activation energy of 0.22 eV is located in the buffer layer.

Reduction of Current Collapse in GaN High-Electron Mobility Transistors Using a Repeated Ozone Oxidation and Wet Surface Treatment

This letter reports a GaN high-electron mobility transistor (HEMT) with reduced current collapse using a multicycle combined plasma-free ozone oxidation and wet surface treatment before Si3N4 passivation. The surface oxide and decomposed layers could be effectively removed and a perfect AlGaN surface is obtained after the treatment. Pulsed $IV$ and RF power measurement indicate that the current collapse is greatly suppressed due to the removal of imperfect surface layer and damage free nature, providing an effective surface treatment method to improve the effect of passivation in GaN HEMT.

Interface characteristics of spin-on-dielectric SiOx-buffered passivation layers for AlGaN/GaN high electron mobility transistors

To reveal the cause for significant enhancement of dc current performance of the AlGaN/GaN high electron mobility transistors (HEMTs) with the spin-on-dielectric (SOD) SiOx-buffered passivation structure compared to the conventional Si3N4 passivation deposited by plasma-enhanced vapor deposition (PECVD), we characterized the passivation interfaces using the cross-sectional transmission electron microscopy, cathodoluminescence, capacitance–voltage (C–V) characterizations, and Hall-effect measurements. The interface state density of PECVD Si3N4 passivation was in the range of 1012–1013cm−2eV−1, which is one-order higher than that of the SOD (1011–1012cm−2eV−1) as measured by C–V measurements from the metal–insulator–semiconductor capacitors. Higher density of effective oxide charge density (especially dominant contribution of ionic mobile charge) was also derived from the PECVD Si3N4 passivation. A well-resolved reduction of the electron Hall mobility of the Si3N4 passivation compared to that of the perhydropolysilazane SOD passivation, which can be due to the higher-density interface states and trap charges, can answer the relative dc current collapse of our HEMT devices.

X-ray evaluation of electronic and chemical properties and film structures in SiN passivation layer on crystalline Si solar cells

We investigated the electronic chemical properties and film structures in SiN passivation layers on crystalline Si by X-ray photoelectron spectroscopy (XPS) and X-ray reflectometry (XRR). From XPS analyses, a N-rich component (N–Si–N) and oxygen mixing were observed at the interface. The longest lifetime was obtained after post deposition annealing at 600 °C, where the N-rich layer was the thinnest with small peak height. Therefore, longer lifetime could be obtained as the N concentration at the interface decreased. The film consisted of three SiN layers and one SiO2 layer, as confirmed by XRR profile fitting. From the density profiles, a longer lifetime was obtained when the density gradient in the oxygen mixing layer was small. Results of XPS and XRR suggested that N at the interface significantly affected the lifetime. We believe it is important to understand the electronic chemical properties at the passivation interface to realize high-efficiency Si solar cells.

Light Assisted Electrodeposition for the Metallization of Silicon Solar Cells

Cu electroplating is of a great deal of interest for the metallization of silicon solar cells due to its comparable resistance with the current silver metallizaion, and its lower cost for both the material and the operation.[1,2] However, the notorious Cu diffusion into Si is of great concern to the devices performance degradation during the life cycle of the cells. Ni silicide and Ni metal layers have been recently reported as part of the integration scheme to enable the Cu metallizaion and greatly improved the solar cell reliability.[3,4] The formation of this Ni silicide and Ni stack structure is to provide a low-resistance contact between the silicon and metal grid, a good adhesion of metal grid, and a diffusion barrier for the Cu. Among them, the Ni silicide formation needs to be well controlled so that it is not too thick to shunt the solar cell. This paper will present the light assisted plating of Ni and the silicide formation on single crystalline silicon solar cells fabricated with CMOS p-Si on a semiconductor line. The solar cell substrates for plating comprise ~ 60 ohm/sq emitter formed by POCl diffusion, PECVD SiN passivation layer, and evaporated Al back surface field. Electrodeposition of Ni was studied on 4 cm x 4 cm solar cells in different solutions containing Ni salt and other plating additives. Back contact through the Al BSF was used and front-side illumination was applied. Silicidation was achieved by rapid thermal annealing at different temperatures for different time. The study is focused on the effect of light, chemistry and the plating current on the film in terms of morphology, impurity and its salicidation. Figure 1 shows the relation between the applied potential and the light intensity at different constant current densities. Two regions of operation were clearly observed with a threshold light intensity. At high illumination, when enough carriers were generated by the light, the plating occurs at the forward bias mode of the diode. As the light intensity decreases below a threshold value, the potential increases significantly and stays at a high value indicating the diode operates at reverse bias mode. The threshold light intensity is dependent on the illumination energy spectrum, solution absorbance, anode shadowing and applied current density. REFERENCES D. A. Yates, US Patent 4,609,565 (1986).K. Holdermann, US patent 5,543,333 (1996).J Bartsch, A Mondon, K Bayer, C Schetter, M Horteis, and S W Glunz, J. Electrochem. Soc., 157, H942 (2010).J Bartsch, A Mondon, C Schetter, M Horteis, S W Glunz, IEEE 35th PVSC, Honolulu HI (2010). Figure 1

The variation of temperature‐dependent carrier concentration and mobility in AlGaN/AlN/GaN heterostructure with SiN passivation

The effects of surface passivation effect on electron mobility and crystal structure in Al0.3Ga0.7N/AlN/GaN heterostructures are investigated by classical Hall effect measurements and an X‐ray diffraction method. Al0.3Ga0.7N/AlN/GaN heterostructures with different doping and layer structures were grown by molecular beam epitaxy with or without growing an in situ SiN passivation layer. The classical Hall effect measurements were carried out as a function of temperature in the range between T = 1.82 K and 270 K at a fixed magnetic field in dark conditions. The effect of doping of the barrier layer and replacing an AlN inter‐layer between the AlGaN barrier and the GaN layer, where the two‐dimensional electron gas is populated, on mobility and sheet carrier concentration were also determined.

Enhancement of two dimensional electron gas concentrations due to Si3N4 passivation on Al0.3Ga0.7N/GaN heterostructure: strain and interface capacitance analysis

Enhancement of two dimensional electron gas (2DEG) concentrations at Al0.3Ga0.7N/GaN hetero interface after a-Si3N4 (SiN) passivation has been investigated from non-destructive High Resolution X-ray Diffraction (HRXRD) analysis, depletion depth and capacitance-voltage (C-V) profile measurement. The crystalline quality and strained in-plane lattice parameters of Al0.3Ga0.7N and GaN were evaluated from double axis (002) symmetric (ω-2θ) diffraction scan and double axis (105) asymmetric reciprocal space mapping (DA RSM) which revealed that the tensile strain of the Al0.3Ga0.7N layer increased by 15.6% after SiN passivation. In accordance with the predictions from theoretical solution of Schrödinger-Poisson’s equations, both electrochemical capacitance voltage (ECV) depletion depth profile and C-V characteristics analyses were performed which implied effective 9.5% increase in 2DEG carrier density after passivation. The enhancement of polarization charges results from increased tensile strain in the Al0.3Ga0.7N layer and also due to the decreased surface states at the interface of SiN/Al0.3Ga0.7N layer, effectively improving the carrier confinement at the interface.

Effects of Surface Passivation and Deposition Methods on the 1/<inline-formula> <tex-math notation="LaTeX">$f$ </tex-math></inline-formula> Noise Performance of AlInN/AlN/GaN High Electron Mobility Transistors

This letter reports on effects of Si3N4 and Al2O3 surface passivation as well as different deposition methods on the low-frequency noise (LFN) characteristics for AlInN/AlN/GaN high electron mobility transistors (HEMTs). Two samples are passivated with Al2O3, deposited by two different methods: 1) thermal atomic layer deposition (ALD) and 2) plasma-assisted ALD. The third sample is passivated with Si3N4 using plasma-enhanced chemical vapor deposition. The LFN of the three samples is measured under a bias condition relevant for amplifier and oscillator applications. It is found that the surface passivation has a major impact on the noise level. The best surface passivation, with respect to LFN, is the thermal ALD Al2O3 for which the noise current spectral density measured at 10 kHz is $1\times 10^{-14}$ Hz $^{-1}$ for a bias of $ {V}_{\rm {dd}}$ / $ {I}_{\rm {dd }} = 10$ V/80 mA. To the best of our knowledge, this result sets a standard as the best reported LFN of AlInN/GaN HEMTs. It is also in the same order as good commercial AlGaN/GaN HEMTs reported in literature and thus demonstrates that AlInN/GaN HEMTs, passivated with thermal ALD Al2O3, is a good candidate for millimeter-wave power generation.

Effects of post-annealing on the passivation interface characteristics of AlGaN/GaN high electron mobility transistors

We examined the effects of post-annealing in forming-gas ambient on the spin-on-dielectric (SOD)-buffered passivation as well as the conventional plasma-enhanced chemical vapor deposition (PECVD) Si3N4 passivation structure in association with the quantitative analysis of defects at the passivation interfaces of AlGaN/GaN high electron mobility transistors (HEMTs). Before the annealing, the interface state densities (Dit) of the PECVD Si3N4 are one-order higher (1012–1013cm−2eV−1) than those of the SOD SiOx (1011–1012cm−2eV−1) as derived from C–V characterization. Clear reduction in Dit from the PECVD Si3N4 is extracted to a level of 1011–1012cm−2eV−1 with a stronger absorption from Si–N peak in Fourier transform infrared spectroscopy spectra after the post-annealing. On the other hand, negligible difference in Dit value is obtained from the SOD SiOx. In this paper we propose that much lower measurement levels (~156mA/mm) before the annealing and substantial recovery (~13% increase) after the annealing in maximum drain current density of the AlGaN/GaN HEMTs with Si3N4 passivations are due to the original higher density before the annealing and greater reduction in Dit of the PECVD Si3N4 after the annealing. Significant reduction after the annealing in gate–drain leakage current (from ~10−3 to ~10−5A, 100-μm gate width) of the HEMTs with the Si3N4 passivation is also supposed to be attributed to the reduction of Dit.

Impact of the silicon-nitride passivation film thickness on the characteristics of InAlAs/InGaAs InP-based HEMTs

In this research, the DC and RF characteristics for our own InAlAs/InGaAs InP-based high-electron-mobility transistors (HEMTs) with 0-nm, 50-nm, and 200-nm silicon-nitride (Si3N4) passivation films have been investigated comprehensively and systematically. With increasing Si3N4 passivation film thickness, the device exhibits an apparent improvement in the output conductance and a distinct drift of the pinch-off voltage toward a positive value. Especially, the device passivated by using a 50-nm Si3N4 film demonstrates the highest extrinsic transconductance and channel current. The appeared changes of the DC properties can be interpreted as due to the passivationinduced positively-charged surface state increasing the sheet carrier density with the carrier mobility and parasitic resistance of device being deteriorated by long-time high-stress-intensity ion bombardment. Additionally, the degradations of the current-gain cutoff frequency (f T) and maximum oscillation frequency (f max) can be attributed to the drastically-increased parasitic capacitance and resistance induced by the passivation process. This work will be of great importance in fabricating InP HEMTs with high performances.

Reliability Investigations of AlGaN/GaN HEMTs Based on On-State Electroluminescence Characterization

In this paper, we investigated ON-state electroluminescence (EL) characteristics in fresh GaN-based HEMTs under different ON-state bias conditions. It demonstrated that: 1) the intensity of the ON-state EL emitted by the GaN-based HEMTs with relatively high V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> > 10 V) monotonically increased as the gate voltage increased; and 2) the distribution of the intensity of the ON-state EL was uniform along the gate and across the device before stress tests. The degradation process and mechanisms of the devices in the high temperature operation (HTO) stress were also analyzed based on the ON-state EL characterization, the electrical measurement, and failure analysis. It demonstrated the following. First, the ON-state EL distribution of the device after step HTO (S-HTO) stress tests was no longer uniform along one of the fingers, which indicated that the degradation was related to this finger. This hypothesis was confirmed by the SEM observation after the deprocess of the gate metal and the SiN passivation layer. Second, a new degradation mechanism of AlGaN/GaN HEMTs that caused the abrupt degradation in the S-HTO stress was identified and related to the emergent, localized, and jagged crack under the gate metal. Third, there was no abrupt degradation in the long-term HTO (LT-HTO) stress test. However, the ON-state EL intensity of the inner fingers in the device after the LT-HTO stress test decreased more than that of the outer fingers, which meant that the degradation of the inner fingers was faster than that of the outer fingers as a result of the higher temperature caused by self-heating in the inner region of the device. Finally, the gradual degradation in the LT-HTO stress test was ascribed to the gradual formation of structural damage along the drain side of the whole gate edge, which was confirmed by the SEM observation.

Electron velocity of 6 × 107 cm/s at 300 K in stress engineered InAlN/GaN nano-channel high-electron-mobility transistors

A stress engineered three dimensional (3D) Triple T-gate (TT-gate) on lattice matched In0.17Al0.83N/GaN nano-channel (NC) Fin-High-Electron-Mobility Transistor (Fin-HEMT) with significantly enhanced device performance was achieved that is promising for high-speed device applications. The Fin-HEMT with 200-nm effective fin-width (Weff) exhibited a very high IDmax of 3940 mA/mm and a highest gm of 1417 mS/mm. This dramatic increase of ID and gm in the 3D TT-gate In0.17Al0.83N/GaN NC Fin-HEMT translated to an extracted highest electron velocity (ve) of 6.0 × 107 cm/s, which is ∼1.89× higher than that of the conventional In0.17Al0.83N/GaN HEMT (3.17 × 107 cm/s). The ve in the conventional III-nitride transistors are typically limited by highly efficient optical-phonon emission. However, the unusually high ve at 300 K in the 3D TT-gate In0.17Al0.83N/GaN NC Fin-HEMT is attributed to the increase of in-plane tensile stress component by SiN passivation in the formed NC which is also verified by micro-photoluminescence (0.47 ± 0.02 GPa) and micro-Raman spectroscopy (0.39 ± 0.12 GPa) measurements. The ability to reach the ve = 6 × 107 cm/s at 300 K by a stress engineered 3D TT-gate lattice-matched In0.17Al0.83N/GaN NC Fin-HEMTs shows they are promising for next-generation ultra-scaled high-speed device applications.

Transport mechanism of reverse surface leakage current in AlGaN/GaN high-electron mobility transistor with SiN passivation**Project supported by the National Natural Science Foundation of China (Grant Nos. 61334002, 61106106, and 61474091), the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory, China (Grant No. ZHD201206), the New Experiment Development Funds for Xidian University, China

The transport mechanism of reverse surface leakage current in the AlGaN/GaN high-electron mobility transistor (HEMT) becomes one of the most important reliability issues with the downscaling of feature size. In this paper, the research results show that the reverse surface leakage current in AlGaN/GaN HEMT with SiN passivation increases with the enhancement of temperature in the range from 298 K to 423 K. Three possible transport mechanisms are proposed and examined to explain the generation of reverse surface leakage current. By comparing the experimental data with the numerical transport models, it is found that neither Fowler–Nordheim tunneling nor Frenkel–Poole emission can describe the transport of reverse surface leakage current. However, good agreement is found between the experimental data and the two-dimensional variable range hopping (2D-VRH) model. Therefore, it is concluded that the reverse surface leakage current is dominated by the electron hopping through the surface states at the barrier layer. Moreover, the activation energy of surface leakage current is extracted, which is around 0.083 eV. Finally, the SiN passivated HEMT with a high Al composition and a thin AlGaN barrier layer is also studied. It is observed that 2D-VRH still dominates the reverse surface leakage current and the activation energy is around 0.10 eV, which demonstrates that the alteration of the AlGaN barrier layer does not affect the transport mechanism of reverse surface leakage current in this paper.

Predictions and measurements of interfacial adhesion among encapsulated thin films of flexible devices

This study employed the four-point bending test (4-PBT) to measure the interfacial strength of pressure-sensitive adhesive (PSA)/SiN passivation stacked thin films. Finite element analysis (FEA) is combined with the J integral approach and the modified virtual crack closure technique to validate the results of 4-PBT. The FEA simulation results verify the measurement results. The stress status and energy release rate of the delaminated tip are also determined at different elevations of stacked thin films of 4-PBT specimens adjacent to the PSA/SiN interface. The crack in the PSA parallel to the foregoing interface with a slight span occurs on the fractured interface. This behavior is confirmed by observing the scanning electron micrographs of the specimens after 4-PBT.

Investigation of the Passivation Layers Influence on Capacitance Characteristics of AlGaN/GaN Heterostructures

AlGaN/GaN heterostructures grown by MOCVD method on sapphire and silicon substrates were test subjects. The capacity− voltage characteristic measurements have been run in 200Hz — 1MHz frequency range at planar disposition of mercury and second probe on the sample surface. The shape of typical C−V curves for the heterostructures with the upper undoped i−AlGaN and i−GaN layers at thickness 15—25 A have been analyzed. The appearance of a typical peak on the C−V curves at changing from depletion region to accumulation region has been registered for some structures with thickness of i−GaN layer 50A at low frequencies (f < 50—200 kHz). The height of this peak increased with reduction of frequency. It has been found experimentally that frequency at which the peak is registered can depend on the dislocation density in heterostructures. Possible explanation of the peak formation and band diagram modifications in these structures under an applied electric field have been presented. We show that using a Si3N4 passivation layer results in the formation of additional positive charge.

Label free sensing of creatinine using a 6 GHz CMOS near-field dielectric immunosensor.

In this work we present a CMOS high frequency direct immunosensor operating at 6 GHz (C-band) for label free determination of creatinine. The sensor is fabricated in standard 0.13 μm SiGe:C BiCMOS process. The report also demonstrates the ability to immobilize creatinine molecules on a Si3N4 passivation layer of the standard BiCMOS/CMOS process, therefore, evading any further need of cumbersome post processing of the fabricated sensor chip. The sensor is based on capacitive detection of the amount of non-creatinine bound antibodies binding to an immobilized creatinine layer on the passivated sensor. The chip bound antibody amount in turn corresponds indirectly to the creatinine concentration used in the incubation phase. The determination of creatinine in the concentration range of 0.88-880 μM is successfully demonstrated in this work. A sensitivity of 35 MHz/10 fold increase in creatinine concentration (during incubation) at the centre frequency of 6 GHz is gained by the immunosensor. The results are compared with a standard optical measurement technique and the dynamic range and sensitivity is of the order of the established optical indication technique. The C-band immunosensor chip comprising an area of 0.3 mm(2) reduces the sensing area considerably, therefore, requiring a sample volume as low as 2 μl. The small analyte sample volume and label free approach also reduce the experimental costs in addition to the low fabrication costs offered by the batch fabrication technique of CMOS/BiCMOS process.

Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed \(I-V\) Measurement

In this letter, we investigated the behaviors of surface- and buffer-induced current collapse in AlGaN/GaN high-electron mobility transistors (HEMTs) using a soft-switched pulsed \(I-V\) measurement with different quiescent bias points. It is found that the surface- and buffer-related current collapse have different relationship with the gate and drain biases ( V \(_{\mathrm { {\!GS0,}}}\) V \(_{\mathrm { {\!DS0}}}\) ) during quiescent bias stress. The surface-induced current collapse in devices without passivation monotonically increases with the negative V \(_{\mathrm { {\!GS0}}}\) , suggesting that an electron injection to the surface from gate leakage is the dominant mechanism and the Si3N4 passivation could effectively eliminate such current collapse. The buffer-induced current collapse in devices with intentionally carbon-doped buffer layer exhibits a different relationship with V \(_{\mathrm { {\!GS0}}}\) after surface passivation. The buffer-related current collapse shows a bell-shaped behavior with V \(_{\mathrm { {\!GS0}}}\) , suggesting that a hot electron trapping in the buffer is the dominant mechanism. The soft-switched pulsed \(I-V\) measurement provides an effective method to distinguish between the surface- and buffer-related current collapse in group III-nitride HEMTs.