Silicon Trench Research Articles

Low-damage silicon etching using a neutral beam

A low-damage silicon etching technology for fabricating microelectromechanical system (MEMS) devices using a neutral beam is reported. Neutral beams were produced from Cl2 plasma in an etching apparatus and were used to etch silicon trenches and MEMS devices. Si trench etch rate depended on the bias voltage applied to an aperture, used to produce the neutral beam. Etch rate decreased with increasing Si trench aspect ratio. This trend was minimized by enlarging the aspect ratio of through-holes in the aperture. The silicon trench profile was influenced by the aspect ratio of through-holes in the aperture. Etched Si surfaces were smooth, and no damage/defects were observed by transmission electron microscopy. Si etching of MEMS devices with smooth surfaces and scallop free sidewalls was achieved. The mechanical characteristics of an oscillator etched with the neutral beam were superior to those of that etched using a conventional Bosch process.

Discovery during Hydrogen Annealing: Formation of Nanoscale Fluorocarbon Tubular Structures

A novel fabrication method for nanoscale tubular structures is presented in this paper. The tubular structures can be obtained by heating single-crystal silicon trenches or pillars formed by the inductively coupled plasma reactive-ion etching (ICP-RIE) Bosch process in hydrogen ambient. The importance of initial vacuum in the reaction chamber for tube formation and the tube formation mechanism were discussed. The components and sidewall size of the tubular structure were also studied to verify that the tube is made of the fluorocarbon (CF) passivation layer deposited by the Bosch process. The CF tubular structure would be a promising structure for BioMEMS.

Tunable Microcavity Based on Macroporous Silicon: Feasibility of Fabrication

Simultaneous electrochemical etching of deep pores and trenches in silicon was used to fabricate a two-dimensional, photonic crystal slab (PCS). The structure consists of five rows of macro-pores on both sides of a trench-defect, filled with a nematic liquid crystal. Polarized reflection and transmission spectra from the fabricated structure were investigated in the mid-infrared spectral range and were compared with spectra calculated using a scattering matrix method. In order to obtain agreement between the experimental and calculated spectra, a model structure with a complex refractive index of silicon was introduced. This enabled us to take into account losses related to light scattering at the inner surfaces of pores and trenches within the structure. The influence of these losses on the amplitude of the defects and surface Tamm states was analysed using this model. The Tamm states originate from the unstructured Si layer at the interface of the structure and the external medium, air in this case. A quantitative evaluation of the losses was performed by extracting a coefficient from a fit to the experimental spectra. This coefficient was utilised to determine the dependence of the micro-cavity parameters on the number of periods in the PCS. We conclude that a micro-cavity based on macro-porous silicon should not have more than three periods on each side of a defect.

Silicon-Embedding Approaches to 3-D Toroidal Inductor Fabrication

This paper presents complementary-metal-oxide-semiconductor-compatible silicon-embedding techniques for on-chip integration of microelectromechanical-system devices with 3-D complex structures. By taking advantage of the “dead volume” within the bulk of the silicon wafer, functional devices with large profile can be embedded into the substrate without consuming valuable die area on the wafer surface or increasing the packaging complexity. Furthermore, through-wafer interconnects can be implemented to connect the device to the circuitry on the wafer surface. The key challenge of embedding structures within the wafer volume is processing inside deep trenches. To achieve this goal in an area-efficient manner, straight-sidewall trenches are desired, adding additional difficulty to the embedding process. Two approaches to achieve this goal are presented in this paper, i.e., a lithography-based process and a shadow-mask-based process. The lithography-based process utilizes a spray-coating technique and proximity lithography in combination with thick epoxy processing and laminated dry-film lithography. The shadow-mask-based process employs a specially designed 3-D silicon shadow mask to enable simultaneous metal patterning on both the vertical sidewall and the bottom surface of the trench during deposition, eliminating multiple lithography steps and reducing the process time. Both techniques have been demonstrated through the embedding of the topologically complex 3-D toroidal inductors into the silicon substrate for power supply on-chip (PwrSoC) applications. Embedded 3-D inductors that possess 25 turns and a diameter of 6 mm in a silicon trench of 300-μm depth achieve overall inductances of 45-60 nH, dc resistances of 290-400 mΩ, and quality factors of 16-17.5 at 40-70 MHz.

Fabrication and evaluation of a free molecule micro-resistojet with thick silicon dioxide insulation and suspension

A silicon free molecule micro-resistojet (FMMR) with a thermally insulating suspension frame composed of silicon dioxide has been designed, fabricated and tested. The concept was developed to increase the efficiency of FMMRs, especially in silicon-based integrated systems. Fabrication of the thick insulating frame was performed through oxidation of high-aspect ratio silicon trenches. The thermal properties of the 1 cm2 thruster were evaluated using an IR camera, and it was found that when the volume inside the frame is heated more than 200 °C using integrated nickel heaters, the temperature increase in the volume outside the frame is less than 50 °C. During operation in vacuum, the thrust range was calculated to be about 13–1070 µN and the maximum specific impulse 54 s. At maximum thrust, and a power consumption of 1.6 W, the total efficiency of the thruster was 17%. Designs of more efficient and versatile systems are discussed.

High Resolution Patterning for Sub 30 nm Technology Nodes Using a Ceramic Based Dual Hard Mask

A dual hard mask concept for high resolution patterning has been evaluated with focus on highly selective etching processes for semiconductor manufacturing. The integration of thin SiO2 and ZrO2 hard mask materials enables highly selective patterning via plasma etch processes for future technology nodes. The patterning sequence is demonstrated for hole arrays with sizes down to 25 nm using a 50 nm thin resist which leads to the fabrication of trenches in silicon with aspect ratios up to 20:1. Alternative ZrO2 based materials were investigated with focus on surface roughness reduction since it influences the final line edge roughness (LER). Here Si-doped ZrO2 (ALD) was compared to the undoped and crystalline ZrO2 as main selective material.

A Study of Sigma-Shaped Silicon Trench Formation

The strict shape control of sigma-shaped silicon trench has to leverage the dry etch process coupled with the appropriate post-etch treatment (PET). Here we addressed the strong link between the shape of dry etch based silicon recess and its effect on the definition of final sigma-shaped trench. Experiment results indicate the critical physical parameters of final sigma-shape silicon trench could be predicted by means of geometry analysis and monitoring dry etching related recess in bulk silicon. Besides, we also noticed the effect of pattern-dependent depth loading at dense areas. Organic polymer generated during etch process tends to introduce the trench depth variation. Polymer lean etch process has been proven as one of effective knobs to overcome such loading to some extent. In addition, the oxidation capacity of post-etch treatment can not be ignored. The ultra-thin silicon oxide film on silicon trench sidewall must be completely removed by dilute hydrofluoric acid before PET to avoid the possible trench depth loading.

Direct machining of curved trenches in silicon with femtosecond accelerating beams

Control of the longitudinal profile of ablated structures during laser processing is a key technological requirement. We report here on the direct machining of trenches in silicon with circular profiles using femtosecond accelerating beams. We describe the ablation process based on an intensity threshold model, and show how the depth of the trenches can be predicted in the framework of a caustic description of the beam.

Single cell detection using a magnetic zigzag nanowire biosensor

A magnetic zigzag nanowire device was designed for single cell biosensing. Nanowires with widths of 150, 300, 500, and 800 nm were fabricated on silicon trenches by electron beam lithography, electron beam evaporation, and lift-off processes. Magnetoresistance measurements were performed before and after the attachment of a single magnetic cell to the nanowires to characterize the magnetic signal change due to the influence of the magnetic cell. Magnetoresistance responses were measured in different magnetic field directions, and the results showed that this nanowire device can be used for multi-directional detection. It was observed that the highest switching field variation occurred in a 150 nm wide nanowire when the field was perpendicular to the substrate plane. On the other hand, the highest magnetoresistance ratio variation occurred in a 800 nm wide nanowire also when the field was perpendicular to the substrate plane. Besides, the trench-structured substrate proposed in this study can fix the magnetic cell to the sensor in a fluid environment, and the stray field generated by the corners of the magnetic zigzag nanowires has the function of actively attracting the magnetic cells for detection.

Cylindrical glass nanocapillaries patterned via coarse lithography (>1 μm) for biomicrofluidic applications.

We demonstrate a new method of fabricating in-plane cylindrical glass nanocapillaries (<100 nm) that does not require advanced patterning techniques but the standard coarse photolithography (>1 μm). These nanocapillaries are self-enclosed optically transparent and highly regular over large areas. Our method involves structuring μm-scale rectangular trenches in silicon, sealing the trenches into enclosed triangular channels by depositing phosphosilicate glass, and then transforming the channels into cylindrical capillaries through shape transformation by the reflow of annealed glass layer. Extended anneal has the structures shrunk into nanocapillaries preserving their cylindrical shape. Nanocapillaries ∼50 nm in diameter and effective stretching of digested λ-phage DNA in them are demonstrated.

High Aspect Ratio Sub‐15 nm Silicon Trenches From Block Copolymer Templates

High-aspect-ratio sub-15-nm silicon trenches are fabricated directly from plasma etching of a block copolymer mask. A novel method that combines a block copolymer reconstruction process and reactive ion etching is used to make the polymer mask. Silicon trenches are characterized by various methods and used as a master for subsequent imprinting of different materials. Silicon nanoholes are generated from a block copolymer with cylindrical microdomains oriented normal to the surface.

Micromachining along a curve: Femtosecond laser micromachining of curved profiles in diamond and silicon using accelerating beams

We report femtosecond laser micromachining of micron-size curved structures using tailored accelerating beams. We report surface curvatures as small as 70 μm in both diamond and silicon, which demonstrates the wide applicability of the technique to materials that are optically transparent or opaque at the pump laser wavelength. We also report the machining of curved trenches in silicon. Our results are consistent with an ablation-threshold model based on calculated local beam intensity, and we also observe asymmetric debris deposition which is interpreted in terms of the optical properties of the incident accelerating beam.

Characterization of low-temperature bulk micromachining of silicon using an SF6/O2 inductively coupled plasma

The principal aim of this work was to characterize deep silicon etching at sample temperatures well below room temperature, using an SF6/O2 inductively coupled plasma for micro-electro-mechanical systems applications. In this paper, a study of the etch rates and etch profiles of deep silicon trenches has been undertaken for a series of etching parameters, including RF power, sample stage temperature and O2 gas flow rate. Based on the experimental observations, the formation of an SiOxFy passivation layer, the rate of ion collision through the sheath field and the silicon crystallographic orientation are found to be the three main parameters that affect the etching process. In addition, the formation mechanism of ‘black silicon’ (nanopillar-based Si structures) has also been proposed based on the experimental data and a simple physical model. For the purpose of silicon bulk micromachining, an optimized recipe has been developed that is suitable for the fabrication of high aspect ratio Si cantilevers on silicon-on-insulator-based waveguide wafers.

Advances in Modeling, Design, and Fabrication of Deep-Etched Multilayer Resonators

We present recent advances in modeling, design, and fabrication of in-plane multilayer optical resonators fabricated by high aspect ratio etching of silicon. We first revisit the model of Gaussian beam divergence proposed by A. Lipson to correct a mistake that leads to an underestimation of the losses affecting this type of resonator. Secondly, we discuss the influence of surface roughness at the silicon-air interfaces of multilayered structures. Roughness profiles-measured by white light interferometry on the sidewalls of silicon trenches etched by deep reactive ion etching (DRIE)-are presented. The single absorbing layer model of Carniglia is used to predict the influence of the measured roughness ( nm RMS). This model is combined with the corrected model for Gaussian beam divergence and is compared with recent experimental results obtained for a new generation of deep-etched Fabry-Perot refractive index sensors. These sensors are fabricated using the contour lithography method, which is demonstrated to greatly improve the predictability of their optical characteristics. The combined model for roughness and divergence is found to correspond remarkably well with the experimental results, with predictions of loss and finesse of the resonances within an average error of 1.3 dB and 25%, respectively. We therefore expect the models and the simulations presented in this article to become a useful tool for the design of devices based on deep-etched multilayer resonators.

A Study of Dry Etching Process for Sigma-Shaped Si Recess

The fabrication of sigma-shaped silicon recess normally consists of dry etch process to shape the silicon trench and post etch treatment to form the sigma-shaped cavity within bulk silicon substrate. Here we are dedicated to the optimization of silicon recess dry etch process and its effect on the final sigma-shaped SiGe physical performance. Results show the isotropic ratio of horizontal over vertical direction could be doubled. This caters much larger process window for the desired strain introduction at the hetero-junction of SiGe/Si. Besides, the corresponding dry etching solutions are also disclosed from the point of view of tip depth adjustment and tip horizontal pull-back control. Both physical indexes could be independently controlled to deliver the required sigma-shaped Si recess trench.

Ku-band bandpass filters using novel micromachined substrate integrated waveguide structure with embedded silicon vias in benzocyclobutene dielectrics

In this paper, Ku-band bandpass filters (BPFs) based on a novel micromachined substrate integrated waveguide (SIW) platform with square complementary split-ring resonators (CSRRs) have been demonstrated. The proposed SIW platform adopts embedded metal-coated silicon vias in benzocyclobutene (BCB) dielectric substrate filled into a silicon trench. Unlike conventional SIW BPFs using classical microwave substrates, the proposed BPFs can be integrated with silicon-based circuits or RF MEMS devices since the fabrication process is fully compatible with the silicon process while providing low-loss properties of the waveguide. Three types of BPFs using CPW and microstrip feeding configurations have been designed and fabricated. The microstrip-fed BPF using the same CSRRs shows an improved insertion loss of 1.39dB at 13.8GHz with reduced device size compared to the CPW-fed BPF which has an insertion loss of 2.27dB at 14.1GHz. The microstrip-fed BPF with different CSRR configurations designed to improve shape factor shows an attenuation factor of 124dB/GHz, with an insertion loss of 2.3dB at 21.2GHz.

Elaboration of high aspect ratio monocrystalline silicon suspended nanobridges by low temperature alkaline treatment of dry etched trenches

This paper describes the elaboration of high aspect ratio (250), high linear density (500 cm−1) suspended silicon nanobridges into low concentrated alkaline solutions. Trenches were first etched into silicon using the deep reactive ion etching STiGer process. These structures were immersed into low concentrated potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH) solutions. The behaviors of KOH and TMAH as silicon trenches etching agents (kinetic and quality of etching) were studied to optimize the silicon nanowires (SiNWs) formation and the elaboration of the suspended structures. The limits of the SiNWs thickness in these conditions were also discussed.

A MEMS Microreed Switch With One Reed Embedded in the Silicon Substrate

This paper presents design, fabrication, and characterization of a novel microelectromechanical microreed switch, which consists of two Ni <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">80</sub> Fe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">20</sub> magnetic plates as microreeds. One is embedded in a silicon trench. The other is suspended above the substrate and supported by a pair of crab-leg flexures from the two sides. Both Ni <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">80</sub> Fe <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">20</sub> plates are split into two long, narrow strips to improve the sensitivity. The switch is actuated by bringing an external magnet closer to the switch. The magnetic field required to turn on the switch can be as low as 0.5 mT and the initial contact resistance is <; 10 Ω with gold contacts. The switch has been tested to pass more than 40 million hot switching cycles at 2 mA current at room temperature when packaged at wafer level with SU-8 sealing. The die size is 1.7 × 1.8 × 1.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> . The proposed microreed switch can be used as the proximity sensor to sense the magnetic field. It also has the potential to replace the conventional reed switch in portable electronics, such as cellular phones, hearing aids, and laptops, where conserving battery power and device size is critical.

Introduction of zirconium oxide in a hardmask concept for highly selective patterning of scaled high aspect ratio trenches in silicon

The fabrication of high aspect ratio silicon trenches (critical dimension<100nm, aspect ratio>10:1) by dry etch processing has proven to be a challenge mainly due to limited etch selectivity of conventional hardmask materials to Si. Moreover, for future technology nodes the hardmask thickness will be limited by the thickness of the photoresist. This work focuses on a concept to enable the usage of very thin resist layers (<100nm) for patterning of silicon trenches by the integration of an unconventional hardmask stack consisting of SiO2 and ZrO2. Deposition of such material films has been investigated, as well as e-beam lithography exposure and finally pattern transfer by dry etching. Using this hardmask stack and 100nm thin resist, the fabrication of 35nm wide trenches with an aspect ratio of ~20:1 is demonstrated revealing a very high selectivity (>100:1) of the ZrO2 layer to Si during the deep silicon etch. A silicon etch rate>1.5μm/min was achieved. The ZrO2 layer itself provides the main selectivity improvements of the final hardmask stack.

A density functional theory study on the reactions of chlorine loss in ZrO 2 thin films by atomic-layer deposition

The chlorine loss reactions of ZrO 2 thin films of atomic layer deposition on the hydroxylated silicon surface have been studied by the density functional theory. Fourteen possible pathways are designed to investigate the detailed chlorine loss reaction mechanism based on the two-dimer trench silicon cluster model. Experiment shows that HCl self-elimination is the dominant reaction pathway at the low temperatures, and that hydrolysis is the dominant pathway at elevated temperatures for the second chlorine loss reaction. However, our calculations show that raising temperature would not result in HCl self-elimination reaction to be unfavorable. Therefore, the decrease of the number of hydroxyls is the possible reason. In addition, for the four chlorines loss, the reactions on the two-dimer cluster across the trench are compared with those on the same dimer cluster from the viewpoint of energy.