Silicon Single-electron Research Articles

Probing a single nuclear spin in a silicon single electron transistor

We study single electron transport across a single Bi dopant in a silicon nanotransistor to assess how the strong hyperfine coupling with the Bi nuclear spin I = 9/2 affects the transport characteristics of the device. In the sequential tunneling regime we find that at, temperatures in the range of 100 mK, dI/dV curves reflect the zero field hyperfine splitting as well as its evolution under an applied magnetic field. Our non-equilibrium quantum simulations show that nuclear spins can be partially polarized parallel or antiparallel to the electronic spin just tuning the applied bias.

Few electron limit of n-type metal oxide semiconductor single electron transistors

We report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 × 20 nm2 is obtained by employing electron beam lithography for active and gate level patterning. The Coulomb blockade stability diagram is precisely resolved at 4.2 K and it exhibits large addition energies of tens of meV. The confinement of the electrons in the quantum dot has been modeled by using a current spin density functional theory (CS-DFT) method. CMOS technology enables massive production of SETs for ultimate nanoelectronic and quantum variable based devices.

A hybrid double-dot in silicon

We report electrical measurements of a single arsenic dopant atom in the tunnel barrier of a silicon single-electron transistor (SET). In addition to performing the electrical characterization of the individual dopant, we study the series electrical transport through the dopant and SET. We measure the triple points of this hybrid double-dot, using simulations to support our results, and show that we can tune the electrostatic coupling between the two sub-systems.

Microwave driven arbitrary coupling between trapped charge resonances in a silicon single electron transistor

We report controllable coupling between coherent excitations in a silicon transistor, which is useful for double-qubit gate operation. Coupling interactions may be directed by adjusting the gate voltage in a semiconductor device or by an additional flux in a superconducting device. Here, we demonstrate an alternative approach to coupling by exploiting the nonlinear behavior of the silicon transistor. Microwave spectroscopy on a DC-biased transistor has previously been found to indicate the presence of coherent oscillating electrons. We couple two such resonances by using triple-frequency spectroscopy, where the third frequency corresponds to the frequency difference between the two on-resonance frequencies.

Defect detection in nano-scale transistors based on radio-frequency reflectometry

Radio-frequency reflectometry in silicon single-electron transistors (SETs) is presented. At low temperatures (<4 K), in addition to the expected Coulomb blockade features associated with charging of the SET dot, quasi-periodic oscillations are observed that persist in the fully depleted regime where the SET dot is completely empty. A model, confirmed by simulations, indicates that these oscillations originate from charging of an unintended floating gate located in the heavily doped polycrystalline silicon gate stack. The technique used in this experiment can be applied for detailed spectroscopy of various charge defects in nanoscale SETs and field effect transistors.

Fabrication of hybrid metal island/silicon single electron transistor

A novel process for silicon single electron transistors (Si-SET) is presented, combining chemical mechanical polishing (CMP) with the advantages of silicon processing. To eliminate effects caused by random distribution of dopants in the island, The Si-SET’s doped-Si island is replaced with an aluminum or tantalum island by integrating a metal CMP technique with our nano-encapsulation process. The fabricated hybrid Al-island Si-SET has ∼10 nm silicon on insulator lines as the source and drain leads. It shows characteristic Coulomb blockade oscillations with a charging energy of ∼4 meV. The fabrication results demonstrate the scalability of the SET island and the tunnel junction size in a manufacturable top-down approach.

Mass Production of Silicon MOS-SETs: Can We Live with Nano-Devices’ Variability?

It is very important to study variability of nanodevices because the inability to produce large amounts of identical nanostructures is eventually a bottleneck for any application. In fact variability is already a major concern for CMOS circuits. In this work we report on the variability of dozens of silicon single-electron transistors (SETs). At room temperature their variability is compared with the variability of the most advanced CMOS FET i.e. the ultra thin Silicon-on-Insulator Multiple gate FET (UT SOI MuGFET). We found that dopants diffused from Source –Drain into the edge of the undoped channel are the main source of variability. This emphasizes the role of extrinsic factors like the contact junctions for variability of any nanodevice.

Microwave-assisted transport via localized states in degenerately doped Si single electron transistors

Resonant microwave-assisted and dc transport are investigated in degenerately doped silicon single electron transistors. A model based on hopping via localized impurity states is developed and first used to explain both the dc temperature dependence and the ac response. In particular, the non-monotonic power dependence of the resonant current under irradiation is proved to be consistent with spatial Rabi oscillations between these localized states.

Electron tunnel rates in a donor-silicon single electron transistor hybrid

We investigate a hybrid structure consisting of $20\pm4$ implanted $^{31}$P atoms close to a gate-induced silicon single electron transistor (SiSET). In this configuration, the SiSET is extremely sensitive to the charge state of the nearby centers, turning from the off state to the conducting state when the charge configuration is changed. We present a method to measure fast electron tunnel rates between donors and the SiSET island, using a pulsed voltage scheme and low-bandwidth current detection. The experimental findings are quantitatively discussed using a rate equation model, enabling the extraction of the capture and emission rates.

Charge sensing in intrinsic silicon quantum dots

We report charge sensing measurements on a silicon quantum dot with a nearby silicon single electron transistor (SET) acting as an electrometer. The devices are electrostatically formed in bulk silicon using surface gates. We show that as an additional electron is added onto the quantum dot, a charge is induced on the SET of approximately 0.2e. These measurements are performed in the many electron regime, where we can count in excess of 20 charge additions onto the quantum dot.

Multiple microwave resonance interaction in silicon single-electron transistors

Silicon single-electron transistors are promising nanodevices for implementation of quantum logic gates. Single frequency continuous wave microwave spectroscopy, carried out under cryogenic conditions on dc biased degenerately doped transistors have previously shown many high quality factor resonances in the drain current modulation, indicating the presence of long-lived excitations. However, such measurements are unable to indicate coupled behaviour between the systems undergoing resonance. Coupled behaviour is a necessary precursor for quantum gate operation. In this work, we investigate the response of devices to two frequency continuous wave microwave spectroscopy, which is a potential method for induced coupling.

Hydrogen silsesquioxane electron beam lithography for ultra-small single electron transistors in silicon on insulator

A process for the fabrication of ultra-small silicon single electron transistors with 10 nm constrictions and 40 nm island diameters based on electron beam lithography with hydrogen silsesquioxane negative resist and reactive ion etching of a thin silicon on insulator device layer is presented. The observed Coulomb blockade at room temperature indicates that even at this size small dopant clusters are formed in highly doped material and act as effective islands in a multi-junction device.

Electron spin blockade and singlet-triplet transition in a silicon single electron transistor

We investigate a silicon single electron transistor in a metal-oxide-semiconductor structure by applying a magnetic field perpendicular to the sample surface. The quantum dot is defined electrostatically in a point-contact channel and by potential barriers probably from negatively charged interface traps. The magnetic field dependence of the excitation spectrum mostly can be attributed to the Zeeman effect. In the two-electron singlet-triplet (ST) transition, electron-electron Coulomb interaction plays a significant role. The evolution of Coulomb blockade peak positions with magnetic field $B$ is also owing to the Zeeman splitting with no obvious orbital effect up to 9 T. The filling pattern shows an alternate spin-up-spin-down sequence. The observed amplitude spectrum can be explained by the spin-blockade effect. When the two-electron system forms a singlet state at low magnetic fields, and the injection current from the lead becomes spin-down polarized, the tunneling conductance is reduced by a factor of 8. At higher fields, due to the ST transition, the spin-blockade effect is lifted and the conductance is fully recovered.

Cryogenic instrumentation for fast current measurement in a silicon single electron transistor

We present a realization of high bandwidth instrumentation at cryogenic temperatures and for dilution refrigerator operation that possesses advantages over methods using radio frequency single electron transistor or transimpedance amplifiers. The ability for the low temperature electronics to carry out faster measurements than with room temperature electronics is investigated by the use of a phosphorous-doped single electron transistor. A single shot technique is successfully implemented and used to observe the real-time decay of a quantum state. A discussion on various measurement strategies is presented and the consequences on electron heating and noise are analyzed.

Microwave excitation of localized electrons in phosphorus-doped silicon single electron transistors

We investigate the effect of microwave irradiation on the source-drain current of a silicon single electron transistor, with fixed source-drain and gate voltages, at a temperature of 4 K. The source-drain current can be increased, decreased, or even reversed by the radiation, depending on the microwave frequency and dc bias conditions. Some of the source-drain current changes take the form of sharp resonances with high quality factor. We investigate the effect of the microwave irradiation coupling method on the form of these resonances. The coupling method does not modify the center frequency of the resonances however it does alter the resonance shape. We discuss the origin of these resonant features and propose that they originate from the microwave induced spatial redistributions of localized electrons in the single electron transistor.

Single shot measurement of a silicon single electron transistor

We have fabricated a custom cryogenic complementary metal-oxide-semiconductor integrated circuit that has a higher measurement bandwidth compared to conventional room temperature electronics. This allowed implementing single shot operations and observe the real-time evolution of the current of a phosphorus-doped silicon single electron transistor that was irradiated with a microwave pulse. Relaxation times up to 90μs are observed, suggesting the presence of well isolated electron excitations within the device. It is expected that these are associated with long decoherence time and the device may be suitable for quantum information processing.

Silicon single-electron transistor with oxide tunnel barriers fabricated using chemical mechanical polishing

This article describes the fabrication process for a silicon single-electron transistor (Si-SET) with tunnel barriers made of thermal silicon dioxide. The fabrication method uses electron-beam lithography, dry etching, and chemical mechanical polishing to make devices with well-defined geometry and good yield. The method introduces chemical mechanical polishing as a key processing technique in the production of nanometer scale features required for the device. The fabricated SETs show charging energies in excess of 20meV and operating temperatures above liquid nitrogen. All the process steps are fully compatible with the current complementary metal oxide semiconductor (CMOS) technology and combined with the higher operating temperature of the SETs, the fabrication method paves the way for designing of hybrid CMOS-SET architectures. Si-SET can also be a key enabling device for the manufacturable implementation of quantum-dot cellular automata.

Impact of channel constrictions on the formation of multiple tunnel junctions in heavily doped silicon single electron transistors

This paper reports the study of the uncontrolled multiple tunnel junctions (MTJs) induced by the random dopants in heavily doped silicon single electron transistors (SETs). The SETs are fabricated by making dual lateral constrictions in the narrow doped silicon channel formed on a silicon on insulator substrate. The doped SETs with relatively long constriction regions invariably exhibit the MTJ characteristics. The influence of the MTJs is suppressed by tuning the Fermi level in the constriction region. Finally, we show that the formation of uncontrolled MTJs can be avoided by making extremely sharp constrictions.

On the Origin of Negative Differential Conductance in Ultranarrow-Wire-Channel Silicon Single-Electron and Single-Hole Transistors

The origin of negative differential conductance (NDC) is investigated in both a silicon single-electron transistor (SET) and single-hole transistor (SHT) with a common ultranarrow wire channel, focusing on the effect of electrically capacitive coupling, for the first time. First, Coulomb blockade oscillations are observed at room temperature by using an n-type/p-type common-ultranarrow-wire-channel metal–oxide–semiconductor field-effect transistor (MOSFET), and it is found that an ultrasmall silicon dot and high tunneling barriers can be formed in the ultranarrow wire channel for both electron carriers and hole carriers. Then, clear NDC due to large quantum confinement in the ultrasmall silicon quantum dot is observed in both the SET and the SHT under opposite bias conditions. Electrically capacitive coupling between the silicon dot and the electrodes through the tunneling barriers strongly controls the occurrence of NDC in both the SET and the SHT.

Strongly coupled multiple-dot characteristics in dual recess structured silicon channel

Silicon single electron transistors were fabricated by using the highly doped silicon channel with dual recess structure along with two recess gates and one central island gate as a pattern. The transition of Coulomb oscillation characteristics from a single dot to a strongly coupled multiple dot was demonstrated for the different oxidation times and recess dimensions. The multiple-dot characteristic in the longer post lithography oxidized sample is attributed to the formation of a single dot in each recess due to the stress induced pattern-dependent oxidation, which leads to multiple dot in the channel. The temperature variation measurement, which was performed after two thermal cycling of the same sample to 20 and 4.2K with 1month gap, revealed the highly stable nature of the multiple-dot device transport characteristics. The multiple-dot device can also be operated as a unique nonlinear tunable resistance single electron transistor.