Silicon Photonic Switch Research Articles

Foundry-Enabled Scalable All-to-All Optical Interconnects Using Silicon Nitride Arrayed Waveguide Router Interposers and Silicon Photonic Transceivers

This paper summarizes our latest results of integrated all-to-all optical interconnect systems using compact, low-loss silicon nitride (SiN) arrayed waveguide grating router (AWGR) through AIM photonics’ multiple-project-wafer services. In particular, we have designed, taped out, and initially characterized a chip-scale silicon photonic low-latency interconnect optical network switch (Si-LIONS) system with an 8 × 8 200 GHz spacing cyclic SiN AWGR, 64 microdisk modulators, and 64 on -chip germanium photodector (PD). The 8 × 8 SiN AWGR in design has a measured insertion loss of 1.8 dB and a crosstalk of –13 dB, with a footprint of 1.3 mm × 0.9 mm. We measured an error-free performance of the microdisk modulator at 10 Gb/s upon 1Vpp voltage swing. We demonstrated wavelength routing with error-free data transmission using the on -chip modulator, SiN AWGR, and an external PD. We have designed and taped out the optical interposer version of the all-to-all system using SiN waveguides and low-loss chip-to-interposer couplers. Finally, we illustrate our preliminary designs and results of 16 × 16 and 32 × 32 SiN AWGRs, and discuss the possibility of scaling beyond 1024 × 1024 all-to-all interconnections with reduced number of wavelengths (e.g., 64) using the Thin-CLOS architecture.

Nonduplicate Polarization-Diversity 32 × 32 Silicon Photonics Switch Based on a SiN/Si Double-Layer Platform

We fabricate and characterize a polarization-diversity 32 × 32 silicon photonics switch by newly introducing SiN overpass waveguides onto our nonduplicate polarization-diversity path-independent insertion-loss switch. The SiN overpass waveguides are used to simplify the optical paths with a uniform path length between the edge couplers and the switch matrix and significantly reduce the number of waveguide intersections. The switch chip is fabricated using a 300-mm silicon-on-insulator wafer pilot line. The fabricated switch comprises more than 7,600 components, making this the largest ever complementary-metal-oxide-semiconductor-based silicon photonics circuit. The switch chip is electrically and optically packaged and evaluated for a sampled port connection with 32 paths, with an average on-chip loss of ∼35 dB and an average polarization-dependent loss of 3.2 dB where 75% of the measured paths exhibit a loss of less than 3 dB. The differential group delay is measured to be 1.7 ps. The performance can be further improved by optimizing the device design.

Multicast silicon photonic MEMS switches with gap-adjustable directional couplers.

We report on 4x20 silicon photonic MEMS switch that is capable of multicasting. The switch is built on passive optical crossbar network with gap-adjustable directional couplers. The switch has high on-off extinction ratio (59 dB), low insertion loss (< 4.0 dB), small footprint (1.2x4.5 mm2), and fast response (9.8 µs). The switching voltage is 9.6 V and 20 dB bandwidth is 31.5 nm. One-to-two and one-to-four multicast operations are demonstrated.

Wafer-scale silicon photonic switches beyond die size limit

Fast optical switches have been proposed as a promising alternative to enable continual scaling of data centers with increasing size and data rates. Silicon photonics is a compelling platform for large-scale integrated photonic switches, leveraging advanced manufacturing foundries for electronic integrated circuits. In the past decade, the port counts of silicon photonic switches have increased steadily to 128×128. Further scaling of the switch is constrained by the maximum reticle size (2–3 cm) of lithography tools. Here, we propose to use wafer-scale integration to overcome the die size limit. As a proof of concept demonstration, we fabricated a 240×240 switch by lithographically stitching a 3×3 array of identical 80×80 switch blocks across reticle boundaries. Stitching loss is substantially reduced (0.004 dB) by tapering the waveguide width to 10 μm. The fabricated switch on a 4 cm×4 cm chip exhibits a maximum on-chip loss of 9.8 dB, an ON/OFF ratio of 70 dB, and switching times of less than 400 ns. To our knowledge, this is the largest integrated photonic switch ever reported. The loss-to-port count ratio (0.04 dB/port) is also the lowest.

State of the Art and Perspectives on Silicon Photonic Switches.

In the last decade, silicon photonic switches are increasingly believed to be potential candidates for replacing the electrical switches in the applications of telecommunication networks, data center and high-throughput computing, due to their low power consumption (Picojoules per bit), large bandwidth (Terabits per second) and high-level integration (Square millimeters per port). This review paper focuses on the state of the art and our perspectives on silicon photonic switching technologies. It starts with a review of three types of fundamental switch engines, i.e., Mach-Zehnder interferometer, micro-ring resonator and micro-electro-mechanical-system actuated waveguide coupler. The working mechanisms are introduced and the key specifications such as insertion loss, crosstalk, switching time, footprint and power consumption are evaluated. Then it is followed by the discussion on the prototype of large-scale silicon photonic fabrics, which are based on the configuration of above-mentioned switch engines. In addition, the key technologies, such as topological architecture, passive components and optoelectronic packaging, to improve the overall performance are summarized. Finally, the critical challenges that might hamper the silicon photonic switching technologies transferring from proof-of-concept in lab to commercialization are also discussed.

Reivew of silicon photonic switches

Silicon photonic switch is recognized as a cost-effective optical switching technology because it has many applications in long-haul telecommunication networks, short-reach data center and high-performance computing. In this paper, the research progress of various silicon photonic switch technologies is reviewed systematically. Firstly, the principles of three kinds of switch technologies including Mach-Zehnder interferometer (thermo-optic and carrier-injection types), micro-ring resonator (thermo-optic and carrier-injection types) and micro-electro-mechanical-system actuated waveguide coupler (electrostatic actuated type) are introduced. The switch technologies with the state-of-the-art insertion loss, crosstalk, switch time, footprint and power consumption are summarized and compared. Then the recent demonstrations of large-port silicon photonic matrix based on the above switch technologies are discussed. In this paper, we also investigate the key technologies such as topological architecture, passive components and optoelectronic packaging, which affect the performance of large-port optical switch matrix. Specifically, we study the scalability of various topologies, low-loss/broadband waveguide components, high-density optical/electrical packaging and control interface to improve the overall performance of the silicon photonic switch matrix. Finally, we discuss the critical technical challenges that might hamper the commercialization of silicon photonic switches and envision their future.

Stable operation of silicon photonic switches in field-deployed optical path network

Stable operation of silicon photonic switches in field-deployed optical path network

Silicon photonic microelectromechanical switch using lateral adiabatic waveguide couplers.

A silicon photonic waveguide switch using adiabatic couplers with lateral comb-drive actuators is designed, fabricated, and tested for microelectromechanical optical matrix switch. One of the waveguides of the adiabatic coupler is moved laterally by three actuators for varying the coupler gap, which enables to switch the path of the waveguides. The coupler waveguides with 250 nm thickness consist of a movable tapered waveguide from 400 nm to 500 nm in width and 50 μm in length and a straight waveguide of 400 nm in width. The three actuators are ultra-small electrostatic comb-drive and move the two movable tapered waveguides. The switch's transmission characteristics were measured as a function of the coupler gap. Around a coupler gap of 109 nm, the port isolation of 16.7 dB was obtained. The switch's insertion loss was roughly estimated to be less than 1 dB. The switching time was 36.7 μsec under the present experimental condition. Moreover, 64 switches were arrayed in a 125 μm period square mash waveguide and an 8 x 8 matrix switch was composed. The matrix switch was also tested.

FDTS as Dewetting Coating for an Electrowetting Controlled Silicon Photonic Switch

The self-assembled monolayer FDTS (1H,1H,2H, 2H-Perfluorodecyltrichlorosilane) is presented as suitable dewetting coating material for an electrowetting on dielectrics (EWOD) controlled silicon photonics switch deployed in fiber optic telecommunication systems. The anti-sticking characteristics of Perfluorodecyltrichlorosilane (FDTS) are compared to those of polytetrafluoroethylene (PTFE) as most common dewetting coating for EWOD devices. It is shown that FDTS could outperform other materials such as PTFE when an extremely thin, long-term stable, and uniform layer is required. In the specific case, FDTS is applied in vapor phase as anti-sticking coating to the active optical surface of the integrated silicon photonics switch thus enabling the EWOD driven liquid motion. The suitability of the coating is presented by contact angle measurements and durability tests carried out with the switching liquids. Finally, it is demonstrated by optical measurements that the FDTS coating has a neglectable influence on the optical switching performance.

Tapless and topology agnostic calibration solution for silicon photonic switches.

We leverage the photo-conductance (PC) effect in doped phase-shifter heaters for both controlling and calibrating Mach-Zehnder interferometer (MZI) switch elements. Both the steady-state and the transient response are experimentally characterized, and compact models for the PC current are developed. Utilizing the PC effect, a topology-agnostic algorithm is then outlined. The calibration procedure is experimentally verified against calibration with external photo-detectors using a non-blocking 4×4 Benes switch consisting of six 2×2 MZIs. It is shown that our PC-based approach agrees with the PD-based procedure within less than 2.5% of difference between the obtained calibrated values. Based on the calibrated PC values, all possible routing configurations are measured for extinction ratio (9.92-21.51dB), insertion loss (0.88-4.59dB), and exhibiting performances far below the 7% FEC limit (bit error rate of 3.8 × 10- 3) using 25 Gbps 4-level pulse-amplitude-modulation signals (PAM4).

Design of a novel nanoscale high-performance phase-change silicon photonic switch

We report the design of a novel high static performance on-off photonic switch by embedding the nanoscale phase-change material Ge2Sb2Te5 into a silicon-on-insulator waveguide. The state of the proposed switch can be changed using electrical/optical pulses, and no electrical bias is needed to maintain a particular state. The fundamental mode propagating through the silicon waveguide drastically alters its properties because of the large index change at the Si-Ge2Sb2Te5 interface and absorption in Ge2Sb2Te5. The photonic switch made of the silicon waveguide embedded with Ge2Sb2Te5 of volume 400 nm × 180 nm × 450 nm (length × height × width) provides a high extinction ratio of 43 dB with a low insertion loss of 2.76 dB in ON state at the communication wavelength of 1550 nm. There is a trade-off between the insertion loss and the extinction ratio. For 10 dB extinction ratio, the insertion loss can be as low as 1.2 dB with an extremely low active volume of 400 nm × 30 nm × 450 nm (length × height × width). Further, spectral response investigations reveal that this switch maintains an extinction ratio of more than 30 dB in the wavelength range of 1500–1600 nm. The high static performance of the photonic switch reported here is a direct consequence of the proper dimensions of the active volume of Ge2Sb2Te5 and its incorporation into the silicon-on-insulator waveguide. We also propose figure-of-merit for bias-free (nonvolatile) photonic switches that considers relevant parameters of static performance.

Silicon Photonic Switch Fabrics: Technology and Architecture

Photonic switching technologies show potential for transforming communication networks across diverse markets from long-haul to short-reach distance scales due to their large bandwidth density, high energy efficiency, and potential for low cost. In recent years, numerous outstanding advancements have been made in scaled silicon photonic switching fabrics: spanning a variety of manufacturing platforms and packaging methods, relying on different switching mechanisms, and assembled on-chip in a diverse mixture of loosely related architectures. This paper reviews the current approaches employed by leading researchers in this area, and surveys the state of the art in achieved performance at both the technological and the architectural level. Specifically, we consider thermo-optic, electro-optic, and MEMS-based switch actuation embedded in Mach–Zehnder interferometer, ring resonator, and directional coupler based silicon photonic switches. We define common metrics and compare performances. We outline critical requirements for constructing scaled switch fabrics from elementary cells. We investigate similarities and differences between a number of commonly utilized topologies. And, we survey recent accomplishments in scaled switch fabrics at the chip and package level. Moving these demonstrations from research to product will require many further advancements, and we highlight areas that we believe will be critical for market adoption.

Integrated Reconfigurable Silicon Photonics Switch Matrix in IRIS Project: Technological Achievements and Experimental Results

This paper reports the performances of a silicon photonics optical switch matrix fabricated by using large-scale three-dimensional (3-D) integration. The wavelength selective optical switch consists of a photonic integrated circuit (PIC), with 1398 circuit elements, interconnected in a 3-D stack with its control electronic integrated circuit (EIC). Each PIC element can be trimmed or reconfigured by using metallic heaters. The EIC is designed to drive the heaters and to read the signal of monitor photodiodes integrated into the PIC. Small footprint and high energy efficiency are achieved in the PIC and the EIC. Automatic wavelength alignment of the optical circuits in the PIC to the ITU grid and fine temperature tuning of each photonic element to optimize the switch insertion losses are obtained by an optimization routine. A fully packaged switch with input/output fibers is tested both for optical and electrical characteristics as well as for the system performances. Fiber-to-fiber insertion losses of about 20 dB and channel isolation of −35 dB are achieved. Bit error rate characteristics at 25 Gb/s are evaluated. Perspective applications of the optical switch in optical transport and intra-data center networks are discussed.

SOA-Integrated Silicon Photonics Switch and Its Lossless Multistage Transmission of High-Capacity WDM Signals

We experimentally demonstrate the lossless transmission of wavelength division multiplexing (WDM) signals through a silicon-photonics 4 × 4 switch with a flip-chip bonded 4-channel semiconductor optical amplifier (SOA). We first optimized the input power and gain of the SOA-integrated switch to obtain the optimum operation point in terms of the transmitted signal quality. We then performed simultaneous transmission of 8-ch, 32-Gbaud, SP 16-QAM WDM (800 Gb/s) signals through all the four paths of the switch. The effect of crosstalk on the switch was very small, and thus could not be observed. We also examined multistage (up to four stages) transmission of the signals with circulating configurations. We show that even for a 4-stage transmission, the bit error rate of the transmitted signal is below the 20% forward-error-correction limit. Finally, we discuss approaches to improve the optical signal-to-noise ratio of the transmitted signals to enlarge the signal quality margin and increase the possible number of the cascading stages and/or WDM channels for wide applications.

Heuristic Model for Rapid Characterization of a SiP Switch Chip

A $4 \times 4$ silicon photonic switch based on a voltage-driven Mach–Zehnder interferometer (MZi) was modeled using transfer matrices, whose parameters were determined by fitting smoothed, wavelength-resolved transmission measurements. The model is constructed using voltages that configure each MZi in an intermediate (quadrature point) switch setting. This state is not used during normal operation of the switch. The model is then used to predict bias voltage settings for different switch configurations, such as the conventional through and cross connections, as well as other characteristics, such as crosstalk.

A &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$16\times16$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Non-Volatile Silicon Photonic Switch Circuit

A 16×16 silicon photonic switch circuit suitable for non-volatile operations has been realized. The switch circuit consists of dilated switch elements with liquid-controlled adiabatic waveguide couplers. The switch with a cross-bar architecture is compatible with a non-volatile electrowetting-on-dielectric system for optical actuation. The measured fiber-to-fiber loss is less than 18.9 dB over the wavelength range from 1500 to 1630 nm. At a wavelength of 1550 nm, the loss is between 8.5 and 17.4 dB depending on the length of the light path. The crosstalk of the switch is better than -50 dB over the wavelength range from 1500 to 1630 nm.

Integrated silicon photonic wavelength-selective switch using wavefront control waveguides.

A wavelength selective switch (WSS) can route optical signals into any of output ports by wavelength, and is a key component of the reconfigurable optical add/drop multiplexer. We propose a wavefront control type WSS using silicon photonics technology. This consists of several arrayed waveguide gratings sharing a large slab waveguide, wavefront control waveguides and distributed Bragg reflectors. The structure, design method, operating principle, and scalability of the WSS are described and discussed. We designed and fabricated a 1 × 2 wavefront control type WSS using silicon waveguides. This has 16 channels with a channel spacing of 200 GHz. The chip size is 5 mm × 10 mm. The switching operation was achieved by shifting the phase of the light propagating in each wavefront control waveguide, and by controlling the propagation direction in the shared large slab waveguide. Our WSS has no crossing waveguide, so the loss and the variation in loss between channels were small compared to conventional waveguide type WSSs. The heater power required for switching was 183 mW per channel, and the average extinction ratios routed to Output#1 and Output#2 were 9.8 dB and 10.2 dB, respectively.

Software-defined networking control plane for seamless integration of multiple silicon photonic switches in Datacom networks.

Silicon photonics based switches offer an effective option for the delivery of dynamic bandwidth for future large-scale Datacom systems while maintaining scalable energy efficiency. The integration of a silicon photonics-based optical switching fabric within electronic Datacom architectures requires novel network topologies and arbitration strategies to effectively manage the active elements in the network. We present a scalable software-defined networking control plane to integrate silicon photonic based switches with conventional Ethernet or InfiniBand networks. Our software-defined control plane manages both electronic packet switches and multiple silicon photonic switches for simultaneous packet and circuit switching. We built an experimental Dragonfly network testbed with 16 electronic packet switches and 2 silicon photonic switches to evaluate our control plane. Observed latencies occupied by each step of the switching procedure demonstrate a total of 344 µs control plane latency for data-center and high performance computing platforms.

Impact of Topology on the Scalability of Mach–Zehnder-Based Multistage Silicon Photonic Switch Networks

We analyze the scalability of electro-optic Mach–Zehnder-based silicon photonic switch networks. We describe a simulation framework based on the transfer matrix method that enable to model any type of multistage networks. We simulate three common network topologies – Benes, path-independent loss, and double-layer – and analyze their scalability by performing optical link numerical simulations for 50 Gbps non-return-to-zero signals. Our study shows that for a radix-16, the double-layer network performs better with a link power penalty smaller than 1 dB thanks to its dilated arrangement. For equivalent radix, the Benes and path-independent loss networks have link power penalties larger than 4 dB. Our simulations also show stringent requirements for the waveguide crossing crosstalk, whose value should be smaller than −35 dB to close any realistic link budget.

Silicon Photonic Switch Subsystem With 900 Monolithically Integrated Calibration Photodiodes and 64-Fiber Package

A packaged and fully operational 32 × 32 silicon photonic switch chip having 448 switch cells and 1856 crossings is demonstrated. The switch chip includes 900 monolithically integrated photodiodes used for calibrating the thermo-optic Mach–Zehnder switch cells. The calibration procedure employs an external laser source and follows a reachability-tree sequence to calibrate all switch cells. The accuracy of the calibration is demonstrated by the measurement of switch cell extinction ratios, for both states of each switch cell. The mean extinction ratio for both states is 35 dB. Arbitrary light path switching is demonstrated. Measurement of the channel-to-channel crosstalk was performed for a large number of aggressor and victim light path combinations. The matrix crosstalk is dominated by contributions from waveguide crossings. The die was wire-bonded to a custom ceramic package, to which a 68-fiber ribbon was permanently attached, which coupled the input and output optical signals to edge couplers on the chip through a waveguide pitch- and mode-concentrating silica chip. The fiber-to-fiber loss of on-chip loopback waveguides was less than 6.5 dB from 1530 to 1565 nm. The entirety of switch cells and monitors was driven by controller boards and A/D chips using a controller field-programmable gate array (FPGA). The calibration procedure was completed in less than 10 min using only the on-chip monitors, without off-chip detectors. The chip was recalibrated after six months storage, and the measured change in drive current was within the calibration uncertainty, indicating that the chip and driver are stable over time.